- 23 Jul, 2011 40 commits
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Mike Frysinger authored
No need to reload these registers constantly since they're always available (we're not making any function calls in between). Signed-off-by: Mike Frysinger <vapier@gentoo.org>
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Mike Frysinger authored
The Blackfin C ABI says we do not need to save/restore R0-R3 and P0-P2 as they are available as scratch registers. So don't bother. Signed-off-by: Mike Frysinger <vapier@gentoo.org>
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Mike Frysinger authored
Re-architect how we save/restore the gpio/port logic that only pertains to bf538/bf539 parts by pulling it out of the core code paths and pushing it out to bf538-specific locations. Signed-off-by: Mike Frysinger <vapier@gentoo.org>
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Mike Frysinger authored
The current save logic used in hibernation is to do a MMR load (base + offset) into a register, and then push that onto the stack. Then when restoring, pop off the stack into a register followed by a MMR store (base + offset). These use plenty of 32bit insns rather than 16bit, are pretty long winded, and full of pipeline bubbles. So, by taking advantage of MMRs that are contiguous, the multi-register push/pop insn, and register abuse, we can shrink this code considerably. When saving, the new logic does a lot of loads into the data and pointer registers before executing a single multi-register push insn. Then when restoring, we do a single multi-register pop insn followed by a lot of stores. Overall, this allows us to cut the insn count by ~30%, the code size by ~45%, and drastically reduce the register hazards that trigger bubbles in the pipeline. Signed-off-by: Mike Frysinger <vapier@gentoo.org>
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Mike Frysinger authored
EVT0 is for emulation, EVT1 is for reset, and EVT4 is the "global int disable" region. None of these are used by software (or even hardware), so don't bother saving/restoring them when we hibernate since nothing ever uses these in Linux (the only thing they would be useful for is core-memory scratch, but that's just crazy talk). Signed-off-by: Mike Frysinger <vapier@gentoo.org>
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Mike Frysinger authored
This defines only get used in the hibernate code, so remove them from the global dpmc header as no one else cares. Signed-off-by: Mike Frysinger <vapier@gentoo.org>
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Mike Frysinger authored
The RETE/RETN registers are only used in emulation(JTAG) and NMI nodes, or as scratch registers, neither of which need to be saved/restored as this code doesn't execute at those core event levels. Signed-off-by: Mike Frysinger <vapier@gentoo.org>
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Mike Frysinger authored
For parts with more than one SIC_IWR, we can optimize the writing a little bit using better Blackfin insns. Signed-off-by: Mike Frysinger <vapier@gentoo.org>
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Mike Frysinger authored
Have the logic that uses peripheral interrupt blocks key off of pint defines rather than CPU names so that things are generalized across families. Signed-off-by: Mike Frysinger <vapier@gentoo.org>
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Mike Frysinger authored
Have the code work off of MMR names rather than CPU defines so there is less code to tweak in the future with new parts. Signed-off-by: Mike Frysinger <vapier@gentoo.org>
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Mike Frysinger authored
Don't bind the code to specific CPU defines. Signed-off-by: Mike Frysinger <vapier@gentoo.org>
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Mike Frysinger authored
We have a struct in the headers describing the register layout, so drop the local duplicate one. Signed-off-by: Mike Frysinger <vapier@gentoo.org>
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Mike Frysinger authored
The hardware block uses the name "request" rather than "irq", so update the struct accordingly. Signed-off-by: Mike Frysinger <vapier@gentoo.org>
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Mike Frysinger authored
The array of pointers to register blocks never changes, so constify it. Signed-off-by: Mike Frysinger <vapier@gentoo.org>
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Mike Frysinger authored
These defines don't accomplish much as GPIO_# is the same thing as #. Each CPU already provides helpful symbolic defines like GPIO_<PIN> which everyone uses, so just punt these # ones. Signed-off-by: Mike Frysinger <vapier@gentoo.org>
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Mike Frysinger authored
Not sure how these guys slipped in, but they're annoying me. So bring these unicode space gremlins down to earth to normal ascii spaces. Signed-off-by: Mike Frysinger <vapier@gentoo.org>
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Mike Frysinger authored
For now, this only supports gptimers. Support for dedicated PWM devices as found on newer parts to come. Signed-off-by: Michael Hennerich <michael.hennerich@analog.com> Signed-off-by: Mike Frysinger <vapier@gentoo.org>
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Mike Frysinger authored
The API is geared around timer ids, except for the act of enabling and disabling timers. So add a small helper to fill out the gap. Signed-off-by: Mike Frysinger <vapier@gentoo.org>
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Steven Miao authored
The alignment is normally handled by PERCPU(), but we need to do it ourselves in the XIP build due to the custom layout. Signed-off-by: Steven Miao <realmz6@gmail.com> Signed-off-by: Mike Frysinger <vapier@gentoo.org>
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Mike Frysinger authored
Use proper helper macros for reading/writing the MMRs rather than volatile markings on the struct. Signed-off-by: Mike Frysinger <vapier@gentoo.org>
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Mike Frysinger authored
Now that asm/gptimers.h has the hardware register struct layout, there's no need to duplicate things locally. Signed-off-by: Mike Frysinger <vapier@gentoo.org>
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Mike Frysinger authored
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
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Mike Frysinger authored
Passing a non-simple expression in as the addr arg could incorrectly apply the pointer cast resulting in misbehavior. Add proper paren. Signed-off-by: Mike Frysinger <vapier@gentoo.org>
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Mike Frysinger authored
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
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Mathias Krause authored
The address limit is already set in flush_old_exec() so this set_fs(USER_DS) is redundant. Signed-off-by: Mathias Krause <minipli@googlemail.com> Signed-off-by: Mike Frysinger <vapier@gentoo.org>
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Mike Frysinger authored
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
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Mike Frysinger authored
These flashes are always on the board, so might as well enable them by default rather than a module. Signed-off-by: Mike Frysinger <vapier@gentoo.org>
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Mike Frysinger authored
The documentation for the IMDMA channels appears to be incorrect. These DMA blocks don't actually have PERIPHERAL_MAP MMRs for us to access. Attempts to do so lead to system mmr hardware errors. Signed-off-by: Mike Frysinger <vapier@gentoo.org>
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Mike Frysinger authored
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
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Mike Frysinger authored
The Blackfin mutex.h is merely a copy of an older asm-generic/mutex-dec.h, so punt it and just use the common one directly. Signed-off-by: Mike Frysinger <vapier@gentoo.org>
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Mike Frysinger authored
This moves the double fault data used at boot time into a single struct which can then easily be addressed with indexed loads rather than having to explicitly load multiple addresses. Signed-off-by: Mike Frysinger <vapier@gentoo.org>
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Mike Frysinger authored
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
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Mike Frysinger authored
This just imports all of the optimization work done in the common startup code. Signed-off-by: Mike Frysinger <vapier@gentoo.org>
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Mike Frysinger authored
The default for the Blackfin SPI driver is 8 bits and dma disabled, so many of the bfin5xx_spi_chip resources are redundant. So punt those parts. Further, drivers should themselves be declaring 16 bit transfers, so for those that do, and for the ones which no longer do 16 bit transfers, drop the bfin5xx_spi_chip resources. Signed-off-by: Mike Frysinger <vapier@gentoo.org>
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Mike Frysinger authored
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
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Mike Frysinger authored
No need for one line header stubs. Just declare it in Kbuild. Signed-off-by: Mike Frysinger <vapier@gentoo.org>
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Linus Torvalds authored
Merge branch 'x86-vdso-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/linux-2.6-tip * 'x86-vdso-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/linux-2.6-tip: x86-64, vdso: Do not allocate memory for the vDSO clocksource: Change __ARCH_HAS_CLOCKSOURCE_DATA to a CONFIG option x86, vdso: Drop now wrong comment Document the vDSO and add a reference parser ia64: Replace clocksource.fsys_mmio with generic arch data x86-64: Move vread_tsc and vread_hpet into the vDSO clocksource: Replace vread with generic arch data x86-64: Add --no-undefined to vDSO build x86-64: Allow alternative patching in the vDSO x86: Make alternative instruction pointers relative x86-64: Improve vsyscall emulation CS and RIP handling x86-64: Emulate legacy vsyscalls x86-64: Fill unused parts of the vsyscall page with 0xcc x86-64: Remove vsyscall number 3 (venosys) x86-64: Map the HPET NX x86-64: Remove kernel.vsyscall64 sysctl x86-64: Give vvars their own page x86-64: Document some of entry_64.S x86-64: Fix alignment of jiffies variable
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git://git.kernel.org/pub/scm/linux/kernel/git/tip/linux-2.6-tipLinus Torvalds authored
* 'x86-uv-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/linux-2.6-tip: x86, UV: Correct UV2 BAU destination timeout x86, UV: Correct failed topology memory leak x86, UV: Remove cpumask_t from the stack x86, UV: Rename hubmask to pnmask x86, UV: Correct reset_with_ipi() x86, UV: Allow for non-consecutive sockets x86, UV: Inline header file functions x86, UV: Fix smp_processor_id() use in a preemptable region x66, UV: Enable 64-bit ACPI MFCG support for SGI UV2 platform x86, UV: Clean up uv_mmrs.h
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Linus Torvalds authored
Merge branch 'x86-signal-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/linux-2.6-tip * 'x86-signal-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/linux-2.6-tip: x86: Kill handle_signal()->set_fs() x86, do_signal: Simplify the TS_RESTORE_SIGMASK logic x86, signals: Convert the X86_32 code to use set_current_blocked() x86, signals: Convert the IA32_EMULATION code to use set_current_blocked()
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Linus Torvalds authored
Merge branch 'x86-numa-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/linux-2.6-tip * 'x86-numa-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/linux-2.6-tip: x86, numa: Implement pfn -> nid mapping granularity check x86, mm: s/PAGES_PER_ELEMENT/PAGES_PER_SECTION/
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