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  1. 17 Mar, 2009 2 commits
    • Linus Torvalds's avatar
      Fast TSC calibration: calculate proper frequency error bounds · 9e8912e0
      Linus Torvalds authored 
      In order for ntpd to correctly synchronize the clocks, the frequency of
the system clock must not be off by more than 500 ppm (or, put another
way, 1:2000), or ntpd will end up giving up on trying to synchronize
properly, and ends up reseting the clock in jumps instead.

The fast TSC PIT calibration sometimes failed this test - it was
assuming that the PIT reads always took about one microsecond each (2us
for the two reads to get a 16-bit timer), and that calibrating TSC to
the PIT over 15ms should thus be sufficient to get much closer than
500ppm (max 2us error on both sides giving 4us over 15ms: a 270 ppm
error value).

However, that assumption does not always hold: apparently some hardware
is either very much slower at reading the PIT registers, or there was
other noise causing at least one machine to get 700+ ppm errors.

So instead of using a fixed 15ms timing loop, this changes the fast PIT
calibration to read the TSC delta over the individual PIT timer reads,
and use the result to calculate the error bars on the PIT read timing
properly.  We then successfully calibrate the TSC only if the maximum
error bars fall below 500ppm.

In the process, we also relax the timing to allow up to 25ms for the
calibration, although it can happen much faster depending on hardware.
Reported-and-tested-by: default avatarJesper Krogh <jesper@krogh.cc>
Cc: john stultz <johnstul@us.ibm.com>
Cc: Thomas Gleixner <tglx@linutronix.de>
Acked-by: default avatarIngo Molnar <mingo@elte.hu>
Signed-off-by: default avatarLinus Torvalds <torvalds@linux-foundation.org>
      9e8912e0
    • Linus Torvalds's avatar
      Fix potential fast PIT TSC calibration startup glitch · a6a80e1d
      Linus Torvalds authored 
      During bootup, when we reprogram the PIT (programmable interval timer)
to start counting down from 0xffff in order to use it for the fast TSC
calibration, we should also make sure to delay a bit afterwards to allow
the PIT hardware to actually start counting with the new value.

That will happens at the next CLK pulse (1.193182 MHz), so the easiest
way to do that is to just wait at least one microsecond after
programming the new PIT counter value.  We do that by just reading the
counter value back once - which will take about 2us on PC hardware.
Reported-and-tested-by: default avatarjohn stultz <johnstul@us.ibm.com>
Signed-off-by: default avatarLinus Torvalds <torvalds@linux-foundation.org>
      a6a80e1d
  3. 16 Mar, 2009 21 commits
  5. 15 Mar, 2009 3 commits
    • Kyle McMartin's avatar
      parisc: sba_iommu: fix build bug when CONFIG_PARISC_AGP=y · 5bee17f1
      Kyle McMartin authored 
      CC      drivers/parisc/sba_iommu.o
drivers/parisc/sba_iommu.c:1373: error: expected identifier or '('
before '}' token
make[2]: *** [drivers/parisc/sba_iommu.o] Error 1
make[1]: *** [drivers/parisc] Error 2
make: *** [drivers] Error 2

Don't know how this has gone missed for so long... clearly I need
to do builds on my C8000 more often.
Signed-off-by: default avatarKyle McMartin <kyle@mcmartin.ca>
Signed-off-by: default avatarLinus Torvalds <torvalds@linux-foundation.org>
      5bee17f1
    • Linus Torvalds's avatar
      Merge master.kernel.org:/home/rmk/linux-2.6-arm · fbd8104c
      Linus Torvalds authored 
      * master.kernel.org:/home/rmk/linux-2.6-arm: (23 commits)
  [ARM] Fix virtual to physical translation macro corner cases
  [ARM] update mach-types
  [ARM] 5421/1: ftrace: fix crash due to tracing of __naked functions
  MX1 fix include
  [ARM] 5419/1: ep93xx: fix build warnings about struct i2c_board_info
  [ARM] 5418/1: restore lr before leaving mcount
  ARM: OMAP: board-omap3beagle: set i2c-3 to 100kHz
  ARM: OMAP: Allow I2C bus driver to be compiled as a module
  ARM: OMAP: sched_clock() corrected
  ARM: OMAP: Fix compile error if pm.h is included
  [ARM] orion5x: pass dram mbus data to xor driver
  [ARM] S3C64XX: Fix s3c64xx_setrate_clksrc
  [ARM] S3C64XX: sparse warnings in arch/arm/plat-s3c64xx/irq.c
  [ARM] S3C64XX: sparse warnings in arch/arm/plat-s3c64xx/s3c6400-clock.c
  [ARM] S3C64XX: Fix USB host clock mux list
  [ARM] S3C64XX: Fix name of USB host clock.
  [ARM] S3C64XX: Rename IRQ_UHOST to IRQ_USBH
  [ARM] S3C64XX: Do gpiolib configuration earlier
  [ARM] S3C64XX: Staticise s3c64xx_init_irq_eint()
  [ARM] SMDK6410: Declare iodesc table static
  ...
      fbd8104c
    • Alexander Duyck's avatar
      igb: remove ASPM L0s workaround · 682337fe
      Alexander Duyck authored 
      The L0s workaround should be moved into a pci quirk and so it is not
necessary in the driver.  This update removes the L0s workaround from the
igb driver.

This was the second half of the PCI quirk patch that Matthew Wilcox did
not pick up when he picked up the quirk patch.
Signed-off-by: default avatarAlexander Duyck <alexander.h.duyck@intel.com>
Signed-off-by: default avatarJeff Kirsher <jeffrey.t.kirsher@intel.com>
Signed-off-by: default avatarDavid S. Miller <davem@davemloft.net>
      682337fe
  7. 14 Mar, 2009 14 commits
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