1. 02 Mar, 2013 21 commits
    • James Hogan's avatar
      metag: Time keeping · a2c5d4ed
      James Hogan authored
      Add time keeping code for metag. Meta hardware threads have 2 timers.
      The background timer (TXTIMER) is used as a free-running time base, and
      the interrupt timer (TXTIMERI) is used for the timer interrupt. Both
      counters traditionally count at approximately 1MHz.
      Signed-off-by: default avatarJames Hogan <james.hogan@imgtec.com>
      Cc: John Stultz <johnstul@us.ibm.com>
      Cc: Thomas Gleixner <tglx@linutronix.de>
      a2c5d4ed
    • James Hogan's avatar
      metag: ptrace · bc3966bf
      James Hogan authored
      The ptrace interface for metag provides access to some core register
      sets using the PTRACE_GETREGSET and PTRACE_SETREGSET operations. The
      details of the internal context structures is abstracted into user API
      structures to both ease use and allow flexibility to change the internal
      context layouts. Copyin and copyout functions for these register sets
      are exposed to allow signal handling code to use them to copy to and
      from the signal context.
      
      struct user_gp_regs (NT_PRSTATUS) provides access to the core general
      purpose register context.
      
      struct user_cb_regs (NT_METAG_CBUF) provides access to the TXCATCH*
      registers which contains information abuot a memory fault, unaligned
      access error or watchpoint. This can be modified to alter the way the
      fault is replayed on resume ("catch replay"), or to prevent the replay
      taking place.
      
      struct user_rp_state (NT_METAG_RPIPE) provides access to the state of
      the Meta read pipeline which can be used to hide memory latencies in
      hand optimised data loops.
      
      Extended DSP register state, DSP RAM, and hardware breakpoint registers
      aren't yet exposed through ptrace.
      Signed-off-by: default avatarJames Hogan <james.hogan@imgtec.com>
      Cc: Andrew Morton <akpm@linux-foundation.org>
      Cc: Denys Vlasenko <vda.linux@googlemail.com>
      Cc: Arnd Bergmann <arnd@arndb.de>
      Cc: Tony Lindgren <tony@atomide.com>
      Cc: "Paul E. McKenney" <paulmck@linux.vnet.ibm.com>
      bc3966bf
    • James Hogan's avatar
      metag: Device tree · 29dd78cf
      James Hogan authored
      Add device tree files to arch/metag.
      Signed-off-by: default avatarJames Hogan <james.hogan@imgtec.com>
      Reviewed-by: default avatarVineet Gupta <vgupta@synopsys.com>
      29dd78cf
    • James Hogan's avatar
      metag: Signal handling · 262d96b0
      James Hogan authored
      Add signal handling code for metag.
      Signed-off-by: default avatarJames Hogan <james.hogan@imgtec.com>
      Cc: Al Viro <viro@zeniv.linux.org.uk>
      262d96b0
    • James Hogan's avatar
      metag: TCM support · c438b58e
      James Hogan authored
      Add some TCM support
      Signed-off-by: default avatarJames Hogan <james.hogan@imgtec.com>
      c438b58e
    • James Hogan's avatar
      metag: Highmem support · bbc17704
      James Hogan authored
      Signed-off-by: default avatarJames Hogan <james.hogan@imgtec.com>
      bbc17704
    • James Hogan's avatar
      metag: Huge TLB · e624e95b
      James Hogan authored
      Add huge TLB support to the metag architecture.
      Signed-off-by: default avatarJames Hogan <james.hogan@imgtec.com>
      e624e95b
    • James Hogan's avatar
      metag: Memory handling · 373cd784
      James Hogan authored
      Meta has instructions for accessing:
       - bytes        - GETB (1 byte)
       - words        - GETW (2 bytes)
       - doublewords  - GETD (4 bytes)
       - longwords    - GETL (8 bytes)
      
      All accesses must be aligned. Unaligned accesses can be detected and
      made to fault on Meta2, however it isn't possible to fix up unaligned
      writes so we don't bother fixing up reads either.
      
      This patch adds metag memory handling code including:
       - I/O memory (io.h, ioremap.c): Actually any virtual memory can be
         accessed with these helpers. A part of the non-MMUable address space
         is used for memory mapped I/O. The ioremap() function is implemented
         one to one for non-MMUable addresses.
       - User memory (uaccess.h, usercopy.c): User memory is directly
         accessible from privileged code.
       - Kernel memory (maccess.c): probe_kernel_write() needs to be
         overwridden to use the I/O functions when doing a simple aligned
         write to non-writecombined memory, otherwise the write may be split
         by the generic version.
      
      Note that due to the fact that a portion of the virtual address space is
      non-MMUable, and therefore always maps directly to the physical address
      space, metag specific I/O functions are made available (metag_in32,
      metag_out32 etc). These cast the address argument to a pointer so that
      they can be used with raw physical addresses. These accessors are only
      to be used for accessing fixed core Meta architecture registers in the
      non-MMU region, and not for any SoC/peripheral registers.
      Signed-off-by: default avatarJames Hogan <james.hogan@imgtec.com>
      373cd784
    • James Hogan's avatar
      metag: Memory management · f5df8e26
      James Hogan authored
      Add memory management files for metag.
      
      Meta's 32bit virtual address space is split into two halves:
       - local (0x08000000-0x7fffffff): traditionally local to a hardware
         thread and incoherent between hardware threads. Each hardware thread
         has it's own local MMU table. On Meta2 the local space can be
         globally coherent (GCOn) if the cache partitions coincide.
       - global (0x88000000-0xffff0000): coherent and traditionally global
         between hardware threads. On Meta2, each hardware thread has it's own
         global MMU table.
      
      The low 128MiB of each half is non-MMUable and maps directly to the
      physical address space:
       - 0x00010000-0x07ffffff: contains Meta core registers and maps SoC bus
       - 0x80000000-0x87ffffff: contains low latency global core memories
      
      Linux usually further splits the local virtual address space like this:
       - 0x08000000-0x3fffffff: user mappings
       - 0x40000000-0x7fffffff: kernel mappings
      Signed-off-by: default avatarJames Hogan <james.hogan@imgtec.com>
      f5df8e26
    • James Hogan's avatar
      metag: Cache/TLB handling · 99ef7c2a
      James Hogan authored
      Add cache and TLB handling code for metag, including the required
      callbacks used by MM switches and DMA operations. Caches can be
      partitioned between the hardware threads and the global space, however
      this is usually configured by the bootloader so Linux doesn't make any
      changes to this configuration. TLBs aren't configurable, so only need
      consideration to flush them.
      
      On Meta1 the L1 cache was VIVT which required a full flush on MM switch.
      Meta2 has a VIPT L1 cache so it doesn't require the full flush on MM
      switch. Meta2 can also have a writeback L2 with hardware prefetch which
      requires some special handling. Support is optional, and the L2 can be
      detected and initialised by Linux.
      Signed-off-by: default avatarJames Hogan <james.hogan@imgtec.com>
      99ef7c2a
    • James Hogan's avatar
      metag: TBX source · 027f891f
      James Hogan authored
      Add source files from the Thread Binary Interface (TBI) library which
      provides useful low level operations and traps/context management.
      
      Among other things it handles interrupt/exception/syscall entry (in
      tbipcx.S).
      Signed-off-by: default avatarJames Hogan <james.hogan@imgtec.com>
      027f891f
    • James Hogan's avatar
      metag: TBX header · 4ca151b2
      James Hogan authored
      Add the main header for the Thread Binary Interface (TBI) library which
      provides useful low level operations and trap/context management.
      Signed-off-by: default avatarJames Hogan <james.hogan@imgtec.com>
      4ca151b2
    • James Hogan's avatar
      metag: Boot · 85d9d7a9
      James Hogan authored
      Add boot code for metag. Due to the multi-threaded nature of Meta it is
      not uncommon for an RTOS or bare metal application to be started on
      other hardware threads by the bootloader. Since there is a single MMU
      switch which affects all threads, the MMU is traditionally configured by
      the bootloader prior to starting Linux. The bootloader passes a
      structure to Linux which among other things contains information about
      memory regions which have been mapped. Linux then assumes control of the
      local heap memory region.
      
      A kernel arguments string pointer or a flattened device tree pointer can
      be provided in the third argument.
      Signed-off-by: default avatarJames Hogan <james.hogan@imgtec.com>
      85d9d7a9
    • James Hogan's avatar
      metag: Header for core memory mapped registers · 87aa1328
      James Hogan authored
      Add the header <asm/metag_mem.h> describing addresses, fields, and bits
      of various core memory mapped registers in the low non-MMU region.
      Signed-off-by: default avatarJames Hogan <james.hogan@imgtec.com>
      87aa1328
    • James Hogan's avatar
      metag: Headers for core arch constants · af8a1049
      James Hogan authored
      Add a couple of header files containing core architecture constants.
      
      The first (<asm/metag_isa.h>) contains some constants relating to the
      instruction set, such as values to give to the CACHEW and CACHER
      instructions.
      
      The second (<asm/metag_regs.h>) contains constants for the core register
      units directly accessible to various instructions, and for the
      registers, fields, and bits in those units. The main units described are
      the control unit (CT.*), the trigger unit (TR.*), and the run-time trace
      unit (TT.*).
      Signed-off-by: default avatarJames Hogan <james.hogan@imgtec.com>
      af8a1049
    • James Hogan's avatar
      metag: Add MAINTAINERS entry · 12285945
      James Hogan authored
      Add MAINTAINERS entry for the metag architecture port.
      Signed-off-by: default avatarJames Hogan <james.hogan@imgtec.com>
      Cc: Andrew Morton <akpm@linux-foundation.org>
      Cc: Mauro Carvalho Chehab <mchehab@redhat.com>
      Cc: Cesar Eduardo Barros <cesarb@cesarb.net>
      Cc: Joe Perches <joe@perches.com>
      Cc: "David S. Miller" <davem@davemloft.net>
      12285945
    • James Hogan's avatar
      trace/ring_buffer: handle 64bit aligned structs · 649508f6
      James Hogan authored
      Some 32 bit architectures require 64 bit values to be aligned (for
      example Meta which has 64 bit read/write instructions). These require 8
      byte alignment of event data too, so use
      !CONFIG_HAVE_64BIT_ALIGNED_ACCESS instead of !CONFIG_64BIT ||
      CONFIG_HAVE_EFFICIENT_UNALIGNED_ACCESS to decide alignment, and align
      buffer_data_page::data accordingly.
      Signed-off-by: default avatarJames Hogan <james.hogan@imgtec.com>
      Cc: Frederic Weisbecker <fweisbec@gmail.com>
      Cc: Ingo Molnar <mingo@redhat.com>
      Acked-by: Steven Rostedt <rostedt@goodmis.org> (previous version subtly different)
      649508f6
    • James Hogan's avatar
      Add HAVE_64BIT_ALIGNED_ACCESS · c19fa94a
      James Hogan authored
      On 64 bit architectures with no efficient unaligned access, padding and
      explicit alignment must be added in various places to prevent unaligned
      64bit accesses (such as taskstats and trace ring buffer).
      
      However this also needs to apply to 32 bit architectures with 64 bit
      accesses requiring alignment such as metag.
      
      This is solved by adding a new Kconfig symbol HAVE_64BIT_ALIGNED_ACCESS
      which defaults to 64BIT && !HAVE_EFFICIENT_UNALIGNED_ACCESS, and can be
      explicitly selected by METAG and any other relevant architectures. This
      can be used in various places to determine whether 64bit alignment is
      required.
      Signed-off-by: default avatarJames Hogan <james.hogan@imgtec.com>
      Cc: Al Viro <viro@zeniv.linux.org.uk>
      Cc: Ingo Molnar <mingo@kernel.org>
      Cc: Andrew Morton <akpm@linux-foundation.org>
      Cc: Eric Paris <eparis@redhat.com>
      Cc: Will Drewry <wad@chromium.org>
      c19fa94a
    • James Hogan's avatar
      Revert some of "binfmt_elf: cleanups" · c07380be
      James Hogan authored
      The commit "binfmt_elf: cleanups"
      (f670d0ec) removed an ifndef elf_map but
      this breaks compilation for metag which does define elf_map.
      
      This adds the ifndef back in as it was before, but does not affect the
      other cleanups made by that patch.
      Signed-off-by: default avatarJames Hogan <james.hogan@imgtec.com>
      Cc: Alexander Viro <viro@zeniv.linux.org.uk>
      Cc: linux-fsdevel@vger.kernel.org
      Acked-by: default avatarMikael Pettersson <mikpe@it.uu.se>
      c07380be
    • James Hogan's avatar
      asm-generic/unistd.h: handle symbol prefixes in cond_syscall · 4dd3c959
      James Hogan authored
      Some architectures have symbol prefixes and set CONFIG_SYMBOL_PREFIX,
      but this wasn't taken into account by the generic cond_syscall. It's
      easy enough to fix in a generic fashion, so add the symbol prefix to
      symbol names in cond_syscall when CONFIG_SYMBOL_PREFIX is set.
      Signed-off-by: default avatarJames Hogan <james.hogan@imgtec.com>
      Acked-by: default avatarArnd Bergmann <arnd@arndb.de>
      Acked-by: default avatarMike Frysinger <vapier@gentoo.org>
      4dd3c959
    • James Hogan's avatar
      asm-generic/io.h: check CONFIG_VIRT_TO_BUS · c93d0312
      James Hogan authored
      Make asm-generic/io.h check CONFIG_VIRT_TO_BUS before defining
      virt_to_bus() and bus_to_virt(), otherwise it's easy to accidentally
      have a silently failing incorrect direct mapped definition rather then
      no definition at all.
      Signed-off-by: default avatarJames Hogan <james.hogan@imgtec.com>
      Acked-by: default avatarArnd Bergmann <arnd@arndb.de>
      c93d0312
  2. 18 Feb, 2013 3 commits
  3. 15 Feb, 2013 9 commits
  4. 14 Feb, 2013 4 commits
    • David S. Miller's avatar
      sunvdc: Fix off-by-one in generic_request(). · f4d96054
      David S. Miller authored
      The 'operations' bitmap corresponds one-for-one with the operation
      codes, no adjustment is necessary.
      Reported-by: default avatarMark Kettenis <mark.kettenis@xs4all.nl>
      Signed-off-by: default avatarDavid S. Miller <davem@davemloft.net>
      f4d96054
    • Tomi Valkeinen's avatar
      omapdrm: fix the dependency to omapdss · 91e83ffd
      Tomi Valkeinen authored
      omapdrm uses "select" in Kconfig to enable omapdss. This doesn't work
      correctly, as "select" forces omapdss to be enabled in the config even
      if it normally could not be enabled because of missing Kconfig
      dependencies.
      
      This causes a build break on ARM, when using allyesconfig:
      
      drivers/video/omap2/dss/dss.c: In function 'dss_calc_clock_div':
      drivers/video/omap2/dss/dss.c:572:20: error: 'CONFIG_OMAP2_DSS_MIN_FCK_PER_PCK' undeclared (first use in this function)
      drivers/video/omap2/dss/dss.c:572:20: note: each undeclared identifier is reported only once for each function it appears in
      
      Instead of using select, this patch changes omapdrm to use "depend
      on".
      Signed-off-by: default avatarTomi Valkeinen <tomi.valkeinen@ti.com>
      91e83ffd
    • NeilBrown's avatar
      OMAPDSS: add FEAT_DPI_USES_VDDS_DSI to omap3630_dss_feat_list · eb91e79b
      NeilBrown authored
      commit 195e672a
         OMAPDSS: DPI: Remove cpu_is_xxxx checks
      
      made the mistake of assuming that cpu_is_omap34xx() is exclusive of
      other cpu_is_* predicates whereas it includes cpu_is_omap3630().
      
      So on an omap3630, code that was previously enabled by
        if (cpu_is_omap34xx())
      is now disabled as
        dss_has_feature(FEAT_DPI_USES_VDDS_DSI)
      fails.
      
      So add FEAT_DPI_USES_VDDS_DSI to omap3630_dss_feat_list.
      
      Cc: Chandrabhanu Mahapatra <cmahapatra@ti.com>
      Cc: Tomi Valkeinen <tomi.valkeinen@ti.com>
      Signed-off-by: default avatarNeilBrown <neilb@suse.de>
      Signed-off-by: default avatarTomi Valkeinen <tomi.valkeinen@ti.com>
      eb91e79b
    • Satoru Takeuchi's avatar
      efi: Clear EFI_RUNTIME_SERVICES rather than EFI_BOOT by "noefi" boot parameter · 1de63d60
      Satoru Takeuchi authored
      There was a serious problem in samsung-laptop that its platform driver is
      designed to run under BIOS and running under EFI can cause the machine to
      become bricked or can cause Machine Check Exceptions.
      
          Discussion about this problem:
          https://bugs.launchpad.net/ubuntu-cdimage/+bug/1040557
          https://bugzilla.kernel.org/show_bug.cgi?id=47121
      
          The patches to fix this problem:
          efi: Make 'efi_enabled' a function to query EFI facilities
          83e68189
      
          samsung-laptop: Disable on EFI hardware
          e0094244
      
      Unfortunately this problem comes back again if users specify "noefi" option.
      This parameter clears EFI_BOOT and that driver continues to run even if running
      under EFI. Refer to the document, this parameter should clear
      EFI_RUNTIME_SERVICES instead.
      
      Documentation/kernel-parameters.txt:
      ===============================================================================
      ...
      	noefi		[X86] Disable EFI runtime services support.
      ...
      ===============================================================================
      
      Documentation/x86/x86_64/uefi.txt:
      ===============================================================================
      ...
      - If some or all EFI runtime services don't work, you can try following
        kernel command line parameters to turn off some or all EFI runtime
        services.
      	noefi		turn off all EFI runtime services
      ...
      ===============================================================================
      Signed-off-by: default avatarSatoru Takeuchi <takeuchi_satoru@jp.fujitsu.com>
      Link: http://lkml.kernel.org/r/511C2C04.2070108@jp.fujitsu.com
      Cc: Matt Fleming <matt.fleming@intel.com>
      Cc: <stable@vger.kernel.org>
      Signed-off-by: default avatarH. Peter Anvin <hpa@linux.intel.com>
      1de63d60
  5. 13 Feb, 2013 3 commits
    • Cyril Roelandt's avatar
      xen: remove redundant NULL check before unregister_and_remove_pcpu(). · 4f8c8527
      Cyril Roelandt authored
      unregister_and_remove_pcpu on a NULL pointer is a no-op, so the NULL check in
      sync_pcpu can be removed.
      Signed-off-by: default avatarCyril Roelandt <tipecaml@gmail.com>
      Signed-off-by: default avatarKonrad Rzeszutek Wilk <konrad.wilk@oracle.com>
      4f8c8527
    • Jan Beulich's avatar
      x86/xen: don't assume %ds is usable in xen_iret for 32-bit PVOPS. · 13d2b4d1
      Jan Beulich authored
      This fixes CVE-2013-0228 / XSA-42
      
      Drew Jones while working on CVE-2013-0190 found that that unprivileged guest user
      in 32bit PV guest can use to crash the > guest with the panic like this:
      
      -------------
      general protection fault: 0000 [#1] SMP
      last sysfs file: /sys/devices/vbd-51712/block/xvda/dev
      Modules linked in: sunrpc ipt_REJECT nf_conntrack_ipv4 nf_defrag_ipv4
      iptable_filter ip_tables ip6t_REJECT nf_conntrack_ipv6 nf_defrag_ipv6
      xt_state nf_conntrack ip6table_filter ip6_tables ipv6 xen_netfront ext4
      mbcache jbd2 xen_blkfront dm_mirror dm_region_hash dm_log dm_mod [last
      unloaded: scsi_wait_scan]
      
      Pid: 1250, comm: r Not tainted 2.6.32-356.el6.i686 #1
      EIP: 0061:[<c0407462>] EFLAGS: 00010086 CPU: 0
      EIP is at xen_iret+0x12/0x2b
      EAX: eb8d0000 EBX: 00000001 ECX: 08049860 EDX: 00000010
      ESI: 00000000 EDI: 003d0f00 EBP: b77f8388 ESP: eb8d1fe0
       DS: 0000 ES: 007b FS: 0000 GS: 00e0 SS: 0069
      Process r (pid: 1250, ti=eb8d0000 task=c2953550 task.ti=eb8d0000)
      Stack:
       00000000 0027f416 00000073 00000206 b77f8364 0000007b 00000000 00000000
      Call Trace:
      Code: c3 8b 44 24 18 81 4c 24 38 00 02 00 00 8d 64 24 30 e9 03 00 00 00
      8d 76 00 f7 44 24 08 00 00 02 80 75 33 50 b8 00 e0 ff ff 21 e0 <8b> 40
      10 8b 04 85 a0 f6 ab c0 8b 80 0c b0 b3 c0 f6 44 24 0d 02
      EIP: [<c0407462>] xen_iret+0x12/0x2b SS:ESP 0069:eb8d1fe0
      general protection fault: 0000 [#2]
      ---[ end trace ab0d29a492dcd330 ]---
      Kernel panic - not syncing: Fatal exception
      Pid: 1250, comm: r Tainted: G      D    ---------------
      2.6.32-356.el6.i686 #1
      Call Trace:
       [<c08476df>] ? panic+0x6e/0x122
       [<c084b63c>] ? oops_end+0xbc/0xd0
       [<c084b260>] ? do_general_protection+0x0/0x210
       [<c084a9b7>] ? error_code+0x73/
      -------------
      
      Petr says: "
       I've analysed the bug and I think that xen_iret() cannot cope with
       mangled DS, in this case zeroed out (null selector/descriptor) by either
       xen_failsafe_callback() or RESTORE_REGS because the corresponding LDT
       entry was invalidated by the reproducer. "
      
      Jan took a look at the preliminary patch and came up a fix that solves
      this problem:
      
      "This code gets called after all registers other than those handled by
      IRET got already restored, hence a null selector in %ds or a non-null
      one that got loaded from a code or read-only data descriptor would
      cause a kernel mode fault (with the potential of crashing the kernel
      as a whole, if panic_on_oops is set)."
      
      The way to fix this is to realize that the we can only relay on the
      registers that IRET restores. The two that are guaranteed are the
      %cs and %ss as they are always fixed GDT selectors. Also they are
      inaccessible from user mode - so they cannot be altered. This is
      the approach taken in this patch.
      
      Another alternative option suggested by Jan would be to relay on
      the subtle realization that using the %ebp or %esp relative references uses
      the %ss segment.  In which case we could switch from using %eax to %ebp and
      would not need the %ss over-rides. That would also require one extra
      instruction to compensate for the one place where the register is used
      as scaled index. However Andrew pointed out that is too subtle and if
      further work was to be done in this code-path it could escape folks attention
      and lead to accidents.
      Reviewed-by: default avatarPetr Matousek <pmatouse@redhat.com>
      Reported-by: default avatarPetr Matousek <pmatouse@redhat.com>
      Reviewed-by: default avatarAndrew Cooper <andrew.cooper3@citrix.com>
      Signed-off-by: default avatarJan Beulich <jbeulich@suse.com>
      Signed-off-by: default avatarKonrad Rzeszutek Wilk <konrad.wilk@oracle.com>
      13d2b4d1
    • David S. Miller's avatar
      sparc64: Fix get_user_pages_fast() wrt. THP. · 89a77915
      David S. Miller authored
      Mostly mirrors the s390 logic, as unlike x86 we don't need the
      SetPageReferenced() bits.
      
      On sparc64 we also lack a user/privileged bit in the huge PMDs.
      
      In order to make this work for THP and non-THP builds, some header
      file adjustments were necessary.  Namely, provide the PMD_HUGE_* bit
      defines and the pmd_large() inline unconditionally rather than
      protected by TRANSPARENT_HUGEPAGE.
      Reported-by: default avatarAneesh Kumar K.V <aneesh.kumar@linux.vnet.ibm.com>
      Signed-off-by: default avatarDavid S. Miller <davem@davemloft.net>
      89a77915