- 14 Oct, 2015 9 commits
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Russell King authored
As all the import functions and export functions are virtually identical, factor out their common parts into a generic mv_cesa_ahash_import() and mv_cesa_ahash_export() respectively. This performs the actual import or export, and we pass the data pointers and length into these functions. We have to switch a % const operation to do_div() in the common import function to avoid provoking gcc to use the expensive 64-bit by 64-bit modulus operation. Signed-off-by:
Russell King <rmk+kernel@arm.linux.org.uk> Acked-by:
Boris Brezillon <boris.brezillon@free-electrons.com> Signed-off-by:
Herbert Xu <herbert@gondor.apana.org.au>
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Russell King authored
Attempting to use the sha1 digest for openssh via openssl reveals that the result from the hash is wrong: this happens when we export the state from one socket and import it into another via calling accept(). The reason for this is because the operation is reset to "initial block" state, whereas we may be past the first fragment of data to be hashed. Arrange for the operation code to avoid the initialisation of the state, thereby preserving the imported state. Signed-off-by:
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Russell King authored
When a AF_ALG fd is accepted a second time (hence hash_accept() is used), hash_accept_parent() allocates a new private context using sock_kmalloc(). This context is uninitialised. After use of the new fd, we eventually end up with the kernel complaining: marvell-cesa f1090000.crypto: dma_pool_free cesa_padding, c0627770/0 (bad dma) where c0627770 is a random address. Poisoning the memory allocated by the above sock_kmalloc() produces kernel oopses within the marvell hash code, particularly the interrupt handling. The following simplfied call sequence occurs: hash_accept() crypto_ahash_export() marvell hash export function af_alg_accept() hash_accept_parent() <== allocates uninitialised struct hash_ctx crypto_ahash_import() marvell hash import function hash_ctx contains the struct mv_cesa_ahash_req in its req.__ctx member, and, as the marvell hash import function only partially initialises this structure, we end up with a lot of members which are left with whatever data was in memory prior to sock_kmalloc(). Add zero-initialisation of this structure. Signed-off-by:Boris Brezillon <boris.brezillon@free-electronc.com> Signed-off-by:
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Russell King authored
Several of the algorithms in marvell/hash.c have a statesize of zero. When an AF_ALG accept() on an already-accepted file descriptor to calls into hash_accept(), this causes: char state[crypto_ahash_statesize(crypto_ahash_reqtfm(req))]; to be zero-sized, but we still pass this to: err = crypto_ahash_export(req, state); which proceeds to write to 'state' as if it was a "struct md5_state", "struct sha1_state" etc. Add the necessary initialisers for the .statesize member. Acked-by:
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Thomas Petazzoni authored
A new crypto driver for Marvell ARM platforms was added in drivers/crypto/marvell/ as part of commit f63601fd ("crypto: marvell/cesa - add a new driver for Marvell's CESA"). This commit adds the relevant developers to the list of maintainers. Cc: Boris Brezillon <boris.brezillon@free-electrons.com> Cc: Arnaud Ebalard <arno@natisbad.org> Cc: Herbert Xu <herbert@gondor.apana.org.au> Cc: Russell King <linux@arm.linux.org.uk> Signed-off-by:
Thomas Petazzoni <thomas.petazzoni@free-electrons.com> Acked-by:
Arnaud Ebalard <arno@natisbad.org> Signed-off-by:
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Haren Myneni authored
This patch adds CRC generation and validation support for nx-842. Add CRC flag so that nx842 coprocessor includes CRC during compression and validates during decompression. Also changes in 842 SW compression to append CRC value at the end of template and checks during decompression. Signed-off-by:
Haren Myneni <haren@us.ibm.com> Signed-off-by:
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Alexander Kuleshov authored
The clocksource does not provide clocksource_register() function since f8935983 commit (clocksource: Mostly kill clocksource_register()), so let's remove unnecessary information about this function from a comment. Signed-off-by:
Alexander Kuleshov <kuleshovmail@gmail.com> Suggested-by:
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Tadeusz Struk authored
Setkey function has been split into set_priv_key and set_pub_key. Akcipher requests takes sgl for src and dst instead of void *. Users of the API i.e. two existing RSA implementation and test mgr code have been updated accordingly. Signed-off-by:
Tadeusz Struk <tadeusz.struk@intel.com> Signed-off-by:
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Tadeusz Struk authored
Add mpi_read_raw_from_sgl and mpi_write_to_sgl helpers. Signed-off-by:
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- 08 Oct, 2015 10 commits
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Lee Jones authored
The original representation of FIFO size in the driver coupled with the ambiguity in the documentation meant that it was easy to confuse readers. This lead to a false positive BUG-find and subsequently time wastage debugging this phantom issue. Hopefully this patch can prevent future readers from falling into the same trap. Signed-off-by:
Lee Jones <lee.jones@linaro.org> Signed-off-by:
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Lee Jones authored
Samples are documented to be available every 0.667us, so in theory the 8 sample deep FIFO should take 5.336us to fill. However, during thorough testing, it became apparent that filling the FIFO actually takes closer to 12us. Also take into consideration that udelay() can behave oddly i.e. not delay for as long as requested. Suggested-by: Russell King <rmk+kernel@arm.linux.org.uk>: "IIRC, Linus recommends a x2 factor on delays, especially timeouts generated by these functions. Signed-off-by: -
Lee Jones authored
DT nodes should not append their addresses with '0x'. Suggested-by:
Stephen Boyd <sboyd@codeaurora.org> Signed-off-by:
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LABBE Corentin authored
clk_prepare_enable() can fail so add a check for this and return the error code if it fails. Signed-off-by:
LABBE Corentin <clabbe.montjoie@gmail.com> Signed-off-by:
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Catalin Vasile authored
Add support for AES working in XEX-based Tweaked-codebook mode with ciphertext Stealing (XTS) sector index - HW limitation: CAAM device supports sector index of only 8 bytes to be used for sector index inside IV, instead of whole 16 bytes received on request. This represents 2 ^ 64 = 16,777,216 Tera of possible values for sector index. Signed-off-by:
Cristian Hristea <cristi.hristea@gmail.com> Signed-off-by:
Horia Geanta <horia.geanta@freescale.com> Signed-off-by:
Alex Porosanu <alexandru.porosanu@freescale.com> Signed-off-by:
Catalin Vasile <catalin.vasile@freescale.com> Signed-off-by:
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LABBE Corentin authored
The qce driver use two dma_map_sg path according to SG are chained or not. Since dma_map_sg can handle both case, clean the code with all references to sg chained. Thus removing qce_mapsg, qce_unmapsg and qce_countsg functions. Signed-off-by:
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Tom Lendacky authored
The convention is to use the name of the module in the driver structures that are used for registering the device. The CCP module is currently using a descriptive name. Replace the descriptive name with module name. Signed-off-by:
Tom Lendacky <thomas.lendacky@amd.com> Signed-off-by:
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Tom Lendacky authored
The CCP is meant to be more of an offload engine than an accelerator engine. To avoid any confusion, change references to accelerator to offload. Signed-off-by:
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Tom Lendacky authored
With the creation of the device_dma_is_coherent API the "use_acpi" field is no longer needed, so remove it. Signed-off-by:
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Tom Lendacky authored
Replace the usage of BUG_ON with WARN_ON and return an error. Signed-off-by:
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- 01 Oct, 2015 8 commits
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Tadeusz Struk authored
Remove unneeded variable val_indx. Issue found by a static analyzer. Reported-by:
Giovanni Cabiddu <giovanni.cabiddu@intel.com> Signed-off-by:
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Tadeusz Struk authored
Add support for ctr and xts encryption modes. Signed-off-by:
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Geliang Tang authored
Fixes the following sparse warnings: crypto/skcipher.c:94:5: warning: symbol 'crypto_init_skcipher_ops_blkcipher' was not declared. Should it be static? crypto/skcipher.c:185:5: warning: symbol 'crypto_init_skcipher_ops_ablkcipher' was not declared. Should it be static? Signed-off-by:
Geliang Tang <geliangtang@163.com> Signed-off-by:
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John Haxby authored
No authenc() ciphers are FIPS approved, nor is ecb(des). After the end of 2015, ansi_cprng will also be non-approved. Signed-off-by:
John Haxby <john.haxby@oracle.com> Acked-by:
Stephan Mueller <smueller@chronox.de> Signed-off-by:
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LABBE Corentin authored
The sahara driver use two dma_map_sg path according to SG are chained or not. Since dma_map_sg can handle both case, clean the code with all references to sg chained. Thus removing the sahara_sha_unmap_sg function. Signed-off-by:
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LABBE Corentin authored
The caam driver use two dma_map_sg path according to SG are chained or not. Since dma_map_sg can handle both case, clean the code with all references to sg chained. Thus removing dma_map_sg_chained, dma_unmap_sg_chained and __sg_count functions. Signed-off-by:
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LABBE Corentin authored
The talitos driver use two dma_map_sg path according to SG are chained or not. Since dma_map_sg can handle both case, clean the code with all references to sg chained. Thus removing talitos_map_sg, talitos_unmap_sg_chain and sg_count functions. Signed-off-by:
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Tadeusz Struk authored
Some code cleanups after crypto API changes: - Change qat_algs_unregister to a void function to keep it consistent with qat_asym_algs_unregister. - Remove empty functions qat_algs_init & qat_algs_exit. Signed-off-by:
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- 21 Sep, 2015 13 commits
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Nicolas Iooss authored
Module crc32c-intel uses a special read-only data section named .rotata. This section is defined for K_table, and its name seems to be a spelling mistake for .rodata. Fixes: 473946e6 ("crypto: crc32c-pclmul - Shrink K_table to 32-bit words") Signed-off-by:
Nicolas Iooss <nicolas.iooss_linux@m4x.org> Signed-off-by:
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LABBE Corentin authored
The sahara_sg_length function of the sahara driver is the same as sg_nents_for_len from lib/scatterlist.c Signed-off-by:
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LABBE Corentin authored
The get_sg_count function of amcc is the same as sg_nents_for_len from lib/scatterlist.c Signed-off-by:
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LABBE Corentin authored
The sg_count function in bfin_crc.c is the same function as sg_nents. Remove the duplicate code and use sg_nents() instead. Signed-off-by:
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tim authored
Restructure the x86 sha512 glue code so we will expose sha512 transforms based on SSSE3, AVX or AVX2 as separate individual drivers when cpu provides support. This will make it easy for alternative algorithms to be used if desired and makes the code cleaner and easier to maintain. Signed-off-by:
Tim Chen <tim.c.chen@linux.intel.com> Signed-off-by:
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tim authored
Restructure the x86 sha256 glue code so we will expose sha256 transforms based on SSSE3, AVX, AVX2 or SHA-NI extension as separate individual drivers when cpu provides such support. This will make it easy for alternative algorithms to be used if desired and makes the code cleaner and easier to maintain. Signed-off-by:
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tim authored
Restructure the x86 sha1 glue code so we will expose sha1 transforms based on SSSE3, AVX, AVX2 or SHA-NI extension as separate individual drivers when cpu provides such support. This will make it easy for alternative algorithms to be used if desired and makes the code cleaner and easier to maintain. Signed-off-by:
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tim authored
This patch provides the configuration and build support to include and build the optimized SHA1 and SHA256 update transforms for the kernel's crypto library. Originally-by:
Chandramouli Narayanan <mouli_7982@yahoo.com> Signed-off-by:
David S. Miller <davem@davemloft.net> Signed-off-by:
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tim authored
This patch adds the glue code to detect and utilize the Intel SHA extensions optimized SHA1 and SHA256 update transforms when available. This code has been tested on Broxton for functionality. Originally-by:
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tim authored
This patch includes the Intel SHA Extensions optimized implementation of SHA-256 update function. This function has been tested on Broxton platform and measured a speed up of 3.6x over the SSSE3 implementiation for 4K blocks. Originally-by:
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tim authored
This patch includes the Intel SHA Extensions optimized implementation of SHA-1 update function. This function has been tested on Broxton platform and measured a speed up of 3.6x over the SSSE3 implementiation for 4K blocks. Originally-by:
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Lee Jones authored
Signed-off-by:
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Lee Jones authored
Signed-off-by:
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