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  1. 21 Apr, 2006 1 commit
    • Satoru Takeuchi's avatar
      [IA64] eliminate compile time warnings · a72391e4
      Satoru Takeuchi authored
      This patch removes following compile time warnings:
      
      drivers/pci/pci-sysfs.c: In function `pci_read_legacy_io':
      drivers/pci/pci-sysfs.c:257: warning: implicit declaration of function `ia64_pci_legacy_read'
      drivers/pci/pci-sysfs.c: In function `pci_write_legacy_io':
      drivers/pci/pci-sysfs.c:280: warning: implicit declaration of function `ia64_pci_legacy_write'
      
      It also fixes wrong definition of ia64_pci_legacy_write (type of `bus' is not
      `pci_dev', but `pci_bus').
      Signed-Off-By: default avatarSatoru Takeuchi <takeuchi_satoru@jp.fujitsu.com>
      Signed-off-by: default avatarTony Luck <tony.luck@intel.com>
      a72391e4
  2. 26 Jan, 2006 1 commit
    • Brent Casavant's avatar
      [IA64] hooks to wait for mmio writes to drain when migrating processes · e08e6c52
      Brent Casavant authored
      On SN2, MMIO writes which are issued from separate processors are not
      guaranteed to arrive in any particular order at the IO hardware.  When
      performing such writes from the kernel this is not a problem, as a
      kernel thread will not migrate to another CPU during execution, and
      mmiowb() calls can guarantee write ordering when control of the IO
      resource is allowed to move between threads.
      
      However, when MMIO writes can be performed from user space (e.g. DRM)
      there are no such guarantees and mechanisms, as the process may
      context-switch at any time, and may migrate to a different CPU as part
      of the switch.  For such programs/hardware to operate correctly, it is
      required that the MMIO writes from the old CPU be accepted by the IO
      hardware before subsequent writes from the new CPU can be issued.
      
      The following patch implements this behavior on SN2 by waiting for a
      Shub register to indicate that these writes have been accepted.  This
      is placed in the context switch-in path, and only performs the wait
      when the newly scheduled task changes CPUs.
      Signed-off-by: default avatarPrarit Bhargava <prarit@sgi.com>
      Signed-off-by: default avatarBrent Casavant <bcasavan@sgi.com>
      e08e6c52
  3. 28 Oct, 2005 1 commit
  4. 27 Oct, 2005 1 commit
    • Dean Roe's avatar
      [IA64] - Avoid slow TLB purges on SGI Altix systems · c1902aae
      Dean Roe authored
      flush_tlb_all() can be a scaling issue on large SGI Altix systems
      since it uses the global call_lock and always executes on all cpus.
      When a process enters flush_tlb_range() to purge TLBs for another
      process, it is possible to avoid flush_tlb_all() and instead allow
      sn2_global_tlb_purge() to purge TLBs only where necessary.
      
      This patch modifies flush_tlb_range() so that this case can be handled
      by platform TLB purge functions and updates ia64_global_tlb_purge()
      accordingly.  sn2_global_tlb_purge() now calculates the region register
      value from the mm argument introduced with this patch.
      Signed-off-by: default avatarDean Roe <roe@sgi.com>
      Signed-off-by: default avatarTony Luck <tony.luck@intel.com>
      c1902aae
  5. 16 Apr, 2005 1 commit
    • Linus Torvalds's avatar
      Linux-2.6.12-rc2 · 1da177e4
      Linus Torvalds authored
      Initial git repository build. I'm not bothering with the full history,
      even though we have it. We can create a separate "historical" git
      archive of that later if we want to, and in the meantime it's about
      3.2GB when imported into git - space that would just make the early
      git days unnecessarily complicated, when we don't have a lot of good
      infrastructure for it.
      
      Let it rip!
      1da177e4