1. 28 Mar, 2017 12 commits
    • James Hogan's avatar
      KVM: MIPS: Add VZ & TE capabilities · a8a3c426
      James Hogan authored
      Add new KVM_CAP_MIPS_VZ and KVM_CAP_MIPS_TE capabilities, and in order
      to allow MIPS KVM to support VZ without confusing old users (which
      expect the trap & emulate implementation), define and start checking
      KVM_CREATE_VM type codes.
      
      The codes available are:
      
       - KVM_VM_MIPS_TE = 0
      
         This is the current value expected from the user, and will create a
         VM using trap & emulate in user mode, confined to the user mode
         address space. This may in future become unavailable if the kernel is
         only configured to support VZ, in which case the EINVAL error will be
         returned and KVM_CAP_MIPS_TE won't be available even though
         KVM_CAP_MIPS_VZ is.
      
       - KVM_VM_MIPS_VZ = 1
      
         This can be provided when the KVM_CAP_MIPS_VZ capability is available
         to create a VM using VZ, with a fully virtualized guest virtual
         address space. If VZ support is unavailable in the kernel, the EINVAL
         error will be returned (although old kernels without the
         KVM_CAP_MIPS_VZ capability may well succeed and create a trap &
         emulate VM).
      
      This is designed to allow the desired implementation (T&E vs VZ) to be
      potentially chosen at runtime rather than being fixed in the kernel
      configuration.
      Signed-off-by: default avatarJames Hogan <james.hogan@imgtec.com>
      Cc: Paolo Bonzini <pbonzini@redhat.com>
      Cc: "Radim Krčmář" <rkrcmar@redhat.com>
      Cc: Ralf Baechle <ralf@linux-mips.org>
      Cc: Jonathan Corbet <corbet@lwn.net>
      Cc: linux-mips@linux-mips.org
      Cc: kvm@vger.kernel.org
      Cc: linux-doc@vger.kernel.org
      a8a3c426
    • James Hogan's avatar
      KVM: MIPS: Extend counters & events for VZ GExcCodes · a7244920
      James Hogan authored
      Extend MIPS KVM stats counters and kvm_transition trace event codes to
      cover hypervisor exceptions, which have their own GExcCode field in
      CP0_GuestCtl0 with up to 32 hypervisor exception cause codes.
      Signed-off-by: default avatarJames Hogan <james.hogan@imgtec.com>
      Cc: Paolo Bonzini <pbonzini@redhat.com>
      Cc: "Radim Krčmář" <rkrcmar@redhat.com>
      Cc: Ralf Baechle <ralf@linux-mips.org>
      Cc: Steven Rostedt <rostedt@goodmis.org>
      Cc: Ingo Molnar <mingo@redhat.com>
      Cc: linux-mips@linux-mips.org
      Cc: kvm@vger.kernel.org
      a7244920
    • James Hogan's avatar
      KVM: MIPS: Update kvm_lose_fpu() for VZ · c58cf741
      James Hogan authored
      Update the implementation of kvm_lose_fpu() for VZ, where there is no
      need to enable the FPU/MSA in the root context if the FPU/MSA state is
      loaded but disabled in the guest context.
      
      The trap & emulate implementation needs to disable FPU/MSA in the root
      context when the guest disables them in order to catch the COP1 unusable
      or MSA disabled exception when they're used and pass it on to the guest.
      
      For VZ however as long as the context is loaded and enabled in the root
      context, the guest can enable and disable it in the guest context
      without the hypervisor having to do much, and will take guest exceptions
      without hypervisor intervention if used without being enabled in the
      guest context.
      Signed-off-by: default avatarJames Hogan <james.hogan@imgtec.com>
      Cc: Paolo Bonzini <pbonzini@redhat.com>
      Cc: "Radim Krčmář" <rkrcmar@redhat.com>
      Cc: Ralf Baechle <ralf@linux-mips.org>
      Cc: linux-mips@linux-mips.org
      Cc: kvm@vger.kernel.org
      c58cf741
    • James Hogan's avatar
      KVM: MIPS/Emulate: Implement 64-bit MMIO emulation · 59d7814a
      James Hogan authored
      Implement additional MMIO emulation for MIPS64, including 64-bit
      loads/stores, and 32-bit unsigned loads. These are only exposed on
      64-bit VZ hosts.
      Signed-off-by: default avatarJames Hogan <james.hogan@imgtec.com>
      Cc: Paolo Bonzini <pbonzini@redhat.com>
      Cc: "Radim Krčmář" <rkrcmar@redhat.com>
      Cc: Ralf Baechle <ralf@linux-mips.org>
      Cc: linux-mips@linux-mips.org
      Cc: kvm@vger.kernel.org
      59d7814a
    • James Hogan's avatar
      KVM: MIPS/Emulate: De-duplicate MMIO emulation · 8b48d5b7
      James Hogan authored
      Refactor MIPS KVM MMIO load/store emulation to reduce code duplication.
      Each duplicate differed slightly anyway, and it will simplify adding
      64-bit MMIO support for VZ.
      
      kvm_mips_emulate_store() and kvm_mips_emulate_load() can now return
      EMULATE_DO_MMIO (as possibly originally intended). We therefore stop
      calling either of these from kvm_mips_emulate_inst(), which is now only
      used by kvm_trap_emul_handle_cop_unusable() which is picky about return
      values.
      Signed-off-by: default avatarJames Hogan <james.hogan@imgtec.com>
      Cc: Paolo Bonzini <pbonzini@redhat.com>
      Cc: "Radim Krčmář" <rkrcmar@redhat.com>
      Cc: Ralf Baechle <ralf@linux-mips.org>
      Cc: linux-mips@linux-mips.org
      Cc: kvm@vger.kernel.org
      8b48d5b7
    • James Hogan's avatar
      KVM: MIPS: Implement HYPCALL emulation · 955d8dc3
      James Hogan authored
      Emulate the HYPCALL instruction added in the VZ ASE and used by the MIPS
      paravirtualised guest support that is already merged. The new hypcall.c
      handles arguments and the return value. No actual hypercalls are yet
      supported, but this still allows us to safely step over hypercalls and
      set an error code in the return value for forward compatibility.
      
      Non-zero HYPCALL codes are not handled.
      
      We also document the hypercall ABI which asm/kvm_para.h uses.
      Signed-off-by: default avatarJames Hogan <james.hogan@imgtec.com>
      Acked-by: default avatarRalf Baechle <ralf@linux-mips.org>
      Cc: Paolo Bonzini <pbonzini@redhat.com>
      Cc: "Radim Krčmář" <rkrcmar@redhat.com>
      Cc: Andreas Herrmann <andreas.herrmann@caviumnetworks.com>
      Cc: David Daney <david.daney@cavium.com>
      Cc: Jonathan Corbet <corbet@lwn.net>
      Cc: linux-mips@linux-mips.org
      Cc: kvm@vger.kernel.org
      Cc: linux-doc@vger.kernel.org
      955d8dc3
    • James Hogan's avatar
      MIPS: asm/tlb.h: Add UNIQUE_GUEST_ENTRYHI() macro · a6c09b9f
      James Hogan authored
      Add a distinct UNIQUE_GUEST_ENTRYHI() macro for invalidation of guest
      TLB entries by KVM, using addresses in KSeg1 rather than KSeg0. This
      avoids conflicts with guest invalidation routines when there is no EHINV
      bit to mark the whole entry as invalid, avoiding guest machine check
      exceptions on Cavium Octeon III.
      Signed-off-by: default avatarJames Hogan <james.hogan@imgtec.com>
      Acked-by: default avatarRalf Baechle <ralf@linux-mips.org>
      Cc: Paolo Bonzini <pbonzini@redhat.com>
      Cc: "Radim Krčmář" <rkrcmar@redhat.com>
      Cc: linux-mips@linux-mips.org
      Cc: kvm@vger.kernel.org
      a6c09b9f
    • James Hogan's avatar
      MIPS: Add some missing guest CP0 accessors & defs · eb0bab38
      James Hogan authored
      Add some missing guest accessors and register field definitions for KVM
      for MIPS VZ to make use of.
      
      Guest CP0_LLAddr register accessors and definitions for the LLB field
      allow KVM to clear the guest LLB to cancel in-progress LL/SC atomics on
      restore, and to emulate accesses by the guest to the CP0_LLAddr
      register.
      
      Bitwise modifiers and definitions for the guest CP0_Wired and
      CP0_Config1 registers allow KVM to modify fields within the CP0_Wired
      and CP0_Config1 registers.
      
      Finally a definition for the CP0_Config5.SBRI bit allows KVM to
      initialise and allow modification of the guest version of the SBRI bit.
      Signed-off-by: default avatarJames Hogan <james.hogan@imgtec.com>
      Acked-by: default avatarRalf Baechle <ralf@linux-mips.org>
      Cc: Paolo Bonzini <pbonzini@redhat.com>
      Cc: "Radim Krčmář" <rkrcmar@redhat.com>
      Cc: linux-mips@linux-mips.org
      Cc: kvm@vger.kernel.org
      eb0bab38
    • James Hogan's avatar
      MIPS: Probe guest MVH · a929bdc5
      James Hogan authored
      Probe for availablility of M{T,F}HC0 instructions used with e.g. XPA in
      the VZ guest context, and make it available via cpu_guest_has_mvh. This
      will be helpful in properly emulating the MAAR registers in KVM for MIPS
      VZ.
      Signed-off-by: default avatarJames Hogan <james.hogan@imgtec.com>
      Acked-by: default avatarRalf Baechle <ralf@linux-mips.org>
      Cc: Paolo Bonzini <pbonzini@redhat.com>
      Cc: "Radim Krčmář" <rkrcmar@redhat.com>
      Cc: linux-mips@linux-mips.org
      Cc: kvm@vger.kernel.org
      a929bdc5
    • James Hogan's avatar
      MIPS: Probe guest CP0_UserLocal · a7c7ad6c
      James Hogan authored
      Probe for presence of guest CP0_UserLocal register and expose via
      cpu_guest_has_userlocal. This register is optional pre-r6, so this will
      allow KVM to only save/restore/expose the guest CP0_UserLocal register
      if it exists.
      Signed-off-by: default avatarJames Hogan <james.hogan@imgtec.com>
      Acked-by: default avatarRalf Baechle <ralf@linux-mips.org>
      Cc: Paolo Bonzini <pbonzini@redhat.com>
      Cc: "Radim Krčmář" <rkrcmar@redhat.com>
      Cc: linux-mips@linux-mips.org
      Cc: kvm@vger.kernel.org
      a7c7ad6c
    • James Hogan's avatar
      MIPS: Separate MAAR V bit into VL and VH for XPA · f359a111
      James Hogan authored
      The MAAR V bit has been renamed VL since another bit called VH is added
      at the top of the register when it is extended to 64-bits on a 32-bit
      processor with XPA. Rename the V definition, fix the various users, and
      add definitions for the VH bit. Also add a definition for the MAARI
      Index field.
      Signed-off-by: default avatarJames Hogan <james.hogan@imgtec.com>
      Acked-by: default avatarRalf Baechle <ralf@linux-mips.org>
      Cc: Paul Burton <paul.burton@imgtec.com>
      Cc: Paolo Bonzini <pbonzini@redhat.com>
      Cc: "Radim Krčmář" <rkrcmar@redhat.com>
      Cc: linux-mips@linux-mips.org
      Cc: kvm@vger.kernel.org
      f359a111
    • James Hogan's avatar
      MIPS: Add defs & probing of UFR · 4e87580e
      James Hogan authored
      Add definitions and probing of the UFR bit in Config5. This bit allows
      user mode control of the FR bit (floating point register mode). It is
      present if the UFRP bit is set in the floating point implementation
      register.
      
      This is a capability KVM may want to expose to guest kernels, even
      though Linux is unlikely to ever use it due to the implications for
      multi-threaded programs.
      Signed-off-by: default avatarJames Hogan <james.hogan@imgtec.com>
      Acked-by: default avatarRalf Baechle <ralf@linux-mips.org>
      Cc: Paul Burton <paul.burton@imgtec.com>
      Cc: Paolo Bonzini <pbonzini@redhat.com>
      Cc: "Radim Krčmář" <rkrcmar@redhat.com>
      Cc: linux-mips@linux-mips.org
      Cc: kvm@vger.kernel.org
      4e87580e
  2. 20 Mar, 2017 5 commits
    • Linus Torvalds's avatar
      Linux 4.11-rc3 · 97da3854
      Linus Torvalds authored
      97da3854
    • Linus Torvalds's avatar
      mm/swap: don't BUG_ON() due to uninitialized swap slot cache · 452b94b8
      Linus Torvalds authored
      This BUG_ON() triggered for me once at shutdown, and I don't see a
      reason for the check.  The code correctly checks whether the swap slot
      cache is usable or not, so an uninitialized swap slot cache is not
      actually problematic afaik.
      
      I've temporarily just switched the BUG_ON() to a WARN_ON_ONCE(), since
      I'm not sure why that seemingly pointless check was there.  I suspect
      the real fix is to just remove it entirely, but for now we'll warn about
      it but not bring the machine down.
      
      Cc: "Huang, Ying" <ying.huang@intel.com>
      Cc: Tim Chen <tim.c.chen@linux.intel.com>
      Cc: Michal Hocko <mhocko@suse.com>
      Cc: Andrew Morton <akpm@linux-foundation.org>
      Signed-off-by: default avatarLinus Torvalds <torvalds@linux-foundation.org>
      452b94b8
    • Linus Torvalds's avatar
      Merge tag 'powerpc-4.11-5' of git://git.kernel.org/pub/scm/linux/kernel/git/powerpc/linux · a07a6e41
      Linus Torvalds authored
      Pull more powerpc fixes from Michael Ellerman:
       "A couple of minor powerpc fixes for 4.11:
      
         - wire up statx() syscall
      
         - don't print a warning on memory hotplug when HPT resizing isn't
           available
      
        Thanks to: David Gibson, Chandan Rajendra"
      
      * tag 'powerpc-4.11-5' of git://git.kernel.org/pub/scm/linux/kernel/git/powerpc/linux:
        powerpc/pseries: Don't give a warning when HPT resizing isn't available
        powerpc: Wire up statx() syscall
      a07a6e41
    • Linus Torvalds's avatar
      Merge branch 'parisc-4.11-2' of git://git.kernel.org/pub/scm/linux/kernel/git/deller/parisc-linux · 4571bc5a
      Linus Torvalds authored
      Pull parisc fixes from Helge Deller:
      
       - Mikulas Patocka added support for R_PARISC_SECREL32 relocations in
         modules with CONFIG_MODVERSIONS.
      
       - Dave Anglin optimized the cache flushing for vmap ranges.
      
       - Arvind Yadav provided a fix for a potential NULL pointer dereference
         in the parisc perf code (and some code cleanups).
      
       - I wired up the new statx system call, fixed some compiler warnings
         with the access_ok() macro and fixed shutdown code to really halt a
         system at shutdown instead of crashing & rebooting.
      
      * 'parisc-4.11-2' of git://git.kernel.org/pub/scm/linux/kernel/git/deller/parisc-linux:
        parisc: Fix system shutdown halt
        parisc: perf: Fix potential NULL pointer dereference
        parisc: Avoid compiler warnings with access_ok()
        parisc: Wire up statx system call
        parisc: Optimize flush_kernel_vmap_range and invalidate_kernel_vmap_range
        parisc: support R_PARISC_SECREL32 relocation in modules
      4571bc5a
    • Linus Torvalds's avatar
      Merge git://git.kernel.org/pub/scm/linux/kernel/git/nab/target-pending · 8aa34172
      Linus Torvalds authored
      Pull SCSI target fixes from Nicholas Bellinger:
       "The bulk of the changes are in qla2xxx target driver code to address
        various issues found during Cavium/QLogic's internal testing (stable
        CC's included), along with a few other stability and smaller
        miscellaneous improvements.
      
        There are also a couple of different patch sets from Mike Christie,
        which have been a result of his work to use target-core ALUA logic
        together with tcm-user backend driver.
      
        Finally, a patch to address some long standing issues with
        pass-through SCSI export of TYPE_TAPE + TYPE_MEDIUM_CHANGER devices,
        which will make folks using physical (or virtual) magnetic tape happy"
      
      * git://git.kernel.org/pub/scm/linux/kernel/git/nab/target-pending: (28 commits)
        qla2xxx: Update driver version to 9.00.00.00-k
        qla2xxx: Fix delayed response to command for loop mode/direct connect.
        qla2xxx: Change scsi host lookup method.
        qla2xxx: Add DebugFS node to display Port Database
        qla2xxx: Use IOCB interface to submit non-critical MBX.
        qla2xxx: Add async new target notification
        qla2xxx: Export DIF stats via debugfs
        qla2xxx: Improve T10-DIF/PI handling in driver.
        qla2xxx: Allow relogin to proceed if remote login did not finish
        qla2xxx: Fix sess_lock & hardware_lock lock order problem.
        qla2xxx: Fix inadequate lock protection for ABTS.
        qla2xxx: Fix request queue corruption.
        qla2xxx: Fix memory leak for abts processing
        qla2xxx: Allow vref count to timeout on vport delete.
        tcmu: Convert cmd_time_out into backend device attribute
        tcmu: make cmd timeout configurable
        tcmu: add helper to check if dev was configured
        target: fix race during implicit transition work flushes
        target: allow userspace to set state to transitioning
        target: fix ALUA transition timeout handling
        ...
      8aa34172
  3. 19 Mar, 2017 15 commits
  4. 18 Mar, 2017 8 commits
    • Nicholas Bellinger's avatar
      tcmu: Convert cmd_time_out into backend device attribute · 7d7a7435
      Nicholas Bellinger authored
      Instead of putting cmd_time_out under ../target/core/user_0/foo/control,
      which has historically been used by parameters needed for initial
      backend device configuration, go ahead and move cmd_time_out into
      a backend device attribute.
      
      In order to do this, tcmu_module_init() has been updated to create
      a local struct configfs_attribute **tcmu_attrs, that is based upon
      the existing passthrough_attrib_attrs along with the new cmd_time_out
      attribute.  Once **tcm_attrs has been setup, go ahead and point
      it at tcmu_ops->tb_dev_attrib_attrs so it's picked up by target-core.
      
      Also following MNC's previous change, ->cmd_time_out is stored in
      milliseconds but exposed via configfs in seconds.  Also, note this
      patch restricts the modification of ->cmd_time_out to before +
      after the TCMU device has been configured, but not while it has
      active fabric exports.
      
      Cc: Mike Christie <mchristi@redhat.com>
      Signed-off-by: default avatarNicholas Bellinger <nab@linux-iscsi.org>
      7d7a7435
    • Mike Christie's avatar
      tcmu: make cmd timeout configurable · af980e46
      Mike Christie authored
      A single daemon could implement multiple types of devices
      using multuple types of real devices that may not support
      restarting from crashes and/or handling tcmu timeouts. This
      makes the cmd timeout configurable, so handlers that do not
      support it can turn if off for now.
      Signed-off-by: default avatarMike Christie <mchristi@redhat.com>
      Signed-off-by: default avatarNicholas Bellinger <nab@linux-iscsi.org>
      af980e46
    • Mike Christie's avatar
      tcmu: add helper to check if dev was configured · 972c7f16
      Mike Christie authored
      This adds a helper to check if the dev was configured. It
      will be used in the next patch to prevent updates to some
      config settings after the device has been setup.
      Signed-off-by: default avatarMike Christie <mchristi@redhat.com>
      Signed-off-by: default avatarNicholas Bellinger <nab@linux-iscsi.org>
      972c7f16
    • Linus Torvalds's avatar
      Merge tag 'openrisc-for-linus' of git://github.com/openrisc/linux · 93afaa45
      Linus Torvalds authored
      Pull OpenRISC fixes from Stafford Horne:
       "OpenRISC fixes for build issues that were exposed by kbuild robots
        after 4.11 merge. All from allmodconfig builds. This includes:
      
         - bug in the handling of 8-byte get_user() calls
      
         - module build failure due to multile missing symbol exports"
      
      * tag 'openrisc-for-linus' of git://github.com/openrisc/linux:
        openrisc: Export symbols needed by modules
        openrisc: fix issue handling 8 byte get_user calls
        openrisc: xchg: fix `computed is not used` warning
      93afaa45
    • Mike Christie's avatar
      target: fix race during implicit transition work flushes · 760bf578
      Mike Christie authored
      This fixes the following races:
      
      1. core_alua_do_transition_tg_pt could have read
      tg_pt_gp_alua_access_state and gone into this if chunk:
      
      if (!explicit &&
              atomic_read(&tg_pt_gp->tg_pt_gp_alua_access_state) ==
                 ALUA_ACCESS_STATE_TRANSITION) {
      
      and then core_alua_do_transition_tg_pt_work could update the
      state. core_alua_do_transition_tg_pt would then only set
      tg_pt_gp_alua_pending_state and the tg_pt_gp_alua_access_state would
      not get updated with the second calls state.
      
      2. core_alua_do_transition_tg_pt could be setting
      tg_pt_gp_transition_complete while the tg_pt_gp_transition_work
      is already completing. core_alua_do_transition_tg_pt then waits on the
      completion that will never be called.
      
      To handle these issues, we just call flush_work which will return when
      core_alua_do_transition_tg_pt_work has completed so there is no need
      to do the complete/wait. And, if core_alua_do_transition_tg_pt_work
      was running, instead of trying to sneak in the state change, we just
      schedule up another core_alua_do_transition_tg_pt_work call.
      
      Note that this does not handle a possible race where there are multiple
      threads call core_alua_do_transition_tg_pt at the same time. I think
      we need a mutex in target_tg_pt_gp_alua_access_state_store.
      Signed-off-by: default avatarMike Christie <mchristi@redhat.com>
      Signed-off-by: default avatarNicholas Bellinger <nab@linux-iscsi.org>
      760bf578
    • Mike Christie's avatar
      target: allow userspace to set state to transitioning · 1ca4d4fa
      Mike Christie authored
      Userspace target_core_user handlers like tcmu-runner may want to set the
      ALUA state to transitioning while it does implicit transitions. This
      patch allows that state when set from configfs.
      Signed-off-by: default avatarMike Christie <mchristi@redhat.com>
      Signed-off-by: default avatarNicholas Bellinger <nab@linux-iscsi.org>
      1ca4d4fa
    • Mike Christie's avatar
      target: fix ALUA transition timeout handling · d7175373
      Mike Christie authored
      The implicit transition time tells initiators the min time
      to wait before timing out a transition. We currently schedule
      the transition to occur in tg_pt_gp_implicit_trans_secs
      seconds so there is no room for delays. If
      core_alua_do_transition_tg_pt_work->core_alua_update_tpg_primary_metadata
      needs to write out info to a remote file, then the initiator can
      easily time out the operation.
      Signed-off-by: default avatarMike Christie <mchristi@redhat.com>
      Signed-off-by: default avatarNicholas Bellinger <nab@linux-iscsi.org>
      d7175373
    • Mike Christie's avatar
      target: Use system workqueue for ALUA transitions · 207ee841
      Mike Christie authored
      If tcmu-runner is processing a STPG and needs to change the kernel's
      ALUA state then we cannot use the same work queue for task management
      requests and ALUA transitions, because we could deadlock. The problem
      occurs when a STPG times out before tcmu-runner is able to
      call into target_tg_pt_gp_alua_access_state_store->
      core_alua_do_port_transition -> core_alua_do_transition_tg_pt ->
      queue_work. In this case, the tmr is on the work queue waiting for
      the STPG to complete, but the STPG transition is now queued behind
      the waiting tmr.
      
      Note:
      This bug will also be fixed by this patch:
      http://www.spinics.net/lists/target-devel/msg14560.html
      which switches the tmr code to use the system workqueues.
      
      For both, I am not sure if we need a dedicated workqueue since
      it is not a performance path and I do not think we need WQ_MEM_RECLAIM
      to make forward progress to free up memory like the block layer does.
      Signed-off-by: default avatarMike Christie <mchristi@redhat.com>
      Signed-off-by: default avatarNicholas Bellinger <nab@linux-iscsi.org>
      207ee841