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  1. 18 Oct, 2008 1 commit
  2. 14 Oct, 2008 1 commit
  3. 10 Oct, 2008 2 commits
  4. 02 Sep, 2008 1 commit
  5. 01 Sep, 2008 1 commit
  6. 10 Aug, 2008 2 commits
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  9. 11 Jul, 2008 1 commit
  10. 07 Jun, 2008 2 commits
  11. 04 Jun, 2008 1 commit
  12. 23 Apr, 2008 1 commit
  13. 22 Apr, 2008 2 commits
    • Anton Vorontsov's avatar
      [MTD] [NAND] FSL UPM NAND driver · 5c249c5a
      Anton Vorontsov authored
      This is very simple driver, NAND is connected through localbus,
      and User-Programmable Machine is doing various adjustments to
      speak NAND. No special efforts needed to do read and write cycles,
      though to control ALE and CLE phases, we ask UPM to generate exact
      pre-programmed signals on the localbus lines.
      Signed-off-by: default avatarAnton Vorontsov <avorontsov@ru.mvista.com>
      Signed-off-by: default avatarDavid Woodhouse <dwmw2@infradead.org>
      5c249c5a
    • eric miao's avatar
      [MTD] [NAND] support for pxa3xx · fe69af00
      eric miao authored
      This is preliminary since:
      
      1. It supports only _one_ chip select at the moment. As there is no
         existing platforms available using two chip selects of the NAND
         controller, it shall really not include code for supporting the
         2nd chip select for now, as such code cannot be verified.
      
      2. It resorts to the default and simpliest memory based badblock
         table
      
      3. Only limited types of nand flash are currently supported. Most
         PXA3xx processors come with on-chip NAND flash dies, so there
         isn't much flexibility for other types of NAND.
      
      4. The NAND controller should be configured to detect the device's
         ID, thus making it difficult to use nand_scan_ident() to assist
         the detection process (though it's not impossible)
      
      TODO: fix all the above limitations of cuz :-)
      Signed-off-by: default avatareric miao <eric.miao@marvell.com>
      Cc: Sergey Podstavin <spodstavin@ru.mvista.com>
      Signed-off-by: default avatarDavid Woodhouse <dwmw2@infradead.org>
      fe69af00
  14. 27 Mar, 2008 1 commit
  15. 07 Feb, 2008 1 commit
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  17. 29 Nov, 2007 1 commit
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  20. 13 Oct, 2007 1 commit
    • Bryan Wu's avatar
      [MTD] [NAND] Blackfin on-chip NAND Flash Controller driver · b37bde14
      Bryan Wu authored
      This is the driver for latest Blackfin on-chip nand flash controller
      
       - use nand_chip and mtd_info common nand driver interface
       - provide both PIO and dma operation
       - compiled with ezkit bf548 configuration
       - use hardware 1-bit ECC
       - tested with YAFFS2 and can mount YAFFS2 filesystem as rootfs
      
      ChangeLog from try#1
       - use hweight32() instead of count_bits()
       - replace bf54x with bf5xx and BF54X with BF5XX
       - compare against plat->page_size in 2 cases when enable hardware ECC
      
      ChangeLog from try#2
       - passed nand_test suites
       - use cpu_relax() instead of busy wait loop
       - some coding style issue pointed out by Andrew
      Signed-off-by: default avatarBryan Wu <bryan.wu@analog.com>
      Signed-off-by: default avatarAndrew Morton <akpm@linux-foundation.org>
      Signed-off-by: default avatarDavid Woodhouse <dwmw2@infradead.org>
      b37bde14
  21. 29 Aug, 2007 1 commit
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  35. 21 Oct, 2006 1 commit