- 19 Oct, 2007 33 commits
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Andi Kleen authored
gcc 3.2+ supports __builtin_prefetch, so it's possible to use it on all architectures. Change the generic fallback in linux/prefetch.h to use it instead of noping it out. gcc should do the right thing when the architecture doesn't support prefetching Undefine the x86-64 inline assembler version and use the fallback. Signed-off-by: Andi Kleen <ak@suse.de> Signed-off-by: Ingo Molnar <mingo@elte.hu> Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
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Stephane Eranian authored
Here is a small patch to change the behavior of the PMU msr allocator to avoid BUG_ON() when the MSR is unknwon. Instead, it now returns ok, which means "I do not manage". The current allocator is not yet managing the full set of PMU registers (e.g., GLOBAL_* on Core 2). [watchdog] do not BUG_ON() in the MSR allocator if MSR is unknown, return ok instead Signed-off-by: Stephane Eranian <eranian@hpl.hp.com> Signed-off-by: Andi Kleen <ak@suse.de> Signed-off-by: Ingo Molnar <mingo@elte.hu> Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
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Mike Travis authored
This is from an earlier message from Christoph Lameter: processor_core.c currently tries to determine the apicid by special casing for IA64 and x86. The desired information is readily available via cpu_physical_id() on IA64, i386 and x86_64. Signed-off-by: Christoph Lameter <clameter@sgi.com> Additionally, boot_cpu_id needed to be exported to fix compile errors in dma code when !CONFIG_SMP. Signed-off-by: Mike Travis <travis@sgi.com> Cc: Andi Kleen <ak@suse.de> Cc: Christoph Lameter <clameter@sgi.com> Cc: "Siddha, Suresh B" <suresh.b.siddha@intel.com> Cc: Len Brown <lenb@kernel.org> Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
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Mike Travis authored
Convert cpu_llc_id from a static array sized by NR_CPUS to a per_cpu variable. This saves sizeof(cpu_llc_id) * NR unused cpus. Access is mostly from startup and CPU HOTPLUG functions. Note there's an additional change of the type of cpu_llc_id from int to u8 for ARCH i386 to correspond with the same type in ARCH x86_64. Signed-off-by: Mike Travis <travis@sgi.com> Cc: Andi Kleen <ak@suse.de> Cc: Christoph Lameter <clameter@sgi.com> Cc: "Siddha, Suresh B" <suresh.b.siddha@intel.com> Signed-off-by: Andrew Morton <akpm@linux-foundation.org> Signed-off-by: Ingo Molnar <mingo@elte.hu> Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
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Mike Travis authored
This patch converts the x86_cpu_to_apicid array to be a per cpu variable. This saves sizeof(apicid) * NR unused cpus. Access is mostly from startup and CPU HOTPLUG functions. MP_processor_info() is one of the functions that require access to the x86_cpu_to_apicid array before the per_cpu data area is setup. For this case, a pointer to the __initdata array is initialized in setup_arch() and removed in smp_prepare_cpus() after the per_cpu data area is initialized. A second change is included to change the initial array value of ARCH i386 from 0xff to BAD_APICID to be consistent with ARCH x86_64. Signed-off-by: Mike Travis <travis@sgi.com> Cc: Andi Kleen <ak@suse.de> Cc: Christoph Lameter <clameter@sgi.com> Cc: "Siddha, Suresh B" <suresh.b.siddha@intel.com> Signed-off-by: Andrew Morton <akpm@linux-foundation.org> Signed-off-by: Ingo Molnar <mingo@elte.hu> Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
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Rusty Russell authored
This simplifies the io_apic.c __assign_irq_vector() logic and removes the explicit SYSCALL_VECTOR check, and also allows for vectors to be reserved by other mechanisms (ie. lguest). [ tglx: arch/x86 adaptation ] Signed-off-by: Rusty Russell <rusty@rustcorp.com.au> Signed-off-by: Andi Kleen <ak@suse.de> Signed-off-by: Ingo Molnar <mingo@elte.hu> Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
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Andi Kleen authored
Don't want any lockdep or other fragile machinery to run during oopses. Use raw spinlocks directly for oops locking. Also disables irq flag tracing there. [ tglx: arch/x86 adaptation ] Signed-off-by: Andi Kleen <ak@suse.de> Signed-off-by: Ingo Molnar <mingo@elte.hu> Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
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Jan Beulich authored
[ tglx: arch/x86 adaptation ] Signed-off-by: Jan Beulich <jbeulich@novell.com> Signed-off-by: Andi Kleen <ak@suse.de> Signed-off-by: Ingo Molnar <mingo@elte.hu> Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
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Akinobu Mita authored
Do cpuid_device_create() in CPU_UP_PREPARE instead of CPU_ONLINE. [ tglx: arch/x86 adaptation ] Cc: "H. Peter Anvin" <hpa@zytor.com> Signed-off-by: Akinobu Mita <akinobu.mita@gmail.com> Signed-off-by: Andi Kleen <ak@suse.de> Cc: Gautham R Shenoy <ego@in.ibm.com> Cc: Oleg Nesterov <oleg@tv-sign.ru> Signed-off-by: Andrew Morton <akpm@linux-foundation.org> Signed-off-by: Ingo Molnar <mingo@elte.hu> Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
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Laurent Vivier authored
This patch defines the missing function smp_call_function_mask() for x86_64, this is more or less a cut&paste of i386 function. It removes also some duplicate code. This function is needed by KVM to execute a function on some CPUs. AK: Fixed description AK: Moved WARN_ON(irqs_disabled) one level up to not warn in the panic case. [ tglx: arch/x86 adaptation ] Signed-off-by: Laurent Vivier <Laurent.Vivier@bull.net> Signed-off-by: Andi Kleen <ak@suse.de> Signed-off-by: Ingo Molnar <mingo@elte.hu> Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
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Glauber de Oliveira Costa authored
This patch provides a new set of functions for managing the descriptor tables that can be used instead of putting the raw assembly in .c files. Remodeling of store_tr() suggested by Frederik Deweerdt. [ tglx: arch/x86 adaptation ] Signed-off-by: Glauber de Oliveira Costa <gcosta@redhat.com> Signed-off-by: Andi Kleen <ak@suse.de> Signed-off-by: Andrew Morton <akpm@linux-foundation.org> Signed-off-by: Ingo Molnar <mingo@elte.hu> Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
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Pavel Emelyanov authored
Both functions printk the same information, except for CRx and debug registers in the show_registers() one and a bit different manner. So move the common code into one place. This is already done for x86_64, so I think it's worth having the same on i386. This saves 100 bytes of .rodata section :) ... but only 8 from .text :( [ tglx: arch/x86 adaptation ] Signed-off-by: Pavel Emelyanov <xemul@openvz.org> Signed-off-by: Andi Kleen <ak@suse.de> Signed-off-by: Ingo Molnar <mingo@elte.hu> Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
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Jan Blunck authored
This patch improves oprofile callgraphs for i386/x86_64. The old backtracing code was unable to produce kernel backtraces if the kernel wasn't compiled with framepointers. The code now uses dump_trace(). [ tglx: arch/x86 adaptation ] Signed-off-by: Jan Blunck <jblunck@suse.de> Signed-off-by: Andi Kleen <ak@suse.de> Signed-off-by: Ingo Molnar <mingo@elte.hu> Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
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Andi Kleen authored
[ tglx: arch/x86 adaptation ] Signed-off-by: Andi Kleen <ak@suse.de> Signed-off-by: Ingo Molnar <mingo@elte.hu> Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
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Stephane Eranian authored
[i386] add AMD Barcelona PMU MSR definitions AK: Not used right now, but will presumably at some point. [ tglx: arch/x86 adaptation ] Signed-off-by: Stephane Eranian <eranian@hpl.hp.com> Signed-off-by: Robert Richter <robert.richter@amd.com> Signed-off-by: Andi Kleen <ak@suse.de> Signed-off-by: Ingo Molnar <mingo@elte.hu> Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
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Andi Kleen authored
They were already very similar; just use the same file now. [ tglx: arch/x86 adaptation ] Cc: lenb@kernel.org Signed-off-by: Andi Kleen <ak@suse.de> Signed-off-by: Ingo Molnar <mingo@elte.hu> Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
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Udo A. Steinberg authored
ICH3 and ICH4 have undocumented HPET capabilities. This patch enables HPET for platforms based around these ICHs. Tested on various ICH3 and ICH4 platforms. Because HPET is not officially documented for ICH3/4 and may not have been validated by chipset folks, we're on thin ice here. I'd recommend testing this patch in -hrt or -mm for a while and wait for success/failure reports before feeding it upstream. tglx: depends on the force_hpet command line option ! Signed-off-by: Udo A. Steinberg <us15@os.inf.tu-dresden.de> Signed-off-by: Ingo Molnar <mingo@elte.hu> Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
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Udo A. Steinberg authored
This patch adds quirks to force enable HPET on Via VT8235 and VT8237 chipsets. The datasheet for 8237 documents HPET functionality (although wrongly) whereas HPET is undocumented for 8235. Tested on A7V880 (8237) and K7VT4A+ (8235) boards. tglx: depends on the force_hept commandline option Signed-off-by: Udo A. Steinberg <us15@os.inf.tu-dresden.de> Cc: Venkatesh Pallipadi <venkatesh.pallipadi@intel.com> Cc: Andi Kleen <ak@suse.de> Cc: john stultz <johnstul@us.ibm.com> Cc: Greg KH <greg@kroah.com> Signed-off-by: Andrew Morton <akpm@linux-foundation.org> Signed-off-by: Ingo Molnar <mingo@elte.hu> Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
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Thomas Gleixner authored
add force_hpet boot option. (this will be useful to make the forced-enable quirks depend on.) Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Signed-off-by: Ingo Molnar <mingo@elte.hu>
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Thomas Gleixner authored
Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Signed-off-by: Ingo Molnar <mingo@elte.hu>
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Andi Kleen authored
don't zero pad addresses in segfault message. Matches the other trap messages. This leaves some more space for the new file name. [ mingo: arch/x86 adaptation ] Signed-off-by: Andi Kleen <ak@suse.de> Signed-off-by: Ingo Molnar <mingo@elte.hu> Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
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Roland McGrath authored
This makes x86-64's ia32 code use the new linux/elfcore-compat.h, reducing some hand-copied duplication. Signed-off-by: Roland McGrath <roland@redhat.com> Cc: Benjamin Herrenschmidt <benh@kernel.crashing.org> Cc: Paul Mackerras <paulus@samba.org> Cc: Andi Kleen <ak@suse.de> Cc: "Luck, Tony" <tony.luck@intel.com> Signed-off-by: Andrew Morton <akpm@linux-foundation.org> Signed-off-by: Ingo Molnar <mingo@elte.hu> Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
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Hiroshi Shimamoto authored
Merge init_task_32/64.c. Move 64bit per cpu data orig_ist to setup64.c. [ mingo: fixed checkpatch trivialities. ] Signed-off-by: Hiroshi Shimamoto <h-shimamoto@ct.jp.nec.com> Signed-off-by: Ingo Molnar <mingo@elte.hu> Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
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Andi Kleen authored
Old debugging code that is not really needed anymore. If someone wants it it would be better replaced with a systemtap script or kprobe. This avoids a potential cache miss during page fault processing. [ mingo: arch/x86 adaptation ] Signed-off-by: Andi Kleen <ak@suse.de> Signed-off-by: Ingo Molnar <mingo@elte.hu> Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
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Adrian Knoth authored
The helptext for IA32_EMULATION in arch/x86_64/Kconfig is wider than 80 chars, thus failing to be displayed in 80x24 screens. This patch re-breaks lines. Signed-off-by: Adrian Knoth <adi@drcomp.erfurt.thur.de>
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Thomas Gleixner authored
Move the 64bit Kconfig file to arch/x86/kernel/cpu/cpufreq, so we can unify them. Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
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Andres Salomon authored
Simple cosmetic update for the cs5536 reboot fixup; define the MSR that's used for rebooting in geode.h, and use the define. Signed-off-by: Andres Salomon <dilinger@debian.org> Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Signed-off-by: Ingo Molnar <mingo@elte.hu>
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Ingo Molnar authored
x86 NUMA kernels crash in the scheduler setup code if "nosmp" or "maxcpus=0" is passed on the boot command line: | Brought up 1 CPUs | BUG: unable to handle kernel NULL pointer dereference at virtual address 00000000 | printing eip: c011f0b5 *pde = 00000000 | Oops: 0000 [#1] SMP | | Pid: 1, comm: swapper Not tainted (2.6.23 #67) | EIP: 0060:[<c011f0b5>] EFLAGS: 00010246 CPU: 0 | EIP is at sd_degenerate+0x35/0x40 the reason is sloppy spaghetti code in smpboot_32.c that resulted in a missing map_cpu_to_logical_apicid() call - which also had the side-effect of setting up the cpu_2_node[] entry for the lone CPU. That resulted in node_to_cpumask(0) resulting in 00000000 - confusing the sched-domains setup code. Signed-off-by: Ingo Molnar <mingo@elte.hu> Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
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Sam Ravnborg authored
Use relative symlinks so we can refer bzImage from different tree structures aka via NFS. Moved the creation of directory + symlink after a successful build of the boot parts. Signed-off-by: Sam Ravnborg <sam@ravnborg.org> Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Signed-off-by: Ingo Molnar <mingo@elte.hu>
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Siddha, Suresh B authored
Appended patch fixes an oops while changing the vsyscall sysctl. I am sure no one tested this code before integrating into mainline :( BTW, using ioremap() in vsyscall_sysctl_change() to get the virtual address of a kernel symbol sounds like an over kill.. I wonder if we can define a simple __va_vsymbol() which will return directly the kernel direct mapping. comments in the code which says gcc has trouble with __va(__pa()) sounds bogus to me. __pa() on a vsyscall address will not work anyhow :( And also, the whole nop out syscall in vsyscall page infrastructure (vsyscall_sysctl_change()) is added to make some attacks difficult, and yet I don't see this nop out being done by default. This area requires more cleanups? Fix an oops with __pa_vsymbol(). VSYSCALL_FIRST_PAGE is a fixmap index. We want the starting virtual address of the vsyscall page and not the index. [ mingo: arch/x86 adaptation ] Reported-by: Yanmin Zhang <yanmin.zhang@intel.com> Signed-off-by: Suresh Siddha <suresh.b.siddha@intel.com> Signed-off-by: Ingo Molnar <mingo@elte.hu> Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
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Thomas Gleixner authored
vdso / vsycall create .so.dbg files now. Add *.so.dbg to the main .ignore file Exclude the compile time created boot directory in arch/x86_64 as well Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Signed-off-by: Ingo Molnar <mingo@elte.hu>
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Ingo Molnar authored
While we were reviewing pageattr_32/64.c for unification, Thomas Gleixner noticed the following serious SMP bug in global_flush_tlb(): down_read(&init_mm.mmap_sem); list_replace_init(&deferred_pages, &l); up_read(&init_mm.mmap_sem); this is SMP-unsafe because list_replace_init() done on two CPUs in parallel can corrupt the list. This bug has been introduced about a year ago in the 64-bit tree: commit ea7322de Author: Andi Kleen <ak@suse.de> Date: Thu Dec 7 02:14:05 2006 +0100 [PATCH] x86-64: Speed and clean up cache flushing in change_page_attr down_read(&init_mm.mmap_sem); - dpage = xchg(&deferred_pages, NULL); + list_replace_init(&deferred_pages, &l); up_read(&init_mm.mmap_sem); the xchg() based version was SMP-safe, but list_replace_init() is not. So this "cleanup" introduced a nasty bug. why this bug never become prominent is a mystery - it can probably be explained with the (still) relative obscurity of the x86_64 architecture. the safe fix for now is to write-lock init_mm.mmap_sem. Signed-off-by: Ingo Molnar <mingo@elte.hu> Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
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Linus Torvalds authored
* 'upstream-linus' of master.kernel.org:/pub/scm/linux/kernel/git/jgarzik/netdev-2.6: pcnet32: remove private net_device_stats structure vortex_up should initialize "err" pcnet32: remove compile warnings in non-napi mode pcnet32: fix non-napi packet reception fix EMAC driver for proper napi_synchronize API sky2: shutdown cleanup napi_synchronize: waiting for NAPI forcedeth msi bugfix gianfar: fix obviously wrong #ifdef CONFIG_GFAR_NAPI placement fs_enet: Update for API changes gianfar: remove orphan struct. forcedeth: fix rx-work condition in nv_rx_process_optimized() too
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- 18 Oct, 2007 7 commits
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Linus Torvalds authored
* master.kernel.org:/pub/scm/linux/kernel/git/bart/ide-2.6: (37 commits) ide: set drive->autotune in ide_pci_setup_ports() triflex: always tune PIO opti621: always tune PIO cy82c693: always tune PIO cs5520: always tune PIO alim15x3: always tune PIO ide: add IDE_HFLAG_LEGACY_IRQS host flag ide: add IDE_HFLAG_SERIALIZE host flag ide: add IDE_HFLAG_ERROR_STOPS_FIFO host flag piix: add DECLARE_ICH_DEV() macro pdc202xx_old: add DECLARE_PDC2026X_DEV() macro pdc202xx_new: add DECLARE_PDCNEW_DEV() macro aec62xx: no need to disable UDMA in ->init_hwif method for ATP850UF ide: remove .init_setup from ide_pci_device_t serverworks: remove ->init_setup scc_pata: remove ->init_setup pdc202xx_old: remove ->init_setup pdc202xx_new: remove ->init_setup hpt366: remove ->init_setup cmd64x: remove ->init_setup ...
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Bartlomiej Zolnierkiewicz authored
Majority of host drivers using IDE PCI layer set drive->autotune, the only exceptions are: generic.c ns87415.c rz1000.c trm290.c * no ->set_pio_mode method it821x.c: * if memory allocation fails drive->autotune won't be set (but there also won't be ->set_pio_mode method in such case) piix.c: * MPIIX controller (no ->init_hwif method so also no ->set_pio_mode method) However if there is no ->set_pio_mode method there are no changes in behavior w.r.t. PIO tuning so always set drive->autotune in ide_pci_setup_ports(). Signed-off-by: Bartlomiej Zolnierkiewicz <bzolnier@gmail.com>
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Bartlomiej Zolnierkiewicz authored
Signed-off-by: Bartlomiej Zolnierkiewicz <bzolnier@gmail.com>
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Bartlomiej Zolnierkiewicz authored
Signed-off-by: Bartlomiej Zolnierkiewicz <bzolnier@gmail.com>
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Bartlomiej Zolnierkiewicz authored
Signed-off-by: Bartlomiej Zolnierkiewicz <bzolnier@gmail.com>
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Bartlomiej Zolnierkiewicz authored
Since cs5520 uses VDMA best PIO mode was tuned anyway by ide_dma_check() but only if DMA was successfully initialized. Signed-off-by: Bartlomiej Zolnierkiewicz <bzolnier@gmail.com>
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Bartlomiej Zolnierkiewicz authored
Signed-off-by: Bartlomiej Zolnierkiewicz <bzolnier@gmail.com>
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