- 25 Nov, 2010 3 commits
-
-
Chris Wilson authored
Signed-off-by:Chris Wilson <chris@chris-wilson.co.uk>
-
Chris Wilson authored
With KMS, we can simply relinquish the fence when we idle the GPU and reassign it upon first use. Signed-off-by: -
Daniel Vetter authored
Not employed just yet... Signed-off-by:
Daniel Vetter <daniel.vetter@ffwll.ch> Signed-off-by:
-
- 24 Nov, 2010 2 commits
-
-
Chris Wilson authored
Based on a patch by Daniel Vetter. Signed-off-by: -
Chris Wilson authored
Avoid evicting buffers that will be used later in the batch in order to make room for the initial buffers by pinning all bound buffers in a single pass before binding (and evicting for) fresh buffer. Signed-off-by:
-
- 23 Nov, 2010 31 commits
-
-
Chris Wilson authored
Signed-off-by: -
Chris Wilson authored
... reduce the frequency of checking to further reduce the wakeups and CPU overhead. Signed-off-by: -
Chris Wilson authored
This used to check the precondition that all fences were to be located in a mappable area, redundant now as those two parameters are combined into one. After pinning, we assert that the buffer is bound into the desired region. Signed-off-by: -
Chris Wilson authored
The pipe control object is allocated by the device for the sole use of the render ringbuffer. Move this detail from the general code to the render ring buffer initialisation. Signed-off-by: -
Chris Wilson authored
Having seen the effects of erroneous fencing on the batchbuffer, a useful sanity check is to record the fence registers at the time of an error. Signed-off-by: -
Chris Wilson authored
drivers/char/agp/intel-gtt.c:340:48: warning: duplicate const Signed-off-by: -
Chris Wilson authored
Combining map_and_fenceable revealed a bug in i915_gem_object_gtt_size() in that it always computed the appropriate fence size for the object regardless of tiling state which caused us to over-allocate linear buffers when binding to the GTT. Signed-off-by: -
Chris Wilson authored
A glorified s/obj_priv/obj/ with a net reduction of over a 100 lines and many characters! Signed-off-by: -
Daniel Vetter authored
Signed-off-by:
-
Daniel Vetter authored
Just some minor shuffling to get rid of any agp traces in the exported functions. Signed-off-by:
-
Daniel Vetter authored
No more drm_*_agp in i915_gem.c! Signed-off-by:
-
Daniel Vetter authored
Its only user, intel-gtt.c is now gone. Cc: Dave Airlie <airlied@gmail.com> Signed-off-by:
-
Daniel Vetter authored
This still uses the agp functions to actually reinstate the mappings (with a gross hack to make agp cooperate), but it wires everything up correctly for the switchover. The call to agp_rebind_memory can be dropped because all non-kms drivers do all their rebinding on EnterVT. v2: Be more paranoid and flush the chipset cache after restoring gtt mappings. Signed-off-by:
-
Daniel Vetter authored
This is required to restore gtt mappings on resume when agp is gone. The right way to do this would be to make sturct drm_mm_node embeddable and use the allocation list maintained by the drm memory manager. But that's a bigger project. Getting rid of the per bo agp_mem will save more memory than this wastes, anyway. Signed-off-by:
-
Daniel Vetter authored
The intel drm calls the chipset functions now directly. Userspace never called the corresponding ioctl, hence it can be killed, too. Cc: Dave Airlie <airlied@gmail.com> Signed-off-by:
-
Daniel Vetter authored
No longer used. Cc: Dave Airlie <airlied@gmail.com> Signed-off-by:
-
Daniel Vetter authored
Signed-off-by:
-
Daniel Vetter authored
... and a few other defines. Signed-off-by:
-
Daniel Vetter authored
Now the intel-gtt.c rewrite is complete! Signed-off-by:
-
Daniel Vetter authored
Still a separate agp_bridge_driver because of the i81x-only dedicated vram support. Signed-off-by:
-
Daniel Vetter authored
Initialization is still done with the old code with a few added things sprinkled in to make the intel_fake_agp helper functions work. Signed-off-by:
-
Daniel Vetter authored
Used for the now dead agp type_to_mask stuff. Signed-off-by:
-
Daniel Vetter authored
i830_check_flags already disallows it, so no need to implement it in the write_entry function. Seems to be a remnant from i810 support. Signed-off-by:
-
Chris Wilson authored
-
Chris Wilson authored
Currently if we hit a pagefault when applying a user relocation for the execbuffer, we bail and return EFAULT to the application. Instead, we need to unwind, drop the dev->struct_mutex, copy all the relocation entries to a vmalloc array (to avoid any potential circular deadlocks when resolving the pagefault), retake the mutex and then apply the relocations. Afterwards, we need to again drop the lock and copy the vmalloc array back to userspace. v2: Incorporate feedback from Daniel Vetter. Reported-by:
-
Chris Wilson authored
... and no need to perform a linear search for the index. Signed-off-by: -
Chris Wilson authored
Signed-off-by: -
Chris Wilson authored
Now that the stolen memory does not also steal entries from the GTT, we can use all the memory the BIOS set aside for the GPU. Signed-off-by: -
Chris Wilson authored
The GATT is a write-only set of registers, reading from them in the manner of i915_gtt_to_phys() is supposed to be undefined. However a simple solution exists as we allocate linear memory from the stolen area, we can simply add the block offset to the base register. As a side-effect we recover all the unused stolen GTT entries and so enlarge our aperture. Signed-off-by: -
Chris Wilson authored
After a GPU reset, the backlight controller registers may be also reset to 0. In that case we should restore those to the original values programmed by the BIOS. Note that we still lack the code to handle the case where the BIOS failed to program those registers at all... Signed-off-by: -
Chris Wilson authored
Signed-off-by:
-
- 22 Nov, 2010 4 commits
-
-
Chris Wilson authored
As we conflated intel_sdvo->is_hdmi with both having HDMI support on the ADD along with having HDMI support on the monitor, we would attempt to use HDMI encodings even if the interface did not support those commands. Reported-by:
Simon Farnsworth <simon.farnsworth@onelan.co.uk> Signed-off-by:
-
Keith Packard authored
We were reading our 64-bit value in I915_READ64 and returning 32 bits of it. The restoration of fence regs at resume then had a zero end value, and the fence had no effect. Version 2: Split register access functions into per-size versions Sharing code between different sizes seemed reasonable when we only needed a single copy, but as 64-bit access requires its own version, it makes sense to just split them out for each size. Reported-by:
Peter Clifton <pcjc2@cam.ac.uk> Signed-off-by:
Eric Anholt <eric@anholt.net> Signed-off-by:
Keith Packard <keithp@keithp.com> [ickle: use a macro to create the various read/write routines] Signed-off-by:
-
Eric Anholt authored
This has proven sufficient to recover from a hang of the GPU using the gem_bad_blit test while at the KMS console then starting X. When attempting the same during an X session, the timer doesn't appear to trigger. Signed-off-by:
-
Eric Anholt authored
Signed-off-by:
-
