arm: Xilinx Zynq SoC patches for v4.2

- Fix earlyprintk, jump trampoline for SMP
- Update git tree location
- Setup PL310 aux (bit 22)

* tag 'zynq-soc-for-4.3' of https://github.com/Xilinx/linux-xlnx:
  ARM: zynq: reserve space for jump target in secondary trampoline
  clk: zynq: remove redundant $(CONFIG_ARCH_ZYNQ) in Makefile
  MAINTAINERS: Update Zynq git tree location
  ARM: zynq: Set bit 22 in PL310 AuxCtrl register (6395/1)
  ARM: zynq: Fix earlyprintk in big endian mode
Signed-off-by: Olof Johansson <olof@lixom.net>

Add Kconfig entries, header file changes and addition to the documentation.
The early debug infrastructure is also added for easy development.
Signed-off-by: Ludovic Desroches <ludovic.desroches@atmel.com>
Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>
Acked-by: Alexandre Belloni <alexandre.belloni@free-electrons.com>
Signed-off-by: Olof Johansson <olof@lixom.net>

Add a zero argument to the .word directive in
zynq_secondary_trampoline.  Without an expression the assembler emits
nothing for the .word directive.

This makes it so that the intended range is communicated to ioremap
and outer_flush_range in zynq_cpun_start; e.g. for LE
trampoline_code_size evaluates to 12 now instead of 8.

Found by inspection.  I'm not aware of any real problem this fixes.
Tested by doing on online/offline loop on ZC702.
Signed-off-by: Nathan Lynch <nathan_lynch@mentor.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>

Kbuild descends into drivers/clk/zynq/ only when CONFIG_ARCH_ZYNQ
is enabled.  (see drivers/clk/Makefile)

$(CONFIG_ARCH_ZYNQ) in drivers/clk/zynq/Makefile always evaluates
to 'y'.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>

The git tree for Zynq moved to Github. Update the MAINTAINERS record to
reflect the change.
Signed-off-by: Soren Brinkmann <soren.brinkmann@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>

Add power domains for ZX296702 to power off
inactive power domains in runtime.
Signed-off-by: Jun Nie <jun.nie@linaro.org>
[olof: Marked zx296702_pd_driver as __initdata to avoid section mismatch]
Signed-off-by: Olof Johansson <olof@lixom.net>

Merge tag 'socfpga_updates_for_v4.3' of git://git.kernel.org/pub/scm/linux/kernel/git/dinguyen/linux into next/soc

SoCFPGA updates for v4.3
- Add smp.ops.cpu_kill() for kexec
- Add reboot capability for Arria10

* tag 'socfpga_updates_for_v4.3' of git://git.kernel.org/pub/scm/linux/kernel/git/dinguyen/linux:
  ARM: socfpga: add reset for the Arria 10 platform
  ARM: socfpga: add smp_ops.cpu_kill to make kexec/kdump available
Signed-off-by: Olof Johansson <olof@lixom.net>

- ARM: mediatek: Add regmap to mediatek Kconfig
- soc: mediatek: Drop owner assignment from platform_driver
- soc: Mediatek: Add SCPSYS power domain driver
- dt-bindings: soc: Add documentation for the MediaTek SCPSYS unit
- soc: mediatek: Add infracfg misc driver support

* tag 'v4.2-next-soc' of https://github.com/mbgg/linux-mediatek:
  ARM: mediatek: Add regmap to mediatek Kconfig
  soc: mediatek: Drop owner assignment from platform_driver
  soc: Mediatek: Add SCPSYS power domain driver
  dt-bindings: soc: Add documentation for the MediaTek SCPSYS unit
  soc: mediatek: Add infracfg misc driver support
Signed-off-by: Olof Johansson <olof@lixom.net>

This clarifies the location of the files maintained by me.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Signed-off-by: Olof Johansson <olof@lixom.net>

This is the pxa changes for v4.3 cycle.

There is mostly one evolution on the dma side, to enable cooperation
of the legacy pxa DMA API, and the new dmaengine API.
Once all drivers using DMA are converted, the legacy DMA API should
be removed.

* tag 'pxa-for-4.3-v2' of https://github.com/rjarzmik/linux:
  ARM: pxa: Use setup_timer
  ARM: pxa: Use module_platform_driver
  ARM: pxa: transition to dmaengine phase 1
Signed-off-by: Olof Johansson <olof@lixom.net>

Merge tag 'omap-for-v4.3/soc-signed' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap into next/soc

SoC changes for omaps for v4.3 merge window:

- Clean-up omap4_local_timer_init to drop deal legacy code

- Provide proper IO map table for dra7

- Clean-up IOMMU layer init code as it now uses IOMMU framework

- A series of changes to fix up dm814x support that's been in a broken
  half-merged state for quite some time

- A series of PRCM and hwmod changes via Paul Walmsley <paul@pwsan.com>:

  - I/O wakeup support for AM43xx
  - register lock and unlock support to the hwmod code (needed for the RTC
    IP blocks on some chips)
  - several fixes for sparse warnings and an unnecessary null pointer test
  - a DRA7xx clockdomain configuration workaround, to deal with some hardware
    bugs

* tag 'omap-for-v4.3/soc-signed' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap: (21 commits)
  ARM: OMAP2: Add minimal dm814x hwmod support
  ARM: OMAP2+: Prepare dm81xx hwmod code for adding minimal dm814x support
  ARM: PRM: AM437x: Enable IO wakeup feature
  ARM: OMAP4+: PRM: Add AM437x specific data
  ARM: OMAP: PRM: Remove hardcoding of IRQENABLE_MPU_2 and IRQSTATUS_MPU_2 register offsets
  ARM: dts: AM4372: Add PRCM IRQ entry
  ARM: AM43xx: Add the PRM IRQ register offsets
  ARM: OMAP4: PRM: Remove hardcoding of PRM_IO_PMCTRL_OFFSET register
  ARM: OMAP2+: Add support for initializing dm814x clocks
  ARM: OMAP2+: Add custom prwdm_operations for 81xx to support dm814x
  ARM: OMAP2+: Add minimal clockdomains for dm814x
  ARM: OMAP2+: Fix scm compatible for dm814x
  ARM: OMAP2+: Fix dm814x DT_MACHINE_START
  ARM: OMAP2+: Remove module references from IOMMU machine layer
  ARM: DRA7: Provide proper IO map table
  ARM: OMAP2+: Clean up omap4_local_timer_init
  ARM: OMAP2: Delete an unnecessary check
  ARM: OMAP2+: sparse: add missing function declarations
  ARM: OMAP2+: sparse: add missing static declaration
  ARM: OMAP2+: hwmod: add support for lock and unlock hooks
  ...
Signed-off-by: Olof Johansson <olof@lixom.net>

Merge tag 'renesas-soc-for-v4.3' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas into next/soc

Renesas ARM Based SoC Updates for v4.3

* Add basic support for gose/r8a7793

* tag 'renesas-soc-for-v4.3' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas:
  ARM: shmobile: gose: enable R-Car Gen2 regulator quirk
  ARM: shmobile: Basic r8a7793 SoC support
Signed-off-by: Olof Johansson <olof@lixom.net>

Merge tag 'sti-soc-for-v4.3-1' of https://git.kernel.org/pub/scm/linux/kernel/git/mcoquelin/sti into next/soc

STi SoC updates for v4.3, round 1.

Highlights:
-----------
 - Add code to release secondary cores from holding pen.
 - Remove useless call to trace_hardirqs_off() in secondary core init function.

* tag 'sti-soc-for-v4.3-1' of https://git.kernel.org/pub/scm/linux/kernel/git/mcoquelin/sti:
  ARM: STi: Remove platform call to trace_hardirqs_off()
  ARM: STi: Add code to release secondary cores from holding pen.
Signed-off-by: Olof Johansson <olof@lixom.net>

Update dm814x changes for sparse fixes to make data structures
static.

Conflicts:
	arch/arm/mach-omap2/omap_hwmod_81xx_data.c

Let's add minimal set of dm814x hwmods to have a bootable system.

Cc: Matthijs van Duin <matthijsvanduin@gmail.com>
Cc: Paul Walmsley <paul@pwsan.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>

Let's change the defines so we can share the hwmod code better between
dm816x and dm814x, and let's add the dm814x specific defines. And let's
rename the shared ones to start with dm81xx. No functional changes.

Cc: Matthijs van Duin <matthijsvanduin@gmail.com>
Cc: Paul Walmsley <paul@pwsan.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>

Merge tag 'for-v4.3/omap-hwmod-prcm-a' of git://git.kernel.org/pub/scm/linux/kernel/git/pjw/omap-pending into omap-for-v4.3/soc

ARM: OMAP2+: PRCM and hwmod changes for v4.3

This series adds:

- I/O wakeup support for AM43xx
- register lock and unlock support to the hwmod code (needed for the RTC
  IP blocks on some chips)
- several fixes for sparse warnings and an unnecessary null pointer test
- a DRA7xx clockdomain configuration workaround, to deal with some hardware
  bugs

Basic build, boot, and PM tests are here:

http://www.pwsan.com/omap/testlogs/hwmod-prcm-for-v4.3/20150723080012/

Since I do not have an AM43xx or DRA7xx device, I can't test on those
platforms.

Mediatek SoC needs the regmap/syscon infrastructure.
The infrastructure is used by the clock and pinctrl driver.
This patch adds MD_SYSCON to Kconfig for all Mediatek devices.
Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>

Enable IO wakeup feature. This enables am437x pads to generate daisy
chained wake ups(eventually generates aprcm Interrupt) especially
when in low power modes.
Signed-off-by: Keerthy <j-keerthy@ti.com>
Reviewed-by: Paul Walmsley <paul@pwsan.com>
Signed-off-by: Paul Walmsley <paul@pwsan.com>

The register offsets for some of the PRM Registers are different
hence populating the differing fields. This is needed to support
IO wake up feature for am437x family.
Signed-off-by: Keerthy <j-keerthy@ti.com>
Reviewed-by: Paul Walmsley <paul@pwsan.com>
Signed-off-by: Paul Walmsley <paul@pwsan.com>

The register offsets of IRQENABLE_MPU_2 and IRQSTATUS_MPU_2 are hardcoded.
This makes it difficult to reuse the code for SoCs like AM437x that have
a single instance of IRQENABLE_MPU and IRQSTATUS_MPU registers.
Hence handling the case using offset of 4 to accommodate single set of IRQ*
registers generically.
Signed-off-by: Keerthy <j-keerthy@ti.com>
[paul@pwsan.com: fixed whitespace alignment problems reported by checkpatch.pl]
Reviewed-by: Paul Walmsley <paul@pwsan.com>
Signed-off-by: Paul Walmsley <paul@pwsan.com>

Add PRCM IRQ entry.  This is needed for I/O wakeup support.
Signed-off-by: Keerthy <j-keerthy@ti.com>
[paul@pwsan.com: added I/O wakeup note in commit description]
Reviewed-by: Paul Walmsley <paul@pwsan.com>
Signed-off-by: Paul Walmsley <paul@pwsan.com>

Add the PRM IRQ register offsets.  This is needed to support PRM I/O
wakeup on AM43xx.
Signed-off-by: Keerthy <j-keerthy@ti.com>
[paul@pwsan.com: improved patch description, moved the PRM_IO_PMCTRL macro
 out of the CM section]
Reviewed-by: Paul Walmsley <paul@pwsan.com>
Signed-off-by: Paul Walmsley <paul@pwsan.com>

PRM_IO_PMCTRL_OFFSET need not be same for all SOCs hence
remove hardcoding and use the value provided by the omap_prcm_irq_setup
structure. This is done to support IO wakeup on am437x series.
Signed-off-by: Keerthy <j-keerthy@ti.com>
Reviewed-by: Paul Walmsley <paul@pwsan.com>
Signed-off-by: Paul Walmsley <paul@pwsan.com>

Calling trace_hardirqs_off() from the platform specific
secondary startup code as not been necessary since Dec 2010
when Russell King consolidated the call into the common SMP
code.

2c0136db ARM: SMP: consolidate trace_hardirqs_off() into common SMP code
Signed-off-by: Peter Griffin <peter.griffin@linaro.org>
Signed-off-by: Maxime Coquelin <maxime.coquelin@st.com>

Most upstream devs boot STi platform via JTAG which abuses the
boot process by setting the PC of secondary cores directly. As
a consquence, booting STi platforms via u-boot results in only
the primary core being brought up as the code to manage the
holding pen is not upstream.

This patch adds the necessary code to bring the secondary cores
out of the holding pen. It uses the cpu-release-addr DT property
to get the address of the holding pen from the bootloader.

With this patch booting upstream kernels via u-boot works
correctly:

[    0.045456] CPU: Testing write buffer coherency: ok
[    0.045597] CPU0: thread -1, cpu 0, socket 0, mpidr 80000000
[    0.045734] Setting up static identity map for 0x40209000 - 0x40209098
[    0.065047] CPU1: thread -1, cpu 1, socket 0, mpidr 80000001
[    0.065081] Brought up 2 CPUs
[    0.065089] SMP: Total of 2 processors activated (5983.43 BogoMIPS).
[    0.065092] CPU: All CPU(s) started in SVC mode.
Signed-off-by: Peter Griffin <peter.griffin@linaro.org>
Acked-by: Maxime Coquelin <maxime.coquelin@st.com>
Signed-off-by: Maxime Coquelin <maxime.coquelin@st.com>

This patch is based on the
commit 1a8e41cd ("ARM: 6395/1: VExpress: Set bit 22 in the PL310
(cache controller) AuxCtlr register")

Clearing bit 22 in the PL310 Auxiliary Control register (shared
attribute override enable) has the side effect of transforming Normal
Shared Non-cacheable reads into Cacheable no-allocate reads.

Coherent DMA buffers in Linux always have a cacheable alias via the
kernel linear mapping and the processor can speculatively load cache
lines into the PL310 controller. With bit 22 cleared, Non-cacheable
reads would unexpectedly hit such cache lines leading to buffer
corruption.

For Zynq, this fix avoids memory inconsistencies between Gigabit
Ethernet controller (GEM) and CPU when DMA_CMA is disabled.
Suggested-by: Punnaiah Choudary Kalluri <punnaia@xilinx.com>
Signed-off-by: Thomas Betker <thomas.betker@rohde-schwarz.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>

earlyprintk messages are not appearing on the terminal
emulator during a big endian kernel boot. In BE mode
sending full words to UART will result in unprintable
characters as they are byte swapped versions of printable
ones. So send only bytes.
Signed-off-by: Arun Chandran <achandran@mvista.com>
Tested-by: Michal Simek <michal.simek@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>

Since the Arria10's reset register offset is different from the Cyclone/Arria 5,
it's best to add a new DT_MACHINE_START() for the Arria10.
Signed-off-by: Dinh Nguyen <dinguyen@opensource.altera.com>
---
v2: use altera_a10_dt_match for the A10 machine desc

Use the timer API function setup_timer instead of structure field
assignments to initialize a timer.

A simplified version of the Coccinelle semantic patch that performs
this transformation is as follows:

@change@
expression e1, e2, a;
@@

-init_timer(&e1);
+setup_timer(&e1, a, 0UL);
... when != a = e2
-e1.function = a;
Signed-off-by: Vaishali Thakkar <vthakkar1994@gmail.com>
Signed-off-by: Robert Jarzmik <robert.jarzmik@free.fr>

Use module_platform_driver for drivers whose init and exit functions
only register and unregister, respectively.

A simplified version of the Coccinelle semantic patch that performs
this transformation is as follows:

@A@
identifier f, x;
@@
-static f(...) { return platform_driver_register(&x); }

@b depends on a@
identifier e, a.x;
@@
-static e(...) { platform_driver_unregister(&x); }

@c depends on a && b@
identifier a.f;
declarer name module_init;
@@
-module_init(f);

@d depends on a && b && c@
identifier b.e, a.x;
declarer name module_exit;
declarer name module_platform_driver;
@@
-module_exit(e);
+module_platform_driver(x);
Signed-off-by: Vaishali Thakkar <vthakkar1994@gmail.com>
Signed-off-by: Robert Jarzmik <robert.jarzmik@free.fr>

In order to slowly transition pxa to dmaengine, the legacy code will now
rely on dmaengine to request a channel.

This implies that PXA architecture selects DMADEVICES and PXA_DMA,
which is not pretty. Yet it enables PXA drivers to be ported one by one,
with part of them using dmaengine, and the other part using the legacy
code.
Signed-off-by: Robert Jarzmik <robert.jarzmik@free.fr>

Merge tag 'v4.3-rockchip32-soc1' of git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip into next/soc

Merge "Rockchip soc changes for 4.3, part1" from Heiko Stuebner:

Some suspend improvements enabling the possibility to wakeup
from usbphy events and a rework of how cpu cores are brought
up and down, as it was possible to produce lockups when
hammering the cpu hotplug functions.

* tag 'v4.3-rockchip32-soc1' of git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip:
  ARM: rockchip: fix broken build
  ARM: rockchip: remove some useless macro in pm.h
  ARM: rockchip: add support holding 24Mhz osc during suspend
  ARM: rockchip: fix the SMP code style
  ARM: rockchip: ensure CPU to enter WFI/WFE state
  ARM: rockchip: fix the CPU soft reset
  ARM: rockchip: restore dapswjdp after suspend
Signed-off-by: Olof Johansson <olof@lixom.net>

Let's add a minimal clocks for dm814x to get it booted. This is
mostly a placeholder and relies on the PLLs being on from the
bootloader.

Note that the divider clocks work the same way as on dm816x and
am335x.

Cc: Matthijs van Duin <matthijsvanduin@gmail.com>
Cc: Mike Turquette <mturquette@linaro.org>
Cc: Paul Walmsley <paul@pwsan.com>
Cc: Stephen Boyd <sboyd@codeaurora.org>
Cc: Tero Kristo <t-kristo@ti.com>
Acked-by: Stephen Boyd <sboyd@codeaurora.org>
Signed-off-by: Tony Lindgren <tony@atomide.com>

Looking at the TI kernel tree I noticed that dm81xx need custom
ti81xx_pwrdm_operations. Let's also change dm816x over to use them
as the registers are different for dm81xx compared to others.

Cc: Matthijs van Duin <matthijsvanduin@gmail.com>
Cc: Paul Walmsley <paul@pwsan.com>
Cc: Tero Kristo <t-kristo@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>

For now, let's just add the ones shared with dm816x.
The dm814x specific ones can be added as they are tested.

Cc: Matthijs van Duin <matthijsvanduin@gmail.com>
Cc: Paul Walmsley <paul@pwsan.com>
Cc: Tero Kristo <t-kristo@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>

Fix scm compatible for dm814x.

Cc: Matthijs van Duin <matthijsvanduin@gmail.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>

Fix dm814x DT_MACHINE_START.

Cc: Matthijs van Duin <matthijsvanduin@gmail.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>

The OMAP IOMMU driver has been adapted to the IOMMU framework
for a while now, and it no longer supports being built as a
module. Cleanup all the module related references both from
the code and in the build.

While at it, also relocate a comment around the initcall to
avoid a checkpatch strict warning about using a blank line
after function/struct/union/enum declarations.
Signed-off-by: Suman Anna <s-anna@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>