1. 04 Aug, 2020 5 commits
  2. 30 Jul, 2020 22 commits
  3. 28 Jul, 2020 3 commits
  4. 27 Jul, 2020 10 commits
    • Mauro Rossi's avatar
      drm/amd/display: create plane rotation property for Bonaire and later · f784112f
      Mauro Rossi authored
      [Why]
      DCE6 chipsets do not support HW rotation
      
      [How]
      rotation property is created for Bonaire and later
      Reviewed-by: default avatarAlex Deucher <alexander.deucher@amd.com>
      Signed-off-by: default avatarMauro Rossi <issor.oruam@gmail.com>
      Signed-off-by: default avatarAlex Deucher <alexander.deucher@amd.com>
      f784112f
    • Mauro Rossi's avatar
      drm/amd/display: dc/dce60: use DCE6 headers (v6) · 75b4766b
      Mauro Rossi authored
      [Why]
      With all DCE6 specific macros, register, masks in place
      dce60_resource.c may use them and become independent from DCE8 headers
      
      [How]
      (v1) Changelog:
      - use DCE6 headers for registers and masks, remove the DC8 headers
      - remove 7th Display Controller/Encoder register instances (DCE6 has only 6)
      - use DCE6 specific watermark programming registers (DPG_PIPE_ARBITRATION_CONTROL3)
      - use DCE6 specific input pixel processing registers shift/mask
      - use DCE6 specific transform registers shift/mask
      - use DCE6 specific link encoder registers shift/mask
      - use DCE6 specific output pixel processing registers shift/mask
      - use DCE6 specific audio registers shift/mask
      - use DCE6 specific dmcu registers shift/mask
      - use DCE6 specific hwseq registers shift/mask
      - use DCE6 specific mem input registers shift/mask
      
      (v2) Changelog:
      - use DCE6 ad hoc dce60_mem_input_construct() function
      - use DCE6 ad hoc dce60_transform_construct() function
      
      (v3) Changelog:
      - use DCE6 ad hoc dce60_ipp_construct() function
      
      (v4) Changelog:
      - use DCE6 ad hoc dce60_link_encoder_construct() function
      
      (v5) Changelog:
      - use DCE6 ad hoc dce60_opp_construct() function
      
      (v6) Changelog:
      - use DCE6 ad hoc dce60_audio_create() function
      Reviewed-by: default avatarAlex Deucher <alexander.deucher@amd.com>
      Signed-off-by: default avatarMauro Rossi <issor.oruam@gmail.com>
      Signed-off-by: default avatarAlex Deucher <alexander.deucher@amd.com>
      75b4766b
    • Mauro Rossi's avatar
      drm/amd/display: dce60_timing_generator: add DCE6 specific functions (v2) · 9caf2a1f
      Mauro Rossi authored
      [Why]
      DCE6 has CRTC_PREFETCH_EN bit in CRTC_CONTROL register
      DCE6 has no CRTC_LEGACY_REQUESTOR_EN bit in CRTC_START_LINE_CONTROL register
      DCE6 has no CRTC_CRC_CNTL register
      
      [How]
      Modify dce60_timing_generator_enable_advanced_request() function
      Add dce60_configure_crc() function and dce60_is_tg_enabled() kept as static
      Use dce60_configure_crc() function in dce60_tg_funcs
      
      v2: remove unused variable (Alex)
      Reviewed-by: default avatarAlex Deucher <alexander.deucher@amd.com>
      Signed-off-by: default avatarMauro Rossi <issor.oruam@gmail.com>
      Signed-off-by: default avatarAlex Deucher <alexander.deucher@amd.com>
      9caf2a1f
    • Mauro Rossi's avatar
      drm/amd/display: dce60_hw_sequencer: add DCE6 specific .cursor_lock · 1bd26c7d
      Mauro Rossi authored
      [Why]
      kernel WARNING due to use of .cursor_lock = dce_pipe_control_lock inherited by dce110
      
      [How]
      DCE6 set .cursor_lock = dce60_pipe_control_lock
      Reviewed-by: default avatarAlex Deucher <alexander.deucher@amd.com>
      Signed-off-by: default avatarMauro Rossi <issor.oruam@gmail.com>
      Signed-off-by: default avatarAlex Deucher <alexander.deucher@amd.com>
      1bd26c7d
    • Mauro Rossi's avatar
      drm/amd/display: dce60_hw_sequencer: add DCE6 specific functions (v2) · 167d74fd
      Mauro Rossi authored
      [Why]
      DCE6 has no bottom_pipe and no Blender HW
      DCE6 needs 'blank_target' set to false in order to turn on the display
      DCE6 has a specific dce60_pipe_control_lock() fuction that is a no op
      
      [How]
      Add DCE6 specific functions with needed private dce60_* dependent fuctions
      Comment DCE6 specific CTRC program visibility implementation
      Fix a typo in the initial header includes comment 's/DCE8/DCE6/g'
      Use dce60_apply_ctx_for_surface() in dce60_hw_sequencer_construct
      Use dce60_pipe_control_lock() in dce60_hw_sequencer_construct
      
      v2: add missing return type (Alex)
      Reviewed-by: default avatarAlex Deucher <alexander.deucher@amd.com>
      Signed-off-by: default avatarMauro Rossi <issor.oruam@gmail.com>
      Signed-off-by: default avatarAlex Deucher <alexander.deucher@amd.com>
      167d74fd
    • Mauro Rossi's avatar
      drm/amd/display: dce_transform: DCE6 Scaling Horizontal Filter Init (v2) · 102b2f58
      Mauro Rossi authored
      [Why]
      DCE6 has specific SCL_HORZ_FILTER_INIT_{LUMA_RGB,CHROMA} registers
      In DCE6 h_init_luma and h_init_chroma initialization is required
      Some DCE6 specific SCL_{HORZ,VERT}_FILTER_CONTROL masks were not listed
      
      [How]
      Add the registers and masks in dce_transform.h
      Add DCE6 specific struct sclh_ratios_inits in dce_transform.h
      Add dce60_calculate_inits() function
      Add dce60_program_scl_ratios_inits() function
      Fix dce60_transform_set_scaler() function
      
      v2: remove unused variable (Alex)
      Reviewed-by: default avatarAlex Deucher <alexander.deucher@amd.com>
      Signed-off-by: default avatarMauro Rossi <issor.oruam@gmail.com>
      Signed-off-by: default avatarAlex Deucher <alexander.deucher@amd.com>
      102b2f58
    • Mauro Rossi's avatar
      drm/amd/display: dce_transform: add DCE6 specific macros,functions · b70aaf55
      Mauro Rossi authored
      [Why]
      DCE6 has no SCL_MODE and no SCL_{HORZ,VERT}_FILTER_INIT registers
      DCE6 has no SCL_BOUNDARY_MODE bit in SCL_CONTROL register
      DCE6 has Line Buffer programming registers (DC_LB_MEMORY_SPLIT,DC_LB_MEM_SIZE)
      DCE6 DATA_FORMAT register has only INTERLEAVE_EN bit
      DCE6 has no Out Clamp Control programming registers (OUT_CLAMP_CONTROL_*)
      
      [How]
      Add DCE6 specific macros definitions for XFM registers and masks
      Add DCE6 specific registers to dce_transform_registers struct
      Add DCE6 specific masks to dce_transform_mask struct
      DCE6 XFM macros/structs changes will avoid buiding errors when using DCE6 headers
      Add dce60_setup_scaling_configuration() w/o missing Scaling registers/bit programming
      Add dce60_transform_set_scaler() using DCE6 Line Buffer programming registers
      Add dce60_program_bit_depth_reduction() w/o Out Clamp Control programming
      Add dce60_transform_set_pixel_storage_depth() use dce60_program_bit_depth_reduction()
      Use dce60_transform_set_scaler() in dce60_transform_funcs
      Use dce60_transform_set_pixel_storage_depth() in dce60_transform_funcs
      Add DCE6 specific dce60_transform_construct
      Reviewed-by: default avatarAlex Deucher <alexander.deucher@amd.com>
      Signed-off-by: default avatarMauro Rossi <issor.oruam@gmail.com>
      Signed-off-by: default avatarAlex Deucher <alexander.deucher@amd.com>
      b70aaf55
    • Mauro Rossi's avatar
      drm/amd/display: dce_opp: add DCE6 specific macros,functions · d85a1e53
      Mauro Rossi authored
      [Why]
      DCE6 has no FMT_TRUNCATE_MODE bit in FMT_BIT_DEPTH_CONTROL register
      DCE6 has no FMT_CLAMP_COMPONENT_{R,G,B} registers
      DCE6 has no FMT_SUBSAMPLING_{MODE,ORDER} bits in FMT_CONTROL register
      
      [How]
      Add DCE6 specific macros definitions for OPP registers and masks
      DCE6 OPP macros will avoid buiding errors when using DCE6 headers
      Add dce60_set_truncation() w/o FMT_TRUNCATE_MODE bit programming
      Add dce60_opp_set_clamping() w/o Format Clamp Component programming
      Add dce60_opp_program_fmt() w/o Format Subsampling bits programming
      Add dce60_opp_program_bit_depth_reduction() with dce60_set_truncation
      Use dce60_opp_program_fmt() in dce60_opp_funcs
      Use dce60_opp_program_bit_depth_reduction() in dce60_opp_funcs
      Add DCE6 specific dce60_opp_construct
      Reviewed-by: default avatarAlex Deucher <alexander.deucher@amd.com>
      Signed-off-by: default avatarMauro Rossi <issor.oruam@gmail.com>
      Signed-off-by: default avatarAlex Deucher <alexander.deucher@amd.com>
      d85a1e53
    • Mauro Rossi's avatar
      drm/amd/display: dce_mem_input: add DCE6 specific macros,functions (v2) · b91f056f
      Mauro Rossi authored
      [Why]
      DCE6 has DPG_PIPE_ARBITRATION_CONTROL3 register for Line Buffer watermark selection
      DCE6 has STUTTER_EXIT_SELF_REFRESH_WATERMARK_MASK mask for Stutter watermark selection
      DCE6 has NB_PSTATE_CHANGE_WATERMARK_MASK mask for North Bridge watermark selection
      DCE6 has no GRPH_MICRO_TILE_MODE mask
      DCE6 has no HW_ROTATION register
      
      [How]
      Add DCE6 specific macros definitions for MI registers and masks
      Add DCE6 specific registers to dce_mem_input_registers struct
      Add DCE6 specific masks to dce_mem_input_masks struct
      DCE6 MI macros/structs changes will avoid buiding errors when using DCE6 headers
      Add dce60_program_urgency_watermark() function
      Add dce60_program_nbp_watermark() function
      Add dce60_program_stutter_watermark() function
      Add dce60_mi_program_display_marks() function w/ new DCE6 watermark programming
      Add DCE6 specific tiling programming and modify DCE8 case
      Add dce60_program_size() fuction w/o Rotation processing
      Add dce60_mi_program_surface_config() fuction
      Use dce60_mi_program_display_marks() in dce60_mi_funcs
      Use dce60_mi_program_surface_config() in dce60_mi_funcs
      Add DCE6 specific dce60_mem_input_construct
      
      v2: remove unused variable (Alex)
      Reviewed-by: default avatarAlex Deucher <alexander.deucher@amd.com>
      Signed-off-by: default avatarMauro Rossi <issor.oruam@gmail.com>
      Signed-off-by: default avatarAlex Deucher <alexander.deucher@amd.com>
      b91f056f
    • Mauro Rossi's avatar
      drm/amd/display: dce_link_encoder: add DCE6 specific macros,functions · c1a64ebd
      Mauro Rossi authored
      [Why]
      DCE6 has no DP_DPHY_SCRAM_CNTL register
      
      [How]
      Add DCE6 specific macros definitions for LE registers
      DCE6 LE macros will avoid buiding errors when using DCE6 headers
      Add dce60_set_dp_phy_pattern_hbr2_compliance_cp2520_2() w/o Scramble Control programming
      Add dce60_set_dp_phy_pattern_passthrough_mode() w/o Scramble Control programming
      Add dce60_configure_encoder() w/o Scramble Control programming
      Add dce60_link_encoder_enable_dp_output() w/ dce60_configure_encoder
      Add dce60_link_encoder_enable_dp_mst_output() w/ dce60_configure_encoder
      Add dce60_link_encoder_dp_set_phy_pattern() w/ dce60_set_dp_phy_pattern_passthrough_mode
      Use dce60_link_encoder_enable_dp_output() in dce60_lnk_enc_funcs
      Use dce60_link_encoder_enable_dp_mst_output() in dce60_lnk_enc_funcs
      Use dce60_link_encoder_dp_set_phy_pattern() in dce60_lnk_enc_funcs
      Add DCE6 specific dce60_link_encoder_construct
      Reviewed-by: default avatarAlex Deucher <alexander.deucher@amd.com>
      Signed-off-by: default avatarMauro Rossi <issor.oruam@gmail.com>
      Signed-off-by: default avatarAlex Deucher <alexander.deucher@amd.com>
      c1a64ebd