- 27 Jun, 2013 40 commits
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Alex Deucher authored
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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Alex Deucher authored
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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Alex Deucher authored
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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Alex Deucher authored
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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Alex Deucher authored
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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Alex Deucher authored
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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Alex Deucher authored
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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Alex Deucher authored
This adds dpm support for SI asics. This includes: - dynamic engine clock scaling - dynamic memory clock scaling - dynamic voltage scaling - dynamic pcie gen1/gen2/gen3 switching - power containment - shader power scaling Set radeon.dpm=1 to enable. v2: enable hainan support, rebase v3: guard acpi stuff v4: fix 64 bit math v5: fix 64 bit div harder v6: fix thermal interrupt check noticed by Jerome v7: attempt fix state enable Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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Alex Deucher authored
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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Alex Deucher authored
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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Alex Deucher authored
We weren't properly catching errors in dpm_enable() and dpm_set_power_state(). Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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Alex Deucher authored
We weren't properly catching errors in dpm_enable() and dpm_set_power_state(). Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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Alex Deucher authored
We weren't properly catching errors in dpm_enable() and dpm_set_power_state(). Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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Alex Deucher authored
We weren't properly catching errors in dpm_enable() and dpm_set_power_state(). Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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Alex Deucher authored
We weren't properly catching errors in dpm_enable() and dpm_set_power_state(). Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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Alex Deucher authored
We weren't properly catching errors in dpm_enable() and dpm_set_power_state(). Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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Alex Deucher authored
We weren't properly catching errors in dpm_enable() and dpm_set_power_state(). Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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Alex Deucher authored
We weren't properly catching errors in dpm_enable() and dpm_set_power_state(). Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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Alex Deucher authored
The arrays items are variable sized. Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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Alex Deucher authored
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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Alex Deucher authored
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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Alex Deucher authored
Add a helper function to determine the preferred pcie gen based on the card, system, and circumstance. Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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Alex Deucher authored
Add a way to look up the bootup mvdd. Required for DPM on SI. Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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Alex Deucher authored
Validate the voltages against the voltage requirements of the dispclk. We currently don't adjust the disp clock so it never changes, but we need to filter out voltage levels that are too low none the less. Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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Alex Deucher authored
Forgot to free some structs when allocation fails for some tables. Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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Alex Deucher authored
Use the new fixed point functions for leakage calculations on cayman. v2: fix up 64 bit math Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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Alex Deucher authored
Required for certain driver calculations. Code was written by Christian König and ported to the drm by me. v2: fix 64 bit divides v3: fix 64 bit for real (math64.h) Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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Alex Deucher authored
Consolidate the non-register defines. Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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Alex Deucher authored
Required for SI. Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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Alex Deucher authored
Used by SI dpm. Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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Alex Deucher authored
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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Alex Deucher authored
Required for dpm on SI. Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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Alex Deucher authored
This makes it easier the understand what the code is doing. Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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Alex Deucher authored
Only Cape Verde supports power gating. Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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Alex Deucher authored
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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Alex Deucher authored
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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Alex Deucher authored
These are needed for certain UVD power saving features. Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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Alex Deucher authored
Required for DPM on SI. Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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Alex Deucher authored
This is required for certain power management features. Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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Alex Deucher authored
TN has some additional powergating features beyond what is supported on ON/LN. Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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