1. 11 Jul, 2014 10 commits
    • Jiri Pirko's avatar
      ipv6: addrconf: implement address generation modes · bc91b0f0
      Jiri Pirko authored
      This patch introduces a possibility for userspace to set various (so far
      two) modes of generating addresses. This is useful for example for
      NetworkManager because it can set the mode to NONE and take care of link
      local addresses itself. That allow it to have the interface up,
      monitoring carrier but still don't have any addresses on it.
      
      One more use-case by Dan Williams:
      <quote>
      WWAN devices often have their LL address provided by the firmware of the
      device, which sometimes refuses to respond to incorrect LL addresses
      when doing DHCPv6 or IPv6 ND.  The kernel cannot generate the correct LL
      address for two reasons:
      
      1) WWAN pseudo-ethernet interfaces often construct a fake MAC address,
      or read a meaningless MAC address from the firmware.  Thus the EUI64 and
      the IPv6LL address the kernel assigns will be wrong.  The real LL
      address is often retrieved from the firmware with AT or proprietary
      commands.
      
      2) WWAN PPP interfaces receive their LL address from IPV6CP, not from
      kernel assignments.  Only after IPV6CP has completed do we know the LL
      address of the PPP interface and its peer.  But the kernel has already
      assigned an incorrect LL address to the interface.
      
      So being able to suppress the kernel LL address generation and assign
      the one retrieved from the firmware is less complicated and more robust.
      </quote>
      Signed-off-by: default avatarJiri Pirko <jiri@resnulli.us>
      Signed-off-by: default avatarDavid S. Miller <davem@davemloft.net>
      bc91b0f0
    • Arvid Brodin's avatar
      net/hsr: Remove left-over never-true conditional code. · 279f64b7
      Arvid Brodin authored
      MacAddressB is an array (unsigned char MacAddressB[ETH_ALEN]) and is allocated
      as a part of *node_dst (which is a struct hsr_node). So the condition is always
      false.
      
      Detected by Dan Carpenter.
      Signed-off-by: default avatarArvid Brodin <arvid.brodin@alten.se>
      Signed-off-by: default avatarDavid S. Miller <davem@davemloft.net>
      279f64b7
    • David S. Miller's avatar
      Merge branch 'r8169_tso_ipv6' · 19278cab
      David S. Miller authored
      Hayes Wang says:
      
      ====================
      r8169: support IPv6
      
      The RTL8168C and the later chips support the hardware checksum
      for IPv6. Adjust some code and add the relative code.
      ====================
      Signed-off-by: default avatarDavid S. Miller <davem@davemloft.net>
      19278cab
    • hayeswang's avatar
      r8169: support IPv6 · e974604b
      hayeswang authored
      Support the IPv6 hw checksum for RTL8111C and later chips. Note
      that the hw has the limitation for the transport offset. The
      checksum must be calculated by sw, when the transport offset is
      out of the range which the hw accepts.
      Signed-off-by: default avatarHayes Wang <hayeswang@realtek.com>
      Signed-off-by: default avatarDavid S. Miller <davem@davemloft.net>
      e974604b
    • hayeswang's avatar
      r8169: use Giant Send · bdfa4ed6
      hayeswang authored
      Replace large send with giant send for TSO for RTL8111C and later ICs.
      The large send setting of the RTL8111DP is different from the other
      chips. However, the giant send setting is the same for all the chips
      which support it. Use the giant send to synchronize the settings.
      Signed-off-by: default avatarHayes Wang <hayeswang@realtek.com>
      Signed-off-by: default avatarDavid S. Miller <davem@davemloft.net>
      bdfa4ed6
    • hayeswang's avatar
      r8169: split rtl8169_tso_csum · 5888d3fc
      hayeswang authored
      According to the txd_version, split rtl8169_tso_csum() into
      rtl8169_tso_csum_v1() and rtl8169_tso_csum_v2().
      Signed-off-by: default avatarHayes Wang <hayeswang@realtek.com>
      Signed-off-by: default avatarDavid S. Miller <davem@davemloft.net>
      5888d3fc
    • Li RongQing's avatar
    • Stefan Sørensen's avatar
      dp83640: Adjust ptp event timestamps · a0077a9f
      Stefan Sørensen authored
        Event timestamp values should be adjusted by 3*reference clock period +
        11 ns = 35 ns to compensate for input path and synchronization delays.
      
      So subtract 35ns from event timestamps.
      Signed-off-by: default avatarStefan Sørensen <stefan.sorensen@spectralink.com>
      Acked-by: default avatarRichard Cochran <richardcochran@gmail.com>
      Signed-off-by: default avatarDavid S. Miller <davem@davemloft.net>
      a0077a9f
    • David S. Miller's avatar
      Merge branch 'mvebu' · 5e6438db
      David S. Miller authored
      Ezequiel Garcia says:
      
      ====================
      Network driver for Armada 375 SoC
      
      This is the fourth round of the Armada 375 network support patchset. I've
      tried to address all the feedback provided for last version and I hope the
      driver looks better now.
      
      If there's nothing else to fix, we'd like to merge this for v3.17. The first
      patch should go through the network tree, and the other patches through
      the mvebu tree.
      
      Thanks a lot for all the great review, and feel free to comment some more!
      
      Changes from v3:
      
        * Further optimization of the MTU, MAC and ring parameter change to make
          it smoothier.
      
        * Lots of cleanups in the parser configuration code, most of them addressing
          the feedback from Francois. This include fixing: missing curly braces,
          excessive parenthesis, excessive scope, and making several functions
          more readable.
      
        * Removed the Rx/Tx queue number module parameter. There's no reason to
          use any other than the default hardware-defined value.
      
      Changes from v2:
      
        * Reworked mvpp2_prs_tcam_first_free() as suggested by Joe and Francois,
          to have a single loop instead of two.
      
        * Replaced mvpp2_cpu_interrupts_enable/disable(pp, cpu) with one function
          that enables/disable interrupts on all the CPUs at once.
      
        * Factor out Tx descriptor DMA unmap + descriptor put sequence to have
          more readable code, as suggested by Francois.
      
        * Remove redundant netif_running() checks in the ingress and egress path,
          as suggested by Francois.
      
        * Reworked ring parameter, MTU and MAC address setting to produce a
          more gentle modification of the parameter, and have a fallback in the
          event of a failure.
      
        * Fixed a percpu memory leak on error path, also noted by Francois.
      
        * Removed the usage of the legacy net_device irq field, requested by
          Francois.
      
        * Removed the unneeded multiple Tx port support. It was hardcoded to a single
          Tx port in the previous version so we decided to drop it and simplify the
          code.
      
        * Optimize the on_each_cpu() calls to clear the sent counters and the
          TX_DONE pkts coalescing setting. on_each_cpu is expensive so it's better
          to minize the calls to it.
      
      Changes from v1:
      
        * Marcin Wojtas is the author of the driver, so I fixed authorship
          for patch 1/3:
          "ethernet: Add new driver for Marvell Armada 375 network unit"
      
      This patchset adds a new network driver to support the network controller
      in Armada 375 SoC.
      
      The network interfaces share a common hardware unit called Packet Processor,
      which contains a common register space and per-port register spaces.
      
      The new network unit has different RXQ and TXQ management. The ports
      associate so-called per-port "logical queues" which are mapped to "physical
      queues". The latter are shared among the ports.
      
      Fo the egress part, the mapping for each port is predefined by hardware.
      The egress path incorporates so-called aggregation queues (one per CPU),
      from where the data is passed to the physical queues and then via prefetch
      buffer to the TxDMA.
      
      The ingress path has a Parser and Classifier (PnC) and a Buffer Manager (BM)
      whose usage is obligatory. We are only implementing a simple configuration
      for the Parser and Classifier, yet the code is considerably large.
      
      This network unit has other optional features like xPON, WoL, Hardware
      Forwarding, and more. This initial commit doesn't provide support for these.
      
      The mvpp2 network driver has been written by Marcin Wojtas and then reviewed
      and cleaned up by Ezequiel Garcia.
      ====================
      Signed-off-by: default avatarDavid S. Miller <davem@davemloft.net>
      5e6438db
    • Marcin Wojtas's avatar
      ethernet: Add new driver for Marvell Armada 375 network unit · 3f518509
      Marcin Wojtas authored
      This commit adds a new network driver for the network controller in Marvell
      Armada 375 SoC.
      
      Given the controller is very different from the ones in the other Marvell
      SoCs that use the mv643xx_eth (Kirkwood, Orion, Discovery) and mvneta
      (Armada 370/38x/XP) drivers, a new driver is needed.
      Signed-off-by: default avatarMarcin Wojtas <mw@semihalf.com>
      [Ezequiel: coding style cleanup]
      Signed-off-by: default avatarEzequiel Garcia <ezequiel.garcia@free-electrons.com>
      Signed-off-by: default avatarDavid S. Miller <davem@davemloft.net>
      3f518509
  2. 10 Jul, 2014 18 commits
  3. 09 Jul, 2014 12 commits