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- 07 Oct, 2019 1 commit
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Javier F. Arias authored
Remove unnecessary braces for single statement block. Issue found by checkpatch. Signed-off-by:
Javier F. Arias <jarias.linux@gmail.com> Acked-by:
Julia Lawall <julia.lawall@lip6.fr> Link: https://lore.kernel.org/r/20191006133016.GA22297@gmail.comSigned-off-by:
Greg Kroah-Hartman <gregkh@linuxfoundation.org>
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- 04 Oct, 2019 39 commits
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Benjamin Poirier authored
When operating at mtu 9000, qlge does order-1 allocations for rx buffers in atomic context. This is especially unreliable when free memory is low or fragmented. Add an approach similar to commit 3161e453 ("virtio: net refill on out-of-memory") to qlge so that the device doesn't lock up if there are allocation failures. Signed-off-by:
Benjamin Poirier <bpoirier@suse.com> Link: https://lore.kernel.org/r/20190927101210.23856-18-bpoirier@suse.comSigned-off-by:
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Benjamin Poirier authored
Reading the {s,l}bq_prod_idx registers on a running device, it appears that the adapter will only use buffers up to prod_idx & 0xfff0. The driver currently uses fixed-size guard zones (16 for sbq, 32 for lbq - don't know why this difference). After the previous patch, this approach no longer guarantees prod_idx values aligned on multiples of 16. While it appears that we can write unaligned values to prod_idx without ill effects on device operation, it makes more sense to change qlge_refill_bq() to refill up to a limit that corresponds with the device's behavior. Signed-off-by: -
Benjamin Poirier authored
Currently, if we repeatedly fail to allocate all of the buffers from the desired batching budget, we will never update the prod_idx register. Restructure code to always update prod_idx if new buffers could be allocated. This eliminates the current two stage process (clean_idx -> prod_idx) and some associated bookkeeping variables. Signed-off-by:
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Benjamin Poirier authored
Instead of clearing the structure wholesale, it is sufficient to initialize the skb member which is used to manage sbq instances. lbq instances are managed according to curr_idx and clean_idx. Signed-off-by:
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Benjamin Poirier authored
This just repeats what the other memset a few lines above did. Signed-off-by:
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Benjamin Poirier authored
Given the way the driver currently works, these values are always known at compile time. Signed-off-by:
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Benjamin Poirier authored
Given that (u16) 65536 == 0, that expression can be replaced by a simple cast. Signed-off-by:
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Benjamin Poirier authored
This field is redundant, the type can be determined from the index, cq_id. Signed-off-by:
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Benjamin Poirier authored
Using the unmap addr elsewhere than unmap calls is a misuse of the dma api. In prevision of this fix, qlge kept two copies of the dma address around ;) Fixes: c4e84bde ("qlge: New Qlogic 10Gb Ethernet Driver.") Fixes: 7c734359 ("qlge: Size RX buffers based on MTU.") Fixes: 2c9a266a ("qlge: Fix receive packets drop.") Signed-off-by:
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Benjamin Poirier authored
The qlge driver (and device) uses two kinds of buffers for reception, so-called "small buffers" and "large buffers". The two are arranged in rings, the sbq and lbq. These two share similar data structures and code. Factor out data structures into a common struct qlge_bq, make required adjustments to code and dedup the most obvious cases of copy/paste. This patch should not introduce any functional change other than to some of the printk format strings. Signed-off-by:
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Benjamin Poirier authored
This is unneeded for two reasons: 1) the cpu does not write data for the device in the mapping 2) calls like ..._sync_..._for_device(..., ..._FROMDEVICE) are nonsensical, see commit 3f0fb4e8 ("Documentation/DMA-API-HOWTO.txt: fix misleading example") Signed-off-by:
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Benjamin Poirier authored
Tx completion rings have sbq_buf_size = 0 but there's no case where the code actually tests on that value. We can remove sbq_buf_size and use a constant instead. Signed-off-by:
Willem de Bruijn <willemb@google.com> Link: https://lore.kernel.org/r/20190927101210.23856-7-bpoirier@suse.comSigned-off-by:
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Benjamin Poirier authored
The size of the mapping is known statically in all cases, there's no need to save it at runtime. Remove this member. Signed-off-by:
Manish Chopra <manishc@marvell.com> Link: https://lore.kernel.org/r/20190927101210.23856-6-bpoirier@suse.comSigned-off-by:
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Benjamin Poirier authored
lbq_buf_size is duplicated to every rx_ring structure whereas lbq_buf_order is present once in the ql_adapter structure. All rings use the same buf size, keep only one copy of it. Also factor out the calculation of lbq_buf_size instead of having two copies. Signed-off-by:
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Benjamin Poirier authored
As already done in ql_get_curr_lchunk(), this member can be replaced by a simple test. Signed-off-by:
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Benjamin Poirier authored
qlge uses an irq enable/disable refcounting scheme that is: * poorly implemented Uses a spin_lock to protect accesses to the irq_cnt atomic variable. * buggy Breaks when there is not a 1:1 sequence of irq - napi_poll, such as when using SO_BUSY_POLL. * unnecessary The purpose or irq_cnt is to reduce irq control writes when multiple work items result from one irq: the irq is re-enabled after all work is done. Analysis of the irq handler shows that there is only one case where there might be two workers scheduled at once, and those have separate irq masking bits. Therefore, remove irq_cnt. Additionally, we get a performance improvement: perf stat -e cycles -a -r5 super_netperf 100 -H 192.168.33.1 -t TCP_RR Before: 628560 628056 622103 622744 627202 [...] 268,803,947,669 cycles ( +- 0.09% ) After: 636300 634106 634984 638555 634188 [...] 259,237,291,449 cycles ( +- 0.19% ) Signed-off-by:
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Benjamin Poirier authored
Tracing the driver operation reveals that the INTR_EN_EN bit (per-queue interrupt control) does not immediately prevent rx completion interrupts when the device is operating in INTx mode. This leads to interrupts being raised while napi is scheduled/running. Those interrupts are ignored by qlge_isr() and falsely reported as IRQ_NONE thanks to the irq_cnt scheme. This in turn can cause frames to loiter in the receive queue until a later frame leads to another rx interrupt that will schedule napi. Use the INTR_EN_EI bit (master interrupt control) instead. Signed-off-by:
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Jérôme Pouiller authored
Finish to fill struct ieee80211_ops with necessary callbacks. Driver is now ready to be registered to mac80211. Signed-off-by:
Jérôme Pouiller <jerome.pouiller@silabs.com> Link: https://lore.kernel.org/r/20190919142527.31797-21-Jerome.Pouiller@silabs.comSigned-off-by:
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Jérôme Pouiller authored
wfx_set_key() mostly copy bytes on correct offsets. A big piece of code for a simple work. Unfortunately, I did not found any way to factorize it. Signed-off-by:
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Jérôme Pouiller authored
Chip can make foreground scan or background, but both can't be mixed in same request. So, we need to split each mac80211 requests into multiple HIF requests. Signed-off-by:
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Jérôme Pouiller authored
Again, this task is more complex than it should since driver try to handle itself power saving of stations. Signed-off-by:
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Jérôme Pouiller authored
Three things make this task more complex than it should: - Chip necessitate to associate a link-id to each station. It is same thing than association ID but, using 8 bits only. - Rate policy is sent separately from Tx frames - Driver try to handle itself power saving of stations and multicast data Signed-off-by: -
Jérôme Pouiller authored
Add traces when debug events happen and allow to ask internal information to chip. These features work independently from mac80211. Signed-off-by:
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Jérôme Pouiller authored
A few tasks remain to be done in order to finish chip initial configuration: - configure chip to use multi-tx confirmation (speed up data transfer) - configure chip to use wake-up feature (save power consumption during runtime) - set hardware configuration (clocks, RF, pinout, etc...) using a Platform Data Set (PDS) file On release, driver completely shutdown the chip to save power consumption. Documentation about PDS and PDS data for sample boards are available here[1]. One day, PDS data may find a place in device tree but, currently, PDS is too much linked with firmware to allowing that. This patch also add "send_pds" file in debugfs to be able to dynamically change PDS (only for debug, of course). [1]: https://github.com/SiliconLabs/wfx-firmware/tree/master/PDSSigned-off-by: -
Jérôme Pouiller authored
Chip support encryption of the link between host and chip. This feature is called "secure link". Driver code on github[1] support it. However, it relies on mbedtls for cryptographic functions. So, I decided to not import this feature in current patch. However, in order to keep code synchronized between github and kernel, I imported all code related to this feature, even if most of it is just no-op. [1]: https://github.com/SiliconLabs/wfx-linux-driver/Signed-off-by:
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Jérôme Pouiller authored
Provide an abstraction for HIF commands. Signed-off-by:
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Jérôme Pouiller authored
Chip has multiple input buffers and can handle multiple 802.11 frames in parallel. However, other HIF command must be sent sequentially. wsm_send_cmd() handles these requests. This commit also add send_hif_cmd in debugfs. This file allows to send arbitrary commands to chip. It can be used for debug and testing. Signed-off-by:
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Jérôme Pouiller authored
Allocate a struct ieee80211_hw but do not yet register it. Signed-off-by:
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Jérôme Pouiller authored
Once firmware is loaded, it send a first indication to host. This indication signalize that host can start to communicate with firmware. In add, it contains information about chip and firmware (MAC addresses, firmware version, etc...). Signed-off-by:
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Jérôme Pouiller authored
These tracepoints decode HIF headers and provide more human readable results. Signed-off-by:
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Jérôme Pouiller authored
bh_work() is in charge to schedule all HIF message from/to chip. On normal operation, when an IRQ is received, driver can get size of next message in control register. In order to save control register access, when chip send a message, it also appends a copy of control register after the message (this register is not accounted in message length declared in message header, but must accounted in bus request). This copy of control register is called "piggyback". It also handles a power saving mechanism specific to WFxxx series. This mechanism is based on a GPIO called "wakeup" GPIO. Obviously, this gpio is not part of SPI/SDIO standard buses and must be declared independently (this is the main reason for why SDIO mode try to get parameters from DT). When wakeup is enabled, host can communicate with chip only if it is awake. To wake up chip, there are two cases: - host receive an IRQ from chip (chip initiate communication): host just have to set wakeup GPIO before reading data - host want to send data to chip: host set wakeup GPIO, then wait for an IRQ (in fact, wait for an empty message) and finally send data bh_work() is also in charge to track usage of chip buffers. Normally each request expect a confirmation. However, you can notice that special "multi tx" confirmation can acknowledge multiple requests at time. Finally, note that wfx_bh_request_rx() is not atomic (because of control_reg_read()). So, in SPI mode, hard-irq handler only postpone all processing to wfx_spi_request_rx(). Signed-off-by: -
Jérôme Pouiller authored
These files are shared with firmware sources. Only a subset of these definitions are used by driver but, for now, it is easier to import all. API defines 3 kinds of messages: - Requests (req) are sent from host to chip - Confirmations (cnf) are sent by chip and are always in reply to a request - Indications (ind) are spontaneous message from chip to host One request normally generate one confirmation. There are a few exceptions to this rule: - "shutdown" request is not acknowledged - multiple tx request can be acknowledged a unique "multi-tx" confirmation In add, API defines MIB. They are sub-structures for write_mib and read_mib API. Note that all numbers in API have to be little endian when sent/received from/to chip (I didn't declared them with __le32 because driver also use them internally). Signed-off-by: -
Jérôme Pouiller authored
A firmware is necessary to run the chip. wfx_init_device() is in charge of loading firmware on chip and doing low level initialization. Firmwares for WF200 are available here: https://github.com/SiliconLabs/wfx-firmware/ Note that firmware are encrypted. Driver checks that key used to encrypt firmware match with key burned into chip. Currently, "C0" key is used for production chips. Signed-off-by:
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Jérôme Pouiller authored
Some tracepoints are useful for debugging. Signed-off-by:
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Jérôme Pouiller authored
hwio.c provides an abstraction to access different types of register of the chip. Note that only data register (aka FRAME_OUT) and control register are used normal communication. Other registers are only used during chip start up. Signed-off-by:
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Jérôme Pouiller authored
Introduce bus level communication layer. At this level, 7 registers can be addressed. Notice that SPI driver is able to manage chip reset. SDIO mode relies on an external driver (`mmc-pwrseq`) to reset chip. Signed-off-by:
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Jérôme Pouiller authored
Instantiate build infrastructure WFx driver. This driver provides support for Wifi chipset Silicon Labs WF200 and further: https://www.silabs.com/documents/public/data-sheets/wf200-datasheet.pdf This chip support SPI and SDIO bus. SDIO interface has two particularities: 1. Some parameters may be useful for end user (I will talk about gpio_wakeup later). 2. The SDIO VID and PID of WF200 are 0000:0001 which are too much generic to rely on. So, current code checks VID/PID and looks for a node in DT (since WF200 targets embedded platforms, I don't think it is a problem to rely on DT). DT can also be used to define to parameters for driver. Currently, if no node is found, a warning is emitted, but it could be changed in error. Signed-off-by:
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Valdis Klētnieks authored
We've seen several incorrect patches for fs_sync() calls in the exfat driver. Add code to the TODO that explains this isn't just a delete code and refactor, but that actual analysis of when the filesystem should be flushed to disk needs to be done. Signed-off-by:
Valdis Kletnieks <valdis.kletnieks@vt.edu> Link: https://lore.kernel.org/r/9837.1570042895@turing-policeSigned-off-by:
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Valdis Klētnieks authored
The majority of them were totally backwards. Change the logic so that if DELAYED_SYNC *isn't* in the config, we actually flush to disk before flagging the file system as clean. That leaves two calls in the DELAYED_SYNC case. More detailed analysis is needed to make sure that's what's really needed, or if other call sites also need a fs_sync() call. This patch is at least "less wrong" than the code was, but further changes should be another patch. Signed-off-by:
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