- 17 Jul, 2016 7 commits
-
-
Bartosz Golaszewski authored
Split at24_eeprom_write() into three smaller functions - one for the i2c operations and two for the smbus extensions (separate routines for block and byte transfers). Assign them in at24_probe() depending on the bus capabilities. Also: in order to avoid duplications move code adjusting the count argument into a separate function and use it for i2c and smbus block writes (no need for a roll-over for byte writes as we're always writing one byte). Signed-off-by: Bartosz Golaszewski <bgolaszewski@baylibre.com> Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
-
Bartosz Golaszewski authored
Split at24_eeprom_read() into two smaller functions - one for the i2c operations and one for the smbus extensions. Assign them in at24_probe() depending on the bus capabilities. Also: in order to avoid duplications move the comments related to offset calculations above the at24_translate_offset() routine. Signed-off-by: Bartosz Golaszewski <bgolaszewski@baylibre.com> Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
-
Bartosz Golaszewski authored
Before splitting the read/write routines into smaller, more specialized functions, unduplicate some code in advance. Use a 'for' loop instead of 'do while' when waiting for the previous write to complete and hide it behind a macro. Signed-off-by: Bartosz Golaszewski <bgolaszewski@baylibre.com> Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
-
Bartosz Golaszewski authored
The first step in simplifying the read and write functions is to call them via function pointers stored in at24_data. When we eventually split the routines into smaller ones (depending on whether they use smbus or i2c operations) we'll simply assign them to said pointers instead of checking the flags at runtime every time we read/write. Signed-off-by: Bartosz Golaszewski <bgolaszewski@baylibre.com> Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
-
Bartosz Golaszewski authored
Align the arguments in broken lines with the arguments list's opening brackets and make checkpatch.pl happy by converting 'unsigned' into 'unsigned int'. Signed-off-by: Bartosz Golaszewski <bgolaszewski@baylibre.com> Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
-
Bartosz Golaszewski authored
In preparation for splitting at24_eeprom_write() & at24_eeprom_read() into smaller, specialized routines move at24_read() below, so that it won't be intertwined with the low-level EEPROM accessors. Signed-off-by: Bartosz Golaszewski <bgolaszewski@baylibre.com> Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
-
Bartosz Golaszewski authored
As part of the preparation for introducing support for more chips, improve the readability of the device table by separating columns with tabs. Signed-off-by: Bartosz Golaszewski <bgolaszewski@baylibre.com> Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
-
- 15 Jul, 2016 4 commits
-
-
Abhishek Sahu authored
1. The current QCOM I2C driver code is failing for transfer length greater than 255. This is happening due to improper segments length as the I2C DMA segments can be maximum of 256 bytes. 2. The transfer length tlen was being initialized with 0 for 256 bytes, which is being passed for DMA mappings resulting in improper DMA mapping length. This patch fixes the above said problems by initializing the block count with the values calculated in qup_i2c_set_blk_data and calculating the remaining length for last DMA segment. Also, the block data length need to be decremented after each transfer. Additionally, this patch corrects the tlen assignment for DMA mapping. Signed-off-by: Abhishek Sahu <absahu@codeaurora.org> Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
-
Abhishek Sahu authored
1. Current QCOM I2C driver hangs when sending data to address 0x03-0x07 in some scenarios. The QUP controller generates invalid write in this case, since these addresses are reserved for different bus formats. 2. Also, the error handling is done by I2C QUP ISR in the case of DMA mode. The state need to be RESET in case of any error for clearing the available data in FIFO, which otherwise leaves the BAM DMA controller in hang state. This patch fixes the above two issues by clearing the error bits from I2C and QUP status in ISR in case of I2C error, QUP error and resets the QUP state to clear the FIFO data. Signed-off-by: Abhishek Sahu <absahu@codeaurora.org> Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
-
Jaedon Shin authored
The driver transfer to a message with NOACK always in any size. If client (eg. EDID segment point message) needs NOACK condition, it can use I2C_M_IGNORE_NAK flag. Signed-off-by: Jaedon Shin <jaedon.shin@gmail.com> Acked-by: Kamal Dasu <kdasu.kdev@gmail.com> Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
-
Jaedon Shin authored
The BCM7xxx ARM and MIPS based SoCs share a similar I2C hardware block. Signed-off-by: Jaedon Shin <jaedon.shin@gmail.com> Acked-by: Florian Fainelli <f.fainelli@gmail.com> Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
-
- 14 Jul, 2016 11 commits
-
-
Jarkko Nikula authored
ACPI 5 specification doesn't have property for the I2C bus speed but I2cSerialBus resource descriptors which define each controller-slave connection define the maximum speed supported by that connection. Thus finding the maximum safe speed for the bus is to walk all I2cSerialBus resources that are associated to I2C controller and use the speed of slowest connection. Add function i2c_acpi_find_bus_speed() to the i2c-core that adapter drivers can call prior registering itself to core. This implies two-step walk through the I2cSerialBus resources: call to i2c_acpi_find_bus_speed() does the first scan and finds the safe bus speed that adapter drivers can set up. Adapter driver registration does the second scan when i2c-core creates the I2C slaves by calling the i2c_acpi_register_devices(). In that way the bus speed is set in case slave device probe gets called during registration and does communication. Implement this by reusing the existing ACPI I2C walk routines in the i2c-core. Extend them so that slowest connection speed is saved during the walk and I2C slaves are registered only when calling through the i2c_acpi_register_devices() with the i2c_adapter pointer. Signed-off-by: Jarkko Nikula <jarkko.nikula@linux.intel.com> Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Acked-by: Mika Westerberg <mika.westerberg@linux.intel.com> Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
-
Jarkko Nikula authored
I2C ACPI enumeration was originally implemented in another module under drivers/acpi/ but was later moved into i2c-core with added support for I2C ACPI operation region. Rename these acpi_i2c_ prefixed functions, structures and defines in i2c-core to i2c_acpi_ in order to have more consistent name space. Signed-off-by: Jarkko Nikula <jarkko.nikula@linux.intel.com> Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Acked-by: Mika Westerberg <mika.westerberg@linux.intel.com> Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
-
Wolfram Sang authored
Now that we revisited all error messages, we can use pr_fmt for the remaining pr_* messages to ensure consistent output. Signed-off-by: Wolfram Sang <wsa-dev@sang-engineering.com> Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
-
Wolfram Sang authored
Use a warning loglevel instead of info and switch to dev_* for device info. Also print which client was accessed. Signed-off-by: Wolfram Sang <wsa-dev@sang-engineering.com> Acked-by: Mika Westerberg <mika.westerberg@linux.intel.com> Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
-
Wolfram Sang authored
Use dev_err instead of pr_err for more details. Signed-off-by: Wolfram Sang <wsa-dev@sang-engineering.com> Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
-
Wolfram Sang authored
Fix some whitespace issues while here. Signed-off-by: Wolfram Sang <wsa-dev@sang-engineering.com> Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
-
Wolfram Sang authored
Switch to WARN if no adapter name is given, otherwise we won't know who missed to do that. Add error message if device registration fails. Update error message for missing algo to match style of the others. Signed-off-by: Wolfram Sang <wsa-dev@sang-engineering.com> Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
-
Wolfram Sang authored
Move recovery init to a seperate function to let have i2c_register_adapter() less lines and to avoid goto and a label. Refactor string handling there for consistency and to save some bytes. Signed-off-by: Wolfram Sang <wsa-dev@sang-engineering.com> Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
-
Wolfram Sang authored
On error, we should give idr back to the pool in any case. Signed-off-by: Wolfram Sang <wsa-dev@sang-engineering.com> Reviewed-by: Jean Delvare <jdelvare@suse.de> Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
-
Axel Lin authored
Use devm_* APIs to simplify the code a bit. This patch also fixes the memory leak when unload the module. Signed-off-by: Axel Lin <axel.lin@ingics.com> Tested-by: Liviu Dudau <Liviu.Dudau@arm.com> Acked-by: Liviu Dudau <Liviu.Dudau@arm.com> Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
-
Axel Lin authored
There is no build dependency for this driver, so enable COMPILE_TEST to get better build coverage. Signed-off-by: Axel Lin <axel.lin@ingics.com> Tested-by: Liviu Dudau <Liviu.Dudau@arm.com> Acked-by: Liviu Dudau <Liviu.Dudau@arm.com> Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
-
- 08 Jul, 2016 3 commits
-
-
Tanmay Jagdale authored
Added ACPI support for the I2C controller present on Broadcom's Vulcan ARM64 processor. ACPI ID used by the controller is BRCM9007. Changed the xlp9xx_i2c_get_frequency() function to use device_property_read_u32() API so that the "clock-frequency" value can be read from _DSD in ACPI mode. Signed-off-by: Tanmay Jagdale <tanmay.jagdale@broadcom.com> Reviewed-by: Mika Westerberg <mika.westerberg@linux.intel.com> Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
-
Ben Dooks authored
This driver should be buildable with COMPILE_TEST so add this to the dependency for it. Signed-off-by: Ben Dooks <ben.dooks@codethink.co.uk> Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
-
viresh kumar authored
There is no code protecting i2c_dev to be freed after it is returned from i2c_dev_get_by_minor() and using it to access the value which we already have (minor) isn't safe really. Avoid using it and get the adapter directly from 'minor'. Signed-off-by: Viresh Kumar <viresh.kumar@linaro.org> Reviewed-by: Jean Delvare <jdelvare@suse.de> Tested-by: Jean Delvare <jdelvare@suse.de> Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
-
- 05 Jul, 2016 2 commits
-
-
Andy Shevchenko authored
There are more than 7 busses, but only 7 are user visible. Update comment accordingly. Acked-by: Jarkko Nikula <jarkko.nikula@linux.intel.com> Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
-
Benjamin Tissoires authored
The i801 chip can handle the Host Notify feature since ICH 3 as mentioned in http://www.intel.com/content/dam/doc/datasheet/82801ca-io-controller-hub-3-datasheet.pdf Enable the functionality unconditionally and propagate the alert on each notification. With a T440s and a Synaptics touchpad that implements Host Notify, the payload data is always 0x0000, so I am not sure if the device actually sends the payload or if there is a problem regarding the implementation. Tested-by: Andrew Duggan <aduggan@synaptics.com> Signed-off-by: Benjamin Tissoires <benjamin.tissoires@redhat.com> Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
-
- 01 Jul, 2016 1 commit
-
-
Ellen Wang authored
On a CRC error while using hardware-supported PEC, an additional error bit is set in the auxiliary status register. If this bit isn't cleared, all subsequent operations will fail, essentially hanging the controller. The fix is simple: check, report, and clear the bit in i801_check_post(). Also, in case the driver starts with the hardware in that state, clear it in i801_check_pre() as well. Signed-off-by: Ellen Wang <ellen@cumulusnetworks.com> Tested-by: Jean Delvare <jdelvare@suse.de> Reviewed-by: Jean Delvare <jdelvare@suse.de> Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
-
- 19 Jun, 2016 7 commits
-
-
William Breathitt Gray authored
This driver does not do anything special in module init/exit. This patch eliminates the module init/exit boilerplate code by utilizing the module_isa_driver macro. Signed-off-by: William Breathitt Gray <vilhelm.gray@gmail.com> [wsa: remove two empty lines while here] Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
-
William Breathitt Gray authored
This driver does not do anything special in module init/exit. This patch eliminates the module init/exit boilerplate code by utilizing the module_isa_driver macro. Signed-off-by: William Breathitt Gray <vilhelm.gray@gmail.com> Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
-
Andy Shevchenko authored
Simply sort header block alphabetically. While here fix an indentation in one place and update a copyright line for Intel. Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Acked-by: Jarkko Nikula <jarkko.nikula@linux.intel.com> Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
-
Andy Shevchenko authored
This patch enables I2C controllers found on Intel Edison board. Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Acked-by: Jarkko Nikula <jarkko.nikula@linux.intel.com> Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
-
Andy Shevchenko authored
On some platforms, such as Intel Medfield, the I2C slave devices are enumerated through SFI tables where bus numbering is expected to be defined in the OS. Make the bus number allocation robust for such platforms. Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Acked-by: Jarkko Nikula <jarkko.nikula@linux.intel.com> Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
-
Jarkko Nikula authored
I believe i2c-designware-baytrail.c doesn't have strict dependency that Intel SoC IOSF Sideband support must be always built-in in order to be able to compile support for Intel Baytrail I2C bus sharing HW semaphore. Redefine build dependencies so that CONFIG_IOSF_MBI=y is required only when CONFIG_I2C_DESIGNWARE_PLATFORM is built-in. Signed-off-by: Jarkko Nikula <jarkko.nikula@linux.intel.com> Acked-by: David Box <david.e.box@linux.intel.com> Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
-
Weifeng Voon authored
This allows applications to set the transfer timeout in 10ms increments via ioctl I2C_TIMEOUT. Signed-off-by: Weifeng Voon <weifeng.voon@intel.com> Acked-by: Jarkko Nikula <jarkko.nikula@linux.intel.com> Acked-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de> Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
-
- 18 Jun, 2016 3 commits
-
-
Naveen Kaje authored
qup_i2c_issue_read() derives the address from i2c_msg. This called in the read path when I2C_M_RD flag is set. Therefore, use the 8 bit address helper function. Signed-off-by: Naveen Kaje <nkaje@codeaurora.org> Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
-
Sricharan R authored
Among the bus errors reported from the QUP_MASTER_STATUS register only NACK is considered and transfer gets suspended, while other errors are ignored. Correct this and suspend the transfer for other errors as well. This avoids unnecessary 'timeouts' which happens when waiting for events that would never happen when there is already an error condition on the bus. Also the error handling procedure should be the same for both NACK and other bus errors in case of dma mode. So correct that as well. Signed-off-by: Sricharan R <sricharan@codeaurora.org> Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
-
Sricharan R authored
With CONFIG_DEBUG_SG is enabled and when dma mode is used, below dump is seen, ------------[ cut here ]------------ kernel BUG at include/linux/scatterlist.h:140! Internal error: Oops - BUG: 0 [#1] PREEMPT SMP Modules linked in: CPU: 0 PID: 1 Comm: swapper/0 Not tainted 4.4.0-00459-g9f087b9-dirty #7 Hardware name: Qualcomm Technologies, Inc. APQ 8016 SBC (DT) task: ffffffc036868000 ti: ffffffc036870000 task.ti: ffffffc036870000 PC is at qup_sg_set_buf.isra.13+0x138/0x154 LR is at qup_sg_set_buf.isra.13+0x50/0x154 pc : [<ffffffc0005a0ed8>] lr : [<ffffffc0005a0df0>] pstate: 60000145 sp : ffffffc0368735c0 x29: ffffffc0368735c0 x28: ffffffc036873752 x27: ffffffc035233018 x26: ffffffc000c4e000 x25: 0000000000000000 x24: 0000000000000004 x23: 0000000000000000 x22: ffffffc035233668 x21: ffffff80004e3000 x20: ffffffc0352e0018 x19: 0000004000000000 x18: 0000000000000028 x17: 0000000000000004 x16: ffffffc0017a39c8 x15: 0000000000001cdf x14: ffffffc0019929d8 x13: ffffffc0352e0018 x12: 0000000000000000 x11: 0000000000000001 x10: 0000000000000001 x9 : ffffffc0012b2d70 x8 : ffffff80004e3000 x7 : 0000000000000018 x6 : 0000000030000000 x5 : ffffffc00199f018 x4 : ffffffc035233018 x3 : 0000000000000004 x2 : 00000000c0000000 x1 : 0000000000000003 x0 : 0000000000000000 Process swapper/0 (pid: 1, stack limit = 0xffffffc036870020) Stack: (0xffffffc0368735c0 to 0xffffffc036874000) sg_set_bug expects that the buf parameter passed in should be from lowmem and a valid pageframe. This is not true for pages from dma_alloc_coherent which can be carveouts, hence the check fails. Change allocation of sg buffers from dma_coherent memory to kzalloc to fix the issue. Note that now dma_map/unmap is used to make the kzalloc'ed buffers coherent before passing it to the dmaengine. Signed-off-by: Sricharan R <sricharan@codeaurora.org> Reviewed-by: Andy Gross <andy.gross@linaro.org> Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
-
- 17 Jun, 2016 2 commits
-
-
David Wu authored
Implement fast mode plus that allows bus speeds of up to 1MHz. Signed-off-by: David Wu <david.wu@rock-chips.com> Reviewed-by: Douglas Anderson <dianders@chromium.org> Tested-by: Caesar Wang <wxt@rock-chips.com> Reviewed-by: Heiko Stuebner <heiko@sntech.de> Tested-by: Heiko Stuebner <heiko@sntech.de> Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
-
David Wu authored
- new method to caculate i2c timings for rk3399: There was an timing issue about "repeated start" time at the I2C controller of version0, controller appears to drop SDA at .875x (7/8) programmed clk high. On version 1 of the controller, the rule(.875x) isn't enough to meet tSU;STA requirements on 100k's Standard-mode. To resolve this issue, sda_update_config, start_setup_config and stop_setup_config for I2C timing information are added, new rules are designed to calculate the timing information at new v1. - pclk and function clk are separated at rk3399 Signed-off-by: David Wu <david.wu@rock-chips.com> Tested-by: Caesar Wang <wxt@rock-chips.com> Tested-by: Heiko Stuebner <heiko@sntech.de> Reviewed-by: Douglas Anderson <dianders@chromium.org> [wsa: fixed whitespace issue] Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
-