- 28 Apr, 2013 1 commit
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Wei Yongjun authored
Since we will remove items off the list using list_del_init() we need to use a safe version of the list_for_each_entry() macro aptly named list_for_each_entry_safe(). Signed-off-by: Wei Yongjun <yongjun_wei@trendmicro.com.cn> Signed-off-by: Mark Brown <broonie@sirena.org.uk>
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- 25 Apr, 2013 1 commit
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Wei Yongjun authored
Add the missing platform_driver_unregister() before return from pch_spi_init() in the error handling case. Signed-off-by: Wei Yongjun <yongjun_wei@trendmicro.com.cn> Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
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- 24 Apr, 2013 5 commits
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Wenyou Yang authored
Signed-off-by: Wenyou Yang <wenyou.yang@atmel.com> Tested-by: Richard Genoud <richard.genoud@gmail.com> Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
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Richard Genoud authored
Signed-off-by: Richard Genoud <richard.genoud@gmail.com> [wenyou.yang@atmel.com: added spi nodes for the sam9263ek, sam9g20ek, sam9m10g45ek and sam9n12ek boards] [wenyou.yang@atmel.com: submit the patch] Signed-off-by: Wenyou Yang <wenyou.yang@atmel.com> Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
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Richard Genoud authored
Signed-off-by: Richard Genoud <richard.genoud@gmail.com> [wenyou.yang@atmel.com: add spi nodes for sam9260, sam9263, sam9g45 and sam9n12] [wenyou.yang@atmel.com: remove spi property "cs-gpios" to the board dts files] [wenyou.yang@atmel.com: submit the patch] Signed-off-by: Wenyou Yang <wenyou.yang@atmel.com> Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
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Richard Genoud authored
Signed-off-by: Richard Genoud <richard.genoud@gmail.com> [<wenyou.yang@atmel.com: declare the spi clocks for sam9260, at91sam9g45, and at91sam9n12] [wenyou.yang@atmel.com: submit the patch] Signed-off-by: Wenyou Yang <wenyou.yang@atmel.com> Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
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Nicolas Ferre authored
Add dmaengine support. Using "has_dma_support" member of struct is used to select the transfer mode: dmaengine or pdc. For the dmaengine transfer mode, it supports both 8 bits and 16 bits transfer. For the dmaengine transfer mode, if it fails to config dmaengine, or if the message length is less than 16 bytes, it will use the PIO transfer mode. Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com> [wenyou.yang@atmel.com: using "has_dma_support" to select dmaengine as the spi xfer mode] [wenyou.yang@atmel.com: fix DMA: OOPS if buffer > 4096 bytes] [wenyou.yang@atmel.com: submit the patch] Signed-off-by: Wenyou Yang <wenyou.yang@atmel.com> Signed-off-by: Richard Genoud <richard.genoud@gmail.com> [richard.genoud@gmail.com: update with dmaengine interface] [richard.genoud@gmail.com: fix __init/__devinit sections mismatch] [richard.genoud@gmail.com: adapt to slave_config changes] [richard.genoud@gmail.com: add support t0 16 bits transfer] Tested-by: Richard Genoud <richard.genoud@gmail.com> Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
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- 23 Apr, 2013 3 commits
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Nicolas Ferre authored
Will allow to drop the lock during DMA operations. Replacing non-irqsave versions with irqsave versions of the lock to make it correct in both pdc and dmaengine transfer mode Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com> [wenyou.yang@atmel.com: submit the patch] Signed-off-by: Wenyou Yang <wenyou.yang@atmel.com> Tested-by: Richard Genoud <richard.genoud@gmail.com> Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
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Nicolas Ferre authored
Needed for future use with dmaengine enabled driver. Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com> [wenyou.yang@atmel.com: submit the patch] Signed-off-by: Wenyou Yang <wenyou.yang@atmel.com> Tested-by: Richard Genoud <richard.genoud@gmail.com> Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
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Arnd Bergmann authored
This fixes building the spi-sirf driver as a loadable module, which uses an incorrect MODULE_DEVICE_TABLE, by changing the reference to the correct symbol. Signed-off-by: Arnd Bergmann <arnd@arndb.de> Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
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- 18 Apr, 2013 4 commits
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Mark Brown authored
Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
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Mark Brown authored
Don't silently ignore errors, report them. Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
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Mark Brown authored
The multiplatform conversion in commit 788437 (spi: s3c64xx: move to generic dmaengine API) tested for the use of the Samsung-specific DMA API with SAMSUNG_DMADEV when in fact S3C_DMA should be used. This renderd DMA based transfers non-functional on platforms not using dmaengine. Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
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Wei Yongjun authored
Fix to return a negative error code from the error handling case instead of 0, as returned elsewhere in this function. Signed-off-by: Wei Yongjun <yongjun_wei@trendmicro.com.cn> Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
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- 16 Apr, 2013 2 commits
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Thomas Abraham authored
With device core now able to setup the default pin configuration, the pin configuration code based on the deprecated Samsung specific gpio bindings is removed. Signed-off-by: Thomas Abraham <thomas.abraham@linaro.org> Signed-off-by: Doug Anderson <dianders@chromium.org> Acked-by: Linus Walleij <linus.walleij@linaro.org> Reviewed-by: Doug Anderson <dianders@chromium.org> Tested-by: Doug Anderson <dianders@chromium.org> Signed-off-by: Grant Likely <grant.likely@linaro.org>
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Grant Likely authored
I've taken a full time position with Linaro and so I'll be using my Linaro email address from this point on. It has also been many years since I've touched any of the Xilinx related code so mark those items as unmaintained. In addition, Mark Brown is taking the lead on SPI maintainership now, so I've reversed the order of our names for that entry. Signed-off-by: Grant Likely <grant.likely@linaro.org> Cc: Mark Brown <broonie@opensource.wolfsonmicro.com> Cc: Linus Walleij <linus.walleij@linaro.org> Cc: Rob Herring <rob.herring@calxeda.com>
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- 15 Apr, 2013 1 commit
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Tony Lindgren authored
Selecting CONFIG_DMADEVICES is optional, and we must be able to continue even without DMA. Otherwise things like omap4430sdp nfsroot will fail if DMA is not selected. Note that the driver already supports PIO mode, but we fail to fall back to PIO if requesting DMA channels fails. Signed-off-by: Tony Lindgren <tony@atomide.com> Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
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- 12 Apr, 2013 1 commit
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Arnd Bergmann authored
The spi-s3c64xx uses a Samsung proprietary interface for talking to the DMA engine, which does not work with multiplatform kernels. This version of the patch leaves the old code in place, behind an #ifdef. This can be removed in the future, after the s3c64xx platform start supporting the regular dmaengine interface. An earlier version of this patch was tested successfully on exynos5250 by Padma Venkat. The conversion was rather mechanical, since the samsung interface is just a shallow wrapper around the dmaengine interface. Signed-off-by: Arnd Bergmann <arnd@arndb.de>
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- 10 Apr, 2013 1 commit
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Josef Ahmad authored
spi_bitbang_setup() deasserts the chip select line to initialise the device. The chip select GPIO line is obtained from spi_gpio->cs_gpios[] private data. Currently, devices that are not registered under devicetree environment will call into spi_bitbang_setup() with stale cs_gpios[]. This patch ensures spi_gpio->cs_gpios[] is always initialised prior to calling spi_bitbang_setup(). Reviewed-by: Daniel Mack <zonque@gmail.com> Signed-off-by: Josef Ahmad <josef.ahmad@intel.com> Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
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- 09 Apr, 2013 2 commits
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Anatolij Gustschin authored
There is no need to disable transmitter/receiver after each loop iteration and re-enable it for next loop iteration. Enable the transmitter/receiver before xfer loop starts and disable it when the whole transfer is done. Signed-off-by: Anatolij Gustschin <agust@denx.de> Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
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Anatolij Gustschin authored
Currently the driver only uses one internal chip select. Add support for gpio chip selects configured by cs-gpios DT binding. Signed-off-by: Anatolij Gustschin <agust@denx.de> Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
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- 08 Apr, 2013 3 commits
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Jonas Gorski authored
speed_hz is a write only member, so we can safely remove it and its generation. Also fixes the missing clk_put after getting the periph clock. Signed-off-by: Jonas Gorski <jogo@openwrt.org> Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
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Wei Yongjun authored
Neither tegra20_spi_cdata nor tegra30_spi_cdata are used outside this file so they can, and should, be static. Signed-off-by: Wei Yongjun <yongjun_wei@trendmicro.com.cn> Reviewed-by: Thierry Reding <thierry.reding@avionic-design.de> Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
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Sachin Kamat authored
Use the newly introduced devm_ioremap_resource() instead of devm_request_and_ioremap() which provides more consistent error handling. devm_ioremap_resource() provides its own error messages; so all explicit error messages can be removed from the failure code paths. Signed-off-by: Sachin Kamat <sachin.kamat@linaro.org> Acked-by: Eric Miao <eric.y.miao@gmail.com> Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
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- 07 Apr, 2013 12 commits
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Laxman Dewangan authored
Add SPI driver for NVIDIA's Tegra114 SPI controller. This controller is different than the older SoCs SPI controller in internal design as well as register interface. This driver supports the: - non DMA based transfer for smaller transfer i.e. less than FIFO depth. - APB DMA based transfer for larger transfer i.e. more than FIFO depth. - Clock gating through runtime PM callbacks. - registration through DT only. Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com> Reviewed-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
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Stephen Warren authored
The platform data header is no longer used. Delete it. Signed-off-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
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Stephen Warren authored
Tegra only supports, and always enables, device tree. Remove all ifdefs and runtime checks for DT support from the driver. Platform data is therefore no longer required. Rework the driver to parse the device tree directly into struct tegra_slink_data. Signed-off-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
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Stephen Warren authored
Tegra only supports, and always enables, device tree. Remove all ifdefs and runtime checks for DT support from the driver. Platform data is therefore no longer required. Rework the driver to parse the device tree directly into struct tegra_sflash_data. Signed-off-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
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Stephen Warren authored
There is no code to set spi->controller_data, and hence the HW CS logic can never trigger. Remove the unused code. Signed-off-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
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Andreas Larsson authored
This relies upon of_spi_register_master to find out which gpios to use. Acked-by: Anton Vorontsov <anton@enomsg.org> Signed-off-by: Andreas Larsson <andreas@gaisler.com> Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
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Andreas Larsson authored
This adds support for the mostly register-compatible SPICTRL cores from the GRLIB VHDL IP core library from Aeroflex Gaisler. They are normally running on SPARC. A different entry in of_fsl_spi_match matches this core and indicates a different hardware type that is used to set up different function pointers and special cases. The GRLIB core operates in cpu mode. The number of bits per word might be limited. There might be native chipselects selected via a slave select register. These differences to the FSL type cores, if present, are indicated by a capabilities register. Other register and function differences exists but are not relevant to the driver. Acked-by: Anton Vorontsov <anton@enomsg.org> Signed-off-by: Andreas Larsson <andreas@gaisler.com> Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
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Andreas Larsson authored
Acked-by: Anton Vorontsov <anton@enomsg.org> Signed-off-by: Andreas Larsson <andreas@gaisler.com> Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
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Andreas Larsson authored
For being able to distinguishing between the regular type of cores and others with different entries in of_fsl_spi_match. Acked-by: Anton Vorontsov <anton@enomsg.org> Signed-off-by: Andreas Larsson <andreas@gaisler.com> Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
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Andreas Larsson authored
spi/spi-fsl-spi: Move setting non-zero tx and rx shifts to a function accessed by a function pointer Acked-by: Anton Vorontsov <anton@enomsg.org> Signed-off-by: Andreas Larsson <andreas@gaisler.com> Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
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Andreas Larsson authored
This is needed for a device in SPI_CS_HIGH mode that otherwise could start out active for the first transaction. Acked-by: Anton Vorontsov <anton@enomsg.org> Signed-off-by: Andreas Larsson <andreas@gaisler.com> Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
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Andreas Larsson authored
This makes the spi-fsl-spi driver usable in CPU mode outside of an FSL_SOC and even an powerpc environment by moving CPM mode functionality to a separate file that is only compiled and linked in an FSL_SOC environment and adding some ifdefs to hide types and functions or provide alternatives. For devicetree probing a "clock-frequency" property is used for clock frequency instead of calls to FSL_SOC-specific functions. Acked-by: Anton Vorontsov <anton@enomsg.org> Signed-off-by: Andreas Larsson <andreas@gaisler.com> Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
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- 03 Apr, 2013 2 commits
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Wei Yongjun authored
Fix to return a negative error code from the error handling case instead of 0, as returned elsewhere in this function. Signed-off-by: Wei Yongjun <yongjun_wei@trendmicro.com.cn> Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
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Mark Brown authored
This reverts commit faa98f7e which was applied in error due to discussion ending up in the wrong thread.
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- 01 Apr, 2013 2 commits
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Jingoo Han authored
Add CONFIG_PM_SLEEP to suspend/resume functions to fix the following build warning when CONFIG_PM_SLEEP is not selected. This is because sleep PM callbacks defined by SET_SYSTEM_SLEEP_PM_OPS are only used when the CONFIG_PM_SLEEP is enabled. drivers/spi/spi-s3c64xx.c:1362:12: warning: 's3c64xx_spi_suspend' defined but not used [-Wunused-function] drivers/spi/spi-s3c64xx.c:1381:12: warning: 's3c64xx_spi_resume' defined but not used [-Wunused-function] Signed-off-by: Jingoo Han <jg1.han@samsung.com> Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
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Mark Brown authored
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