- 31 Dec, 2015 3 commits
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https://github.com/AppliedMicro/xgene-nextArnd Bergmann authored
Merge "Fixes for X-Gene DTS for v4.5" from Duc Dang: This patch set fixes the node names of X-Gene I2C, GPIO controller DT nodes; and also removes I2C clock nodes as the same clock is shared between 2 I2C controllers on X-Gene SoC. * tag 'xgene-dts-fixes-for-v4.5' of https://github.com/AppliedMicro/xgene-next: arm64: dts: X-Gene v2: I2C1 clock is always on arm64: dts: X-Gene v1: I2C0 clock is always on arm64: dts: Fix to use standard DT node names for X-Gene 1 and X-Gene 2 platforms
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Bhupesh Sharma authored
This patch updates the LS2080a DTSI (DTS Include) file to add support for eight SP805 Watchdog units which can be used to reset the eight Cortex-A57 cores available on LS2080A. Signed-off-by: Bhupesh Sharma <bhupesh.sharma@freescale.com> Signed-off-by: Arnd Bergmann <arnd@arndb.de>
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Bhupesh Sharma authored
This patch adds a devicetree binding documentation for ARM's SP805 WatchDog Timer. Signed-off-by: Bhupesh Sharma <bhupesh.sharma@freescale.com> Acked-by: Rob Herring <robh@kernel.org> Signed-off-by: Arnd Bergmann <arnd@arndb.de>
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- 30 Dec, 2015 2 commits
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Duc Dang authored
X-Gene v2 I2C0 and I2C1 controllers share the same clock enable register field. This patch remove clock node for I2C1 and leave I2C1 clock always on as having it toggled on/off will affect I2C0 operation. Signed-off-by: Duc Dang <dhdang@apm.com>
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Duc Dang authored
X-Gene v1 I2C0 and I2C1 controllers share the same clock enable register field. This patch remove clock node for I2C0 and leave I2C0 clock always on as having it toggled on/off will affect I2C1 operation. Signed-off-by: Duc Dang <dhdang@apm.com>
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- 29 Dec, 2015 1 commit
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Duc Dang authored
Use devicetree standard node name for I2C (i2c@...), GFC GPIO (gpio@...), DW GPIO (gpio@...), Standby GPIO (gpio@...). The DT node name of USB (dwusb@...) still needs to be kept to maintain backward compatibility with old firmware. Signed-off-by: Duc Dang <dhdang@apm.com>
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- 22 Dec, 2015 15 commits
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Olof Johansson authored
Merge tag 'v4.5-rockchip-dts64-2' of git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip into next/dt64 New node for the broadcast-timer of the rk3368, a non-critical fix for a regulator voltage and a typo fix. * tag 'v4.5-rockchip-dts64-2' of git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip: arm64: dts: rockchip: Add the broadcast-timer for RK3368 SoC arm64: dts: rockchip: Fix typo in rk3368 sdmmc card detect pin name arm64: dts: rockchip: correct voltage range for rk3368-evb-act8846 board Signed-off-by: Olof Johansson <olof@lixom.net>
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https://github.com/mbgg/linux-mediatekOlof Johansson authored
Update psci support to the arm,psci-1.0 to mt8173 Add display PWM driver to mt8173 Add mediatek general porpose timer to mt8173 * tag 'v4.4-next-arm64' of https://github.com/mbgg/linux-mediatek: arm64: dts: mediatek: mt8173 PSCI-1.0 support arm64: dts: mt8173: add MT8173 display PWM driver support node arm64: dts: mt8173: add timer node Signed-off-by: Olof Johansson <olof@lixom.net>
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Olof Johansson authored
Merge tag 'renesas-arm64-dt3-for-v4.5' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas into next/dt64 Third Round of Renesas ARM64 Based SoC DT Updates for v4.5 * Enable SATA * Add salvator-x part number to DT bindings documentation * Enable all four A57 cores instead of just one * Enhanced audio support: - Use CS2000 as AUDIO_CLK_B - Set ak4613 In/Out pin as single-end * tag 'renesas-arm64-dt3-for-v4.5' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas: arm64: renesas: r8a7795: fix SATA clock assignment arm64: dts: salvator-x: Enable SATA controller arm64: dts: r8a7795: Add SATA controller node arm64: renesas: r8a7795: add internal delay for i2c IPs arm64: renesas: salvator-x: Add board part number to DT bindings arm64: dts: r8a7795: Add pmu device nodes arm64: dts: r8a7795: Add Cortex-A57 CPU cores arm64: dts: r8a7795: Add PSCI node arm64: renesas: salvator-x: use CS2000 as AUDIO_CLK_B arm64: renesas: salvator-x: set ak4613 In/Out pin as single-end Signed-off-by: Olof Johansson <olof@lixom.net>
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Olof Johansson authored
Merge tag 'qcom-arm64-for-4.5' of git://git.kernel.org/pub/scm/linux/kernel/git/agross/linux into next/dt64 Qualcomm ARM64 Updates for v4.5 * Add fixed rate oscillators to dts * Fixup PMIC alias and properties * Change 8916-MTP compatible to be compliant with new scheme * Fix 8x16 UART pinctrl configuration * Add SMEM, RPM/SMD, and PM8916 support on MSM8916 * tag 'qcom-arm64-for-4.5' of git://git.kernel.org/pub/scm/linux/kernel/git/agross/linux: arm64: dts: Add PM8916 support on MSM8916 arm64: dts: qcom: Add RPM/SMD support on MSM8916 arm64: dts: qcom: Add MSM8916 SMEM nodes arm64: dts: set the default i2c pin drive strength to 16mA arm64: dts: fix the i2c aliasing to match to schematics. arm64: dts: qcom: msm8916: Add fixed rate on-board oscillators arm64: dts: qcom: Alias pm8916 on msm8916 devices arm64: dts: qcom: Make msm8916-mtp compatible string compliant arm64: dts: qcom: 8x16: UART1 and UART2 use DMA for RX and TX arm64: dts: qcom: 8x16: UART1 add CTS_N, RTS_N pin configurations Signed-off-by: Olof Johansson <olof@lixom.net>
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https://github.com/Xilinx/linux-xlnxOlof Johansson authored
arm: Xilinx ZynqMP dt patches for v4.5 - Label GPIO controller as interrupt controller * tag 'zynqmp-dt-for-4.5' of https://github.com/Xilinx/linux-xlnx: ARM64: zynqmp: DT: Add interrupt-controller property to GPIO Signed-off-by: Olof Johansson <olof@lixom.net>
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Rob Herring authored
Add label properties to provide a way to identify UARTs based on their board or connector name. This follows naming convention in 96boards CE spec. Ports without external connections are not labelled. Signed-off-by: Rob Herring <robh@kernel.org> Signed-off-by: Olof Johansson <olof@lixom.net>
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Rob Herring authored
Add label properties to provide a way to identify UART, I2C and SPI ports based on their connector names. This follows naming convention in 96boards CE spec. Ports without external connections are not labelled. Signed-off-by: Rob Herring <robh@kernel.org> Cc: Srinivas Kandagatla <srinivas.kandagatla@linaro.org> Cc: Andy Gross <agross@codeaurora.org> Acked-by: Kevin Hilman <khilman@linaro.org> Tested-by: Kevin Hilman <khilman@linaro.org> Signed-off-by: Olof Johansson <olof@lixom.net>
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Rob Herring authored
The LS UART0 is not used by anything else and should be enabled for expansion boards. Signed-off-by: Rob Herring <robh@kernel.org> Cc: Srinivas Kandagatla <srinivas.kandagatla@linaro.org> Cc: Andy Gross <agross@codeaurora.org> Signed-off-by: Olof Johansson <olof@lixom.net>
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Jon Medhurst (Tixy) authored
This patch adds idle-states bindings data collected through a set of benchmarking experiments (latency and energy consumption) on Juno boards. Latencies data represents the worst case scenarios as required by the DT idle-states bindings. Signed-off-by: Jon Medhurst <tixy@linaro.org> Acked-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com> Signed-off-by: Olof Johansson <olof@lixom.net>
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J. German Rivera authored
Added sys-reboot node to the FSL's LS2080A SoC DT to leverage the ARM-generic reboot mechanism for this SoC. This mechanism is enabled through CONFIG_POWER_RESET_SYSCON. Signed-off-by: J. German Rivera <German.Rivera@freescale.com> Signed-off-by: Li Yang <leoli@freescale.com> Signed-off-by: Olof Johansson <olof@lixom.net>
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Shaohui Xie authored
Signed-off-by: Shaohui Xie <Shaohui.Xie@freescale.com> Signed-off-by: Mingkai Hu <Mingkai.Hu@freescale.com> Signed-off-by: Wenbin Song <Wenbin.Song@freescale.com> Signed-off-by: Hou Zhiqiang <B48286@freescale.com> Signed-off-by: Li Yang <leoli@freescale.com> Signed-off-by: Olof Johansson <olof@lixom.net>
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Mingkai Hu authored
LS1043a is an SoC with 4 ARMv8 A53 cores and most other IP blocks are similar to LS1021a which also complies to Freescale Chassis 2.1 spec. Created LS1043a SoC DTSI file to be included by board level DTS files. Signed-off-by: Li Yang <leoli@freescale.com> Signed-off-by: Hou Zhiqiang <B48286@freescale.com> Signed-off-by: Mingkai Hu <Mingkai.Hu@freescale.com> Signed-off-by: Wenbin Song <Wenbin.Song@freescale.com> Signed-off-by: Olof Johansson <olof@lixom.net>
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Mingkai Hu authored
Signed-off-by: Mingkai Hu <Mingkai.Hu@freescale.com> Signed-off-by: Hou Zhiqiang <B48286@freescale.com> Signed-off-by: Li Yang <leoli@freescale.com> Signed-off-by: Olof Johansson <olof@lixom.net>
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Olof Johansson authored
Merge tag 'samsung-dt64-4.5' of https://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux into next/dt64 Samsung DeviceTree ARM64 updates and improvements for 4.5: 1. Add S2MPS15 PMIC node to Espresso board. This gives proper control over regulators, provides 32KHz clocks and RTC driver. 2. Enable HS200 mode operation on Espresso board for MMC0. 3. Add reboot capability (generic syscon-reboot). * tag 'samsung-dt64-4.5' of https://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux: arm64: dts: Add reboot node for exynos7 arm64: dts: Enable HS200 mode operation on exynos7-espresso arm64: dts: Add S2MPS15 PMIC node on exynos7-espresso Signed-off-by: Olof Johansson <olof@lixom.net>
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Masahiro Yamada authored
This is the first ARMv8 SoC from Socionext Inc. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> Signed-off-by: Olof Johansson <olof@lixom.net>
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- 18 Dec, 2015 8 commits
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Ulrich Hecht authored
SATA clock is 815, not 915. Signed-off-by: Ulrich Hecht <ulrich.hecht+renesas@gmail.com> Acked-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
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Kouei Abe authored
This enables SATA device in r8a7795-salvator-x.dts. Signed-off-by: Kouei Abe <kouei.abe.cp@renesas.com> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
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Kouei Abe authored
This adds SATA device node to r8a7795.dtsi. Signed-off-by: Kouei Abe <kouei.abe.cp@renesas.com> [uli: adjusted for new MSTP clock scheme] Signed-off-by: Ulrich Hecht <ulrich.hecht+renesas@gmail.com> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
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Wolfram Sang authored
Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
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Geert Uytterhoeven authored
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
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Yoshifumi Hosoya authored
Enabling the performance monitor unit on r8a7795. Signed-off-by: Masaru Nagai <masaru.nagai.vx@renesas.com> Signed-off-by: Yoshifumi Hosoya <yoshifumi.hosoya.wj@renesas.com> Signed-off-by: Dirk Behme <dirk.behme@gmail.com> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
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Gaku Inami authored
Add Cortex-A57 CPU cores to r8a7795 SoC for a total of 4 x Cortex-A57. Signed-off-by: Gaku Inami <gaku.inami.xw@bp.renesas.com> Signed-off-by: Takeshi Kihara <takeshi.kihara.df@renesas.com> Sigend-off-by: Dirk Behme <dirk.behme@gmail.com> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
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Gaku Inami authored
Add PSCI node for r8a7795 SoC, and cpu node enable-method property is set to "psci". Signed-off-by: Gaku Inami <gaku.inami.xw@bp.renesas.com> Signed-off-by: Takeshi Kihara <takeshi.kihara.df@renesas.com> Signed-off-by: Dirk Behme <dirk.behme@gmail.com> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
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- 17 Dec, 2015 8 commits
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Andy Gross authored
This patch adds the PM8916 regulator nodes found on MSM8916 platforms. Signed-off-by: Andy Gross <agross@codeaurora.org> Acked-by: Bjorn Andersson <bjorn.andersson@sonymobile.com>
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Andy Gross authored
Add support for the SMD and RPM devices found on MSM8916 platforms. Signed-off-by: Andy Gross <agross@codeaurora.org> Acked-by: Bjorn Andersson <bjorn.andersson@sonymobile.com>
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Andy Gross authored
This patch adds the nodes necessary to support the SMEM driver on MSM8916 platforms. Signed-off-by: Andy Gross <agross@codeaurora.org> Acked-by: Bjorn Andersson <bjorn.andersson@sonymobile.com>
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Srinivas Kandagatla authored
2mA drive strength is not enough when we connect multiple i2c devices on the bus with different pull up resistors. This issue was detected when multiple i2c devices connected on the other side of level shifters on Linaro sensor board. Maxing up to 16mA made i2c much stable. Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org> Signed-off-by: Andy Gross <andy.gross@linaro.org>
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Srinivas Kandagatla authored
This patch fixes the i2c bus number aliasing so that it matches with the schematics bus naming. Without this patch the user might would get bus numbers depending on the order the devices are probed. Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org> Signed-off-by: Andy Gross <andy.gross@linaro.org>
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Georgi Djakov authored
Currently the rates of the xo and sleep clocks are hard-coded in the GCC driver, but this is a board layout description that actually should be in the DT. Moving them into DT also allows us to insert the RPM controlled clocks between the DT and GCC clocks. Signed-off-by: Georgi Djakov <georgi.djakov@linaro.org> Signed-off-by: Andy Gross <agross@codeaurora.org>
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Stephen Boyd authored
Add an alias for pm8916 on msm8916 based SoCs so that the newly updated dtbTool can find the pmic compatible string and add the pmic-id element to the QCDT header. Signed-off-by: Stephen Boyd <sboyd@codeaurora.org> Signed-off-by: Andy Gross <agross@codeaurora.org>
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Stephen Boyd authored
This compatible string isn't compliant with the format for subtypes. Replace it with a compliant compatible type. Signed-off-by: Stephen Boyd <sboyd@codeaurora.org> Signed-off-by: Andy Gross <agross@codeaurora.org>
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- 14 Dec, 2015 1 commit
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Soren Brinkmann authored
GPIO can be used as interrupt-controller. Add the missing properties to the GPIO node. Signed-off-by: Soren Brinkmann <soren.brinkmann@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
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- 12 Dec, 2015 2 commits
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Caesar Wang authored
There is a need of a broadcast timer in this case to ensure proper wakeup when the cpus are in sleep mode and a timer expires. Signed-off-by: Caesar Wang <wxt@rock-chips.com> Signed-off-by: Heiko Stuebner <heiko@sntech.de>
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http://github.com/Broadcom/stblinuxArnd Bergmann authored
Merge "Broadcom devicetree-arm64 changes for v4.5" from Florian Fainelli: This pull request contains Broadcom ARM64-based Device Tree changes: - Anup Patel adds L2 cache, SMMU, syscon-based reboot, PMU v3, iProc RNG200 (HWRNG) and NAND flash controller support to the Northstar 2 SoCs - Ray Jui adds the I2C Device Tree nodes to the Norsthar 2 SoCs - Jon Mason enables the clock providers on the Norsthar 2 SoCs * tag 'arm-soc/for-4.5/devicetree-arm64' of http://github.com/Broadcom/stblinux: ARM64: dts: enable clock support for Broadcom NS2 arm64: dts: Add BRCM IPROC NAND DT node for NS2 arm64: dts: Add I2C nodes for NS2 arm64: dts: Add IPROC RNG200 DT node for NS2 arm64: dts: Add ARM PMUv3 DT node in NS2 DT arm64: dts: Add syscon based reboot in DT for NS2 arm64: dts: Add SMMU DT node for NS2 arm64: dts: Add L2-cache DT node for NS2
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