- 17 Feb, 2017 15 commits
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Alexandre Courbot authored
Add a fini() hook to the GR engine. This will be used by gf100+ to properly release the FECS and GPCCS falcons. Signed-off-by: Alexandre Courbot <acourbot@nvidia.com> Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
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Alexandre Courbot authored
Use the falcon library functions in secure boot. This removes a lot of code and makes the secure boot flow easier to understand as no register is directly accessed. Signed-off-by: Alexandre Courbot <acourbot@nvidia.com> Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
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Alexandre Courbot authored
These functions should use the nvkm_secboot_falcon enum. Fix this. Signed-off-by: Alexandre Courbot <acourbot@nvidia.com> Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
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Alexandre Courbot authored
Add a dummy PMU device so the PMU falcon is instanciated and can be used by secure boot. We could reuse gk20a's implementation here, but it would fight with secboot over PMU falcon's ownership and secboot will reset the PMU, preventing it from operating afterwards. Proper handout between secboot and pmu is coming along with the actual gm20b PMU implementation, so use this as a temporary solution. Signed-off-by: Alexandre Courbot <acourbot@nvidia.com> Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
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Alexandre Courbot authored
Use the falcon library functions where relevant. Signed-off-by: Alexandre Courbot <acourbot@nvidia.com> Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
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Alexandre Courbot authored
Some functions always succeed - change their return type to void and remove the error-handling code in their caller. Signed-off-by: Alexandre Courbot <acourbot@nvidia.com> Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
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Alexandre Courbot authored
Use the PMU constructor so that all base members (in particular the falcon instance) are initialized properly. Signed-off-by: Alexandre Courbot <acourbot@nvidia.com> Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
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Alexandre Courbot authored
Have an instance of nvkm_falcon in the PMU structure, ready to be used by other subdevs (i.e. secboot). Signed-off-by: Alexandre Courbot <acourbot@nvidia.com> Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
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Alexandre Courbot authored
Add a PMU constructor so implementations that extend the nvkm_pmu structure can have all base members properly initialized. Signed-off-by: Alexandre Courbot <acourbot@nvidia.com> Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
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Alexandre Courbot authored
Falcon processors are used in various places of GPU chips. Although there exist different versions of the falcon, and some variants exist, the base set of actions performed on them is the same, which results in lots of duplicated code. This patch consolidates the current nvkm_falcon structure and extends it with the following features: * Ability for an engine to obtain and later release a given falcon, * Abstractions for basic operations (IMEM/DMEM access, start, etc) * Abstractions for secure operations if a falcon is secure Abstractions make it easy to e.g. start a falcon, without having to care about its details. For instance, falcons in secure mode need to be started by writing to a different register. Right now the abstractions variants only cover secure vs. non-secure falcon, but more will come as e.g. SEC2 support is added. This is still a WIP as other functions previously done by engine/falcon.c need to be reimplemented. However this first step allows to keep things simple and to discuss basic design. Signed-off-by: Alexandre Courbot <acourbot@nvidia.com> Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
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Alexandre Courbot authored
Add a function that allows us to query whether a given subdev is currently enabled or not. Signed-off-by: Alexandre Courbot <acourbot@nvidia.com> Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
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Alexandre Courbot authored
Constify the local variables declared in these macros so we can pass const pointers to them. Signed-off-by: Alexandre Courbot <acourbot@nvidia.com> Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
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Dave Airlie authored
This reverts commit 1592364d. This apparantly causes some regressions so pull it out for now. Signed-off-by: Dave Airlie <airlied@redhat.com>
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Dave Airlie authored
Merge tag 'omapdrm-4.11-fixes' of git://git.kernel.org/pub/scm/linux/kernel/git/tomba/linux into drm-next omapdrm fixes for v4.11 Fix regressions: - Planes might have been left enabled - Scaling checks did not use the new config Also limit downscaling decimation to prevent HW underflows. * tag 'omapdrm-4.11-fixes' of git://git.kernel.org/pub/scm/linux/kernel/git/tomba/linux: drm/omapdrm: dispc: Refuse x-decimation above 4 for all but 8-bit formats drm/omapdrm: Move commit_modeset_enables() before commit_planes() Revert "drm: omapdrm: Let the DRM core skip plane commit on inactive CRTCs"
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git://people.freedesktop.org/~agd5f/linuxDave Airlie authored
Fixes for 4.11. Highlights: - fix >2 displays on asics with 3 or 5 crtcs - fix SI headless asics - powerplay fixes for new polaris variants - misc fixes * 'drm-next-4.11' of git://people.freedesktop.org/~agd5f/linux: drm/amdgpu: fix warning on older gcc releases drm/ttm: make TTM_MAX_BO_PRIORITY unsigned drm/amd/amdgpu: Fix flow control in uvd_v4_2_stop() drm/amd/powerplay: add didt config table for polaris kicker drm/amd/powerplay: modify VddcPhase value for polaris kicker drm/amd/powerplay: add kicker flag into smumgr drm/amdgpu: Initialize pipe priority order on graphic initialization drm/amdgpu: read hw register to check pg status. drm/amdgpu: Add to initialization of mmVCE_VCPU_CNTL register drm/amdgpu/pm: check for headless before calling compute_clocks drm/amdgpu: use amdgpu_gem_va_check() in amdgpu_gem_va_update_vm() drm/amdgpu: add more cases to DCE11 possible crtc mask setup
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- 16 Feb, 2017 12 commits
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Arnd Bergmann authored
gcc-4.8 warns about '{0}' being used an an initializer for nested structures: drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c: In function ‘gfx_v8_0_ring_emit_ce_meta_init’: drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c:7263:2: warning: missing braces around initializer [-Wmissing-braces] } ce_payload = {0}; drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c: In function ‘gfx_v8_0_ring_emit_de_meta_init’: drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c:7290:2: warning: missing braces around initializer [-Wmissing-braces] } de_payload = {0}; Using an empty {} initializer however has the same effect and works on all versions. Fixes: acad2b2a ("drm/amdgpu:implement CE/DE meta-init routines") Signed-off-by: Arnd Bergmann <arnd@arndb.de> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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Nicolai Hähnle authored
Fix a warning about different types in min() macro in amdgpu: In file included from ./include/linux/list.h:8:0, from drivers/gpu/drm/amd/amdgpu/amdgpu_object.c:32: drivers/gpu/drm/amd/amdgpu/amdgpu_object.c: In function ‘amdgpu_bo_create_restricted’: ./include/linux/kernel.h:739:16: warning: comparison of distinct pointer types lacks a cast (void) (&min1 == &min2); \ ^ ./include/linux/kernel.h:742:2: note: in expansion of macro ‘__min’ __min(typeof(x), typeof(y), \ ^~~~~ drivers/gpu/drm/amd/amdgpu/amdgpu_object.c:434:21: note: in expansion of macro ‘min’ bo->tbo.priority = min(bo->tbo.priority, TTM_MAX_BO_PRIORITY - 1); ^~~ Signed-off-by: Nicolai Hähnle <nicolai.haehnle@amd.com> Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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Tom St Denis authored
Break out of outer loop properly. Signed-off-by: Tom St Denis <tom.stdenis@amd.com> Reported-by: Dan Carpenter <dan.carpenter@oracle.com> Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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Huang Rui authored
Signed-off-by: Huang Rui <ray.huang@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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Huang Rui authored
Signed-off-by: Huang Rui <ray.huang@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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Huang Rui authored
Signed-off-by: Huang Rui <ray.huang@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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Jyri Sarha authored
Let's disable all scaling that requires horizontal decimation with higher factor than 4, until we have better estimates of what we can and can not do. However, NV12 color format appears to work Ok with all decimation factors. When decimating horizontally by more that 4 the dss is not able to fetch the data in burst mode. When this happens it is hard to tell if there enough bandwidth. Despite what theory says this appears to be true also for 16-bit color formats. Signed-off-by: Jyri Sarha <jsarha@ti.com> Acked-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com> Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ti.com>
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Jyri Sarha authored
Move drm_atomic_helper_commit_modeset_enables() call to before drm_atomic_helper_commit_planes() call and have a omap_atomic_wait_for_completion() call after both. With the current dss dispc implementation we have to enable the new modeset before we can commit planes. The dispc ovl configuration relies on the video mode configuration been written into the HW when the ovl configuration is calculated. This approach is not ideal because after a mode change the plane update is executed only after the first vblank interrupt. The dispc implementation should be fixed so that it is able use uncommitted drm state information. information. Signed-off-by: Jyri Sarha <jsarha@ti.com> Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ti.com>
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Jyri Sarha authored
This reverts commit dadf4659. If planes are not disabled when the they are not on any crtc anymore they will remain active and may show as "ghosts" when the crtc they were last on is active again. Signed-off-by: Jyri Sarha <jsarha@ti.com> Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ti.com>
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Dave Airlie authored
Merge branch 'drm-rockchip-next-2017-02-16' of https://github.com/markyzq/kernel-drm-rockchip into drm-next Use iommu for rockchip arm64 platform. * 'drm-rockchip-next-2017-02-16' of https://github.com/markyzq/kernel-drm-rockchip: drm/rockchip: Use common IOMMU API to attach devices drm/rockchip: Do not use DMA mapping API if attached to IOMMU domain
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Dave Airlie authored
Merge tag 'drm-misc-next-fixes-2017-02-15' of git://anongit.freedesktop.org/git/drm-misc into drm-next Fixes for the v4.11 merge window. * tag 'drm-misc-next-fixes-2017-02-15' of git://anongit.freedesktop.org/git/drm-misc: drm: Resurrect atomic rmfb code, v3 uapi: add missing install of dma-buf.h
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https://github.com/vinceab/linuxDave Airlie authored
- remove deprecated stih416 chip functionnalities - fix issues met around gdp panes - fix STI driver unbind procedure - DVI/HDMI mode is automatically detected - allow fps statisitics resetting * tag 'sti-drm-next-2017-02-10' of https://github.com/vinceab/linux: drm/sti: debug fps reset drm/sti: hdmi: automatically check DVI/HDMI mode drm/sti: unbind all components while driver cleanup drm/sti: do not post GDP command if no update drm/sti: do not set gdp pixel clock rate if mode is not set drm/sti: enable gdp pixel clock in atomic_update drm/sti: remove deprecated legacy vtg slave drm/sti: remove deprecated sink_term config drm/sti: do not check hw scaling if mode is not set drm/sti: Fix up crtc_state->event handling drm/sti: use atomic_helper for commit
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- 15 Feb, 2017 3 commits
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Maarten Lankhorst authored
This was somehow lost between v3 and the merged version in Maarten's patch merged as: commit f2d580b9 Author: Maarten Lankhorst <maarten.lankhorst@linux.intel.com> Date: Wed May 4 14:38:26 2016 +0200 drm/core: Do not preserve framebuffer on rmfb, v4. This introduces a slight behavioral change to rmfb. Instead of disabling a crtc when the primary plane is disabled, we try to preserve it. Apart from old versions of the vmwgfx xorg driver, there is nothing depending on rmfb disabling a crtc. Since vmwgfx is a legacy driver we can safely only disable the plane with atomic. If this commit is rejected by the driver then we will still fall back to the old behavior and turn off the crtc. v2: - Remove plane->fb assignment, done by drm_atomic_clean_old_fb. - Add WARN_ON when atomic_remove_fb fails. - Always call drm_atomic_state_put. v3: - Use drm_drv_uses_atomic_modeset - Handle the case where the first plane-disable-only commit fails with -EINVAL. Some drivers do not support this, fall back to disabling all crtc's in this case. Signed-off-by: Daniel Vetter <daniel.vetter@intel.com> Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch> Signed-off-by: Maarten Lankhorst <maarten.lankhorst@linux.intel.com> Signed-off-by: Jani Nikula <jani.nikula@intel.com> Link: http://patchwork.freedesktop.org/patch/msgid/66fc3da5-697b-1613-0a67-a5293209f0dc@linux.intel.com
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Shunqian Zheng authored
Rockchip DRM used the arm special API, arm_iommu_*(), to attach iommu for ARM32 SoCs. This patch convert to common iommu API so it would support ARM64 like RK3399. Since previous patch added support for direct IOMMU address space management, there is no need to use DMA API anymore and this patch wires things to use the new method. Signed-off-by: Shunqian Zheng <zhengsq@rock-chips.com> Signed-off-by: Tomasz Figa <tfiga@chromium.org> Signed-off-by: Mark Yao <mark.yao@rock-chips.com>
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Tomasz Figa authored
The API is not suitable for subsystems consisting of multiple devices and requires severe hacks to use it. To mitigate this, this patch implements allocation and address space management locally by using helpers provided by DRM framework, like other DRM drivers do, e.g. Tegra. This patch should not introduce any functional changes until the driver is made to attach subdevices into an IOMMU domain with the generic IOMMU API, which will happen in following patch. Based heavily on GEM implementation of Tegra DRM driver. Signed-off-by: Tomasz Figa <tfiga@chromium.org> Signed-off-by: Shunqian Zheng <zhengsq@rock-chips.com> Signed-off-by: Mark Yao <mark.yao@rock-chips.com> Signed-off-by: rjan Eide <orjan.eide@arm.com>
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- 14 Feb, 2017 1 commit
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Denys Dmytriyenko authored
As part of c11e391d "dma-buf: Add ioctls to allow userspace to flush" a new uapi header file dma-buf.h was added, but an entry was not added on Kbuild to install it. This patch resolves this omission so that "make headers_install" installs this header. Signed-off-by: Denys Dmytriyenko <denys@ti.com> Reviewed-by: Tomi Valkeinen <tomi.valkeinen@ti.com> Cc: Ville Syrjälä <ville.syrjala@linux.intel.com> Cc: David Herrmann <dh.herrmann@gmail.com> Cc: Sumit Semwal <sumit.semwal@linaro.org> Cc: Daniel Vetter <daniel.vetter@intel.com> Cc: Tiago Vignatti <tiago.vignatti@intel.com> Cc: Daniel Vetter <daniel.vetter@ffwll.ch> Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch> Link: http://patchwork.freedesktop.org/patch/msgid/1487102447-59265-1-git-send-email-denis@denix.org
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- 13 Feb, 2017 3 commits
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ozeng authored
Initialized PIPE_ORDER_TS0/1/2/3 field of SPI_ARB_PRIORITY register to 2. This set the pipe priority order to: 02 - HP3D, CS_H, GFX, CS_M, CS_L Signed-off-by: Oak Zeng <Oak.Zeng@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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Rex Zhu authored
Signed-off-by: Rex Zhu <Rex.Zhu@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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Alan Harrison authored
Add a bit needed during initialization into the driver, where it is supposed to be. Currently, this is happening in the VCE firmware, and although functional, this is the correct place to perform this initialization. Reviewed-by: Leo Liu <leo.liu@amd.com> Signed-off-by: Alan Harrison <Alan.Harrison@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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- 10 Feb, 2017 6 commits
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Alex Deucher authored
Don't update display bandwidth on headless asics. bug: https://bugs.freedesktop.org/show_bug.cgi?id=99387Signed-off-by: Alex Deucher <alexander.deucher@amd.com> Cc: stable@vger.kernel.org
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Samuel Pitoiset authored
This removes code duplication. Reviewed-by: Chunming Zhou <david1.zhou@amd.com> Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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Alex Deucher authored
Add cases for asics with 3 and 5 crtcs. Fixes an artificial limitation on asics with 3 or 5 crtcs. Fixes: https://bugs.freedesktop.org/show_bug.cgi?id=99744Reviewed-by: Michel Dänzer <michel.daenzer@amd.com> Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com> Cc: stable@vger.kernel.org
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Vincent Abriou authored
Reset the fps debug information when 'fps_show' is updated. Signed-off-by: Fabien Dessenne <fabien.dessenne@st.com>
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Vincent Abriou authored
Remove the hdmi_mode_property and use drm_detect_hdmi_monitor function to check whether the connected monitor is HDMI capable or DVI only. Signed-off-by: Vincent Abriou <vincent.abriou@st.com>
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Vincent Abriou authored
Unbind all the components when the STI driver is unregistered. Signed-off-by: Vincent Abriou <vincent.abriou@st.com>
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