- 27 Jun, 2019 12 commits
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Geert Uytterhoeven authored
Sort the definitions for the individual GPIO drivers in the Makefile by object file name. Align all entries while we're at it. Signed-off-by:
Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by:
Linus Walleij <linus.walleij@linaro.org>
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Enrico Weigelt authored
Reduce driver init boilerplate by using the new module_siox_driver() macro. Signed-off-by:
Enrico Weigelt <info@metux.net> Signed-off-by:
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Enrico Weigelt authored
Add more helper macros for trivial driver init cases, similar to the already existing module_platform_driver() or module_i2c_driver(). This helps to reduce driver init boilerplate. Signed-off-by:
Uwe Kleine-König <u.kleine-koenig@pengutronix.de> Signed-off-by:
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Enrico Weigelt, metux IT consult authored
Use the new helper that wraps the calls to platform_get_resource() and devm_ioremap_resource() together. Signed-off-by:
Baolin Wang <baolin.wang@linaro.org> Signed-off-by:
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Enrico Weigelt, metux IT consult authored
Use the new helper that wraps the calls to platform_get_resource() and devm_ioremap_resource() together. this driver deserves a bit more cleanup, to get rid of the global variable giu_base, which makes it single-instance-only. Signed-off-by:
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Enrico Weigelt, metux IT consult authored
don't need the temporary variable "dev", directly use &pdev->dev Signed-off-by:
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Enrico Weigelt, metux IT consult authored
Use the new helper that wraps the calls to platform_get_resource() and devm_ioremap_resource() together. Signed-off-by:
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Enrico Weigelt, metux IT consult authored
Use the new helper that wraps the calls to platform_get_resource() and devm_ioremap_resource() together. Signed-off-by:
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Enrico Weigelt, metux IT consult authored
We already have the struct device* pointer in a local variable, so we can write this a bit shorter. Signed-off-by:
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Enrico Weigelt, metux IT consult authored
A tab sneaked in, where it shouldn't be. Reviewed-by:
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Enrico Weigelt authored
Improve readability a bit by commenting #if/#else/#endif statements with the checked preprocessor symbols. Signed-off-by:
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Enrico Weigelt authored
The pointer to the struct platform_device in the driver's private data struct is never used and therefore can be dropped. Signed-off-by:
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- 14 Jun, 2019 3 commits
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Linus Walleij authored
We already have an array named "parents" so instead of letting one point to the other, simply allocate a dynamic array to hold the parents, just one if desired and drop the number of members in gpio_irq_chip by 1. Rename gpiochip to gc in the process. Signed-off-by: -
Linus Walleij authored
We now have two APIs for registering GPIOLIB_IRQCHIP, this is not working and creating confusion. Add a TODO item to fix it up. Cc: Thierry Reding <treding@nvidia.com> Signed-off-by: -
Linus Walleij authored
We need to convert all old gpio irqchips to pass the irqchip setup along when adding the gpio_chip. For chained irqchips this is a pretty straight-forward conversion. Cc: Thierry Reding <treding@nvidia.com> Signed-off-by:
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- 12 Jun, 2019 24 commits
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Tony Lindgren authored
If an edge interrupt triggers while entering idle just before we save GPIO datain register to saved_datain, the triggered GPIO will not be noticed on wake-up. This is because the saved_datain and GPIO datain are the same on wake-up in omap_gpio_unidle(). Let's fix this by ignoring any pending edge interrupts for saved_datain. This issue affects only idle states where the GPIO module internal wake-up path is operational. For deeper idle states where the GPIO module gets powered off, Linux generic wakeirqs must be used for the padconf wake-up events with pinctrl-single driver. For examples, please see "interrupts-extended" dts usage in many drivers. This issue can be somewhat easily reproduced by pinging an idle system with smsc911x Ethernet interface configured IRQ_TYPE_EDGE_FALLING. At some point the smsc911x interrupts will just stop triggering. Also if WLCORE WLAN is used with EDGE interrupt like it's documentation specifies, we can see lost interrupts without this patch. Note that in the long run we may be able to cancel entering idle by returning an error in gpio_omap_cpu_notifier() on pending interrupts. But let's fix the bug first. Also note that because of the recent clean-up efforts this patch does not apply directly to older kernels. This does fix a long term issue though, and can be backported as needed. Cc: Aaro Koskinen <aaro.koskinen@iki.fi> Cc: Grygorii Strashko <grygorii.strashko@ti.com> Cc: Keerthy <j-keerthy@ti.com> Cc: Ladislav Michl <ladis@linux-mips.org> Cc: Peter Ujfalusi <peter.ujfalusi@ti.com> Cc: Russell King <rmk+kernel@armlinux.org.uk> Cc: Tero Kristo <t-kristo@ti.com> Signed-off-by:
Tony Lindgren <tony@atomide.com> Signed-off-by:
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Linus Walleij authored
The FMC subsystem was created in 2012 with the ambition to drive development of drivers for this hardware upstream. The current implementation has architectural flaws and would need to be revamped using real hardware to something that can reuse existing kernel abstractions in the subsystems for e.g. I2C, FPGA and GPIO. We have concluded that for the mainline kernel it will be better to delete the subsystem and start over with a clean slate when/if an active maintainer steps up. For details see: https://lkml.org/lkml/2018/10/29/534Suggested-by:
Federico Vaga <federico.vaga@cern.ch> Cc: Pat Riehecky <riehecky@fnal.gov> Acked-by:
Alessandro Rubini <rubini@gnudd.com> Signed-off-by:
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Russell King authored
Signed-off-by:
Russell King <rmk+kernel@armlinux.org.uk> Signed-off-by:
Grygorii Strashko <grygorii.strashko@ti.com> Tested-by:
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Russell King authored
The irq_startup() method returns an unsigned int, but in __irq_startup() it is assigned to an int. However, nothing checks for errors, so any error that is returned is ignored. Remove the check for GPIO-input mode and the error return. Signed-off-by:
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Russell King authored
Signed-off-by:
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Russell King authored
We must never alter the register tables; these are read-only as far as the driver is concerned. Constify these tables. Signed-off-by:
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Russell King authored
Use local variables to store the base iomem address and regs table pointer like omap_gpio_init_context() does. Not only does this make the function neater, it also avoids unnecessary reloads of the same data multiple times. Signed-off-by:
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Russell King authored
When a GPIO block has the set/clear dataout registers implemented, it also has the normal dataout register implemented. Reading this register reads the current GPIO output state, and writing it sets the GPIOs to the explicit state. This is the behaviour that we want when saving and restoring the context, so use the dataout register exclusively. Signed-off-by:
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Russell King authored
omap_set_gpio_irqenable() calls two helpers that are almost the same apart from whether they set or clear bits. We can consolidate these: - in the set/clear bit register case, we can perform the operation on our saved context copy and write the appropriate set/clear register. - otherwise, we can use our read-modify-write helper and invert enable if irqenable_inv is set. Signed-off-by:
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Russell King authored
This function open-codes an exclusive-or bitwise operation using an if() statement and explicitly setting or clearing the bit. Instead, use an exclusive-or operation instead, and simplify the function. We can combine the preprocessor conditional using IS_ENABLED() and gain some additional compilation coverage. Signed-off-by:
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Russell King authored
We already have a read-modify-write helper, but there's more that can be done with a read-modify-write helper if it returned the new value. Modify the existing helper to return the new value, and arrange for it to take one less argument by having the caller compute the register address. Signed-off-by:
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Russell King authored
bank->level_mask is merely the bitwise or of the level detection context which we have already read in this function. Rather than repeating additional reads, compute it from the values already read. Signed-off-by:
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Russell King authored
One of the reasons for set_multiple() to exist is to allow multiple GPIOs on the same chip to be changed simultaneously - see commit 5f424243 ("gpiolib: allow simultaneous setting of multiple GPIO outputs"): - Simultaneous glitch-free setting of multiple pins on any kind of parallel bus attached to GPIOs provided they all reside on the same chip and bank. In order for this to work, we should not use the atomic set/clear registers, but instead read-modify-write the dataout register. We already take the spinlock to ensure that happens atomically, so move the code into the set_multiple() function and kill the two helper functions. Signed-off-by:
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Russell King authored
There is no reason to have helper functions to read the datain and dataout registers when they are only used in one location. Simplify this code to make it more readable. Signed-off-by:
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Russell King authored
omap_gpio_get() calls omap_get_gpio_datain() or omap_get_gpio_dataout() to read the GPIO state. These two functions are only called from this method, so they don't add much value. Move their contents into omap_gpio_get() method and simplify. Signed-off-by:
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Russell King authored
Architectures are single-copy atomic, which means that simply reading a register is an inherently atomic operation. There is no need to take a spinlock here. Signed-off-by:
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Russell King authored
Move these two functions to live beside the rest of the gpio chip implementation, rather than in the middle of the irq chip implementation. Signed-off-by:
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Russell King authored
The irq_ack method does not fit our hardware requirements. Edge interrupts must be cleared before we handle them, and level interrupts must be cleared after handling them. We handle the interrupt clearance in our interrupt handler for edge IRQs and in the unmask method for level IRQs. Replace the irq_ack method with the no-op method from the dummy irq chip. Signed-off-by:
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Russell King authored
The edge interrupt handling was effectively: isr = ISR_reg & enabled; if (bank->level_mask) level_mask = bank->level_mask & enabled; else level_mask = 0; edge = isr & ~level_mask; When bank->level_mask is zero, level_mask will be computed as zero anyway, so the if() statement is redundant. We are then left with: isr = ISR_reg & enabled; level_mask = bank->level_mask & enabled; edge = isr & ~level_mask; This can be simplified further to: isr = ISR_reg & enabled; edge = isr & ~bank->level_mask; since the second mask with 'enabled' is redundant. Improve the associated comment as well. Signed-off-by:
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Russell King authored
Commit c4791bc6 ("gpio: omap: drop omap_gpio_list") removed the list head and addition to the list head of each gpio bank, but failed to remove the list_del() call and the node inside struct gpio_bank. Remove these too. Fixes: c4791bc6 ("gpio: omap: drop omap_gpio_list") Signed-off-by:
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Russell King authored
Commit 384ebe1c ("gpio/omap: Add DT support to GPIO driver") added the register definition tables to the gpio-omap driver. Subsequently to that commit, commit 4e962e89 ("gpio/omap: remove cpu_is_omapxxxx() checks from *_runtime_resume()") added definitions for irqstatus_raw* registers to the legacy OMAP4 definitions, but missed the DT definitions. This causes an unintentional change of behaviour for the 1.101 errata workaround on OMAP4 platforms. Fix this oversight. Fixes: 4e962e89 ("gpio/omap: remove cpu_is_omapxxxx() checks from *_runtime_resume()") Signed-off-by:
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Russell King authored
Documentation states: NOTE: There must be a correlation between the wake-up enable and interrupt-enable registers. If a GPIO pin has a wake-up configured on it, it must also have the corresponding interrupt enabled (on one of the two interrupt lines). Ensure that this condition is always satisfied by enabling the detection events after enabling the interrupt, and disabling the detection before disabling the interrupt. This ensures interrupt/wakeup events can not happen until both the wakeup and interrupt enables correlate. If we do any clearing, clear between the interrupt enable/disable and trigger setting. Signed-off-by:
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Linus Walleij authored
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Martin Blumenstingl authored
The stmmac driver currently ignores the GPIO flags which are passed via devicetree because it operates with legacy GPIO numbers instead of GPIO descriptors. stmmac assumes that the GPIO is "active HIGH" by default. This can be overwritten by setting "snps,reset-active-low" to make the reset line "active LOW". Recent Amlogic SoCs (G12A which includes S905X2 and S905D2 as well as G12B which includes S922X) use GPIOZ_14 or GPIOZ_15 for the PHY reset line. These GPIOs are special because they are marked as "3.3V input tolerant open drain" pins which means they can only drive the pin output LOW (to reset the PHY) or to switch to input mode (to take the PHY out of reset). The GPIO subsystem already supports this with the GPIO_OPEN_DRAIN and GPIO_OPEN_SOURCE flags in the devicetree bindings. Add the stmmac PHY reset line specific active low parsing to gpiolib-of so stmmac can be ported to GPIO descriptors while being backwards compatible with device trees which use the "old" way of specifying the polarity. Signed-off-by:
Martin Blumenstingl <martin.blumenstingl@googlemail.com> Reviewed-by:
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- 10 Jun, 2019 1 commit
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Phil Reid authored
Keeping the irq_chip definition static shares it with multiple instances of the altera gpiochip in the system. This is bad and now we get this warning from gpiolib core: "detected irqchip that is shared with multiple gpiochips: please fix the driver." Hence, move the irq_chip definition from being driver static into the struct altera_gpio_chips. So a unique irq_chip is used for each gpiochip instance. Signed-off-by:
Phil Reid <preid@electromag.com.au> Signed-off-by:
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