- 24 Apr, 2007 8 commits
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Hal Rosenstock authored
Clarify code by changing return values from SMI functions to named enum values instead of magic 0/1 values. Signed-off-by:
Hal Rosenstock <halr@voltaire.com> Signed-off-by:
Roland Dreier <rolandd@cisco.com>
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Sean Hefty authored
We need to set the SGID index for routed MADs and pass received GRH information to userspace when a MAD is received. Signed-off-by:Sean Hefty <sean.hefty@intel.com>
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Sean Hefty authored
To support destinations that are not on the local IB subnet, IPoIB should include the GRH information when constructing an address handle. Using the existing ib_init_ah_from_path() call will do this for us. Signed-off-by: -
Sean Hefty authored
src_path_bits needs to mask off the base LID value. Signed-off-by: -
Sean Hefty authored
Use wait_event_interruptible() instead of a more complicated open-coded equivalent. Signed-off-by: -
Sean Hefty authored
Use wait_event_interruptible() instead of a more complicated open-coded equivalent. Signed-off-by: -
Roland Dreier authored
mthca_free_qp() already has local variables to hold the QP's send_cq and recv_cq, so we can slightly clean up the calls to mthca_cq_clean() by using those local variables instead of expressions like to_mcq(qp->ibqp.send_cq). Also, by cleaning the recv_cq first, we can avoid worrying about whether the QP is attached to an SRQ for the second call, because we would only clean send_cq if send_cq is not equal to recv_cq, and that means send_cq cannot have any receive completions from the QP being destroyed. All this work even improves the generated code a bit: add/remove: 0/0 grow/shrink: 0/1 up/down: 0/-5 (-5) function old new delta mthca_free_qp 510 505 -5 Signed-off-by: -
Roland Dreier authored
Commit b2875d4c ("IB/mthca: Always fill MTTs from CPU") causes a crash in mthca_write_mtt() with non-memfree HCAs that have their memory hidden (that is, have only two PCI BARs instead of having a third BAR that allows access to the RAM attached to the HCA) on 64-bit architectures. This is because the commit just before, c20e20ab ("IB/mthca: Merge MR and FMR space on 64-bit systems") makes dev->mr_table.fmr_mtt_buddy equal to &dev->mr_table.mtt_buddy and hence mthca_write_mtt() tries to write directly into the HCA's MTT table. However, since that table is in the HCA's memory, this is impossible without the PCI BAR that gives access to that memory. This causes a crash because mthca_tavor_write_mtt_seg() basically tries to dereference some offset of a NULL pointer. Fix this by adding a test of MTHCA_FLAG_FMR in mthca_write_mtt() so that we always use the WRITE_MTT firmware command rather than writing directly if FMRs are not enabled. Signed-off-by:
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- 19 Apr, 2007 32 commits
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Roland Dreier authored
Update the driver's list of current firmware versions with Mellanox's latest releases. Signed-off-by: -
Robert Walsh authored
The kernel ib_wc structure now uses a QP pointer, but the user space equivalent uses a QP number instead. This means we can no longer use a simple structure copy to copy stuff into user space. Signed-off-by:
Bryan O'Sullivan <bryan.osullivan@qlogic.com> Signed-off-by:
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Robert Walsh authored
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Robert Walsh authored
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Robert Walsh authored
Don't let userspace use the direct-physical-map L_key or R_key. Signed-off-by:
Ralph Campbell <ralph.campbell@qlogic.com> Signed-off-by:
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Bryan O'Sullivan authored
At some point things changed so that all the affinity bits can be set, but cpus_full() macro is not true. This caused problems with the unit selection logic on multi-unit (board) configurations. Signed-off-by:
Dave Olson <dave.olson@qlogic.com> Signed-off-by:
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Bryan O'Sullivan authored
Signed-off-by:
Robert Walsh <robert.walsh@qlogic.com> Signed-off-by:
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Bryan O'Sullivan authored
Move the code that shuts down the IB link earlier in the unload process, to be sure no new packets can arrive while we are unloading. Signed-off-by:
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Bryan O'Sullivan authored
To prevent random utility reads and writes of the diag interface to the chip, we first require a handshake of reading from offset 0 and writing to offset 0 before any other reads or writes can be done through the diags device. Otherwise chip errors can be triggered. Signed-off-by:
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Bryan O'Sullivan authored
If the chip is no longer usable, LEDs should be turned off so system can be found easily in the cluster. Also some minor reorganizing so both chips print hardware error message at same point and only if there were unrecovered errors Signed-off-by:
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Michael Albaugh authored
Re-init of the kernel structures after a chip reset was leaving the portdata structure for port zero in an inconsistent state, and a pointer to it either stale (in re-init code) or NULL (in devdata) Fixing the order of operations on this struct, and the condition for interrupt access, prevents the crashes. Signed-off-by:
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Bryan O'Sullivan authored
Mostly cleanup. Signed-off-by:
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Bryan O'Sullivan authored
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Arthur Jones authored
Due to a chip bug, the PIOAvail register is not always updated to memory. This patch allows userspace to force an update. Signed-off-by:
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Arthur Jones authored
In initialization, if we bailed at chip specific initialization, we forgot to clean up the irq we had requested. Signed-off-by:
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Bryan O'Sullivan authored
This patch fixes a bug where multicast packets without a GRH were not being dropped as per the IB spec. Signed-off-by:
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Bryan O'Sullivan authored
If the module parameter "kpiobufs" is set too high, the calculation to reset it to a sane value was incorrect. Signed-off-by:
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Bryan O'Sullivan authored
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Ralph Campbell authored
Fix RDMA read response length checking for RDMA_READ_RESPONSE_ONLY to allow a zero length response. RDMA read responses which don't match the expected length or occur in response to some other operation should generate a completion queue error (see table 56, ch. 9.9.2.3 in the IB spec). Signed-off-by:
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Mark Debbage authored
Improve port-sharing performance by allowing any process to receive packets from the shared hardware port under a spin lock for mutual exclusion. Previously, one process was nominated as the master and that process was responsible for receiving all packets from the shared hardware port and either consuming them or forwarding them to their destination. This led to starvation problems for other processes when the master process was busy in computation phases. Signed-off-by:
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Ralph Campbell authored
The port sharing feature mixed kernel virtual addresses as well as physical addresses for the offset used to describe the mmap address to map the InfiniPath hardware into user space. This had a conflict on powerpc. The new scheme converts it to a physical address so it doesn't conflict with chip addresses and yet still fits in 40/44 bits so it isn't truncated by 32-bit applications calling mmap64(). Signed-off-by:
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Bryan O'Sullivan authored
If a receive work request has been removed from the queue but has not had a CQ entry generated for it and the QP is modified to the error state, the completion entry generated is incorrect. This patch fixes the problem. Signed-off-by:
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Bryan O'Sullivan authored
Code was converted from a &= ~mask to clear_bit, but the bit was left shifted instead of being used directly, so we were either trashing memory several pages away, or sometimes taking a kernel page fault on an invalid page. Signed-off-by:
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Bryan O'Sullivan authored
Some types of packet errors are moderately common with longer IB cables and large clusters, and are not reported with prints by other IB HCA drivers. This suppresses those messages unless the new __IPATH_ERRPKTDBG bit is set in ipath_debug. Reporting of temporarily disabled frequent error interrupts was also made clearer We also distinguish between chip errors, and bad packets sent or received in the wording of the messages. Signed-off-by:
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Ralph Campbell authored
This patch fixes a number of bugs with updating the PSN for retries of RC requests. Signed-off-by:
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Ralph Campbell authored
When switching to the QP error state, the completion queue entries (error or flush) were not being generated correctly. Signed-off-by:
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Bryan O'Sullivan authored
ipath_dbg doesn't need the same prefixes that printk does. Signed-off-by:
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Ralph Campbell authored
This patch adds support for multiple RDMA reads and atomics to be sent before an ACK is required to be seen by the requester. Signed-off-by:
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Ralph Campbell authored
If a post send is done in loopback and there is no receive queue entry, the sending QP is put on a timeout list for a while so the receiver has a chance to post a receive buffer. If the another post send is done, the code incorrectly tried to put the QP on the timeout list again an corrupted the timeout list. This eventually leads to a spin lock deadlock NMI due to the timer function looping forever with the lock held. Signed-off-by:
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Ralph Campbell authored
A silly programming error causes a CQ entry to not be generated if a SRQ limit event is generated. Signed-off-by:
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Ralph Campbell authored
A recent change was made to allocate memory for a port after CPU affinity is set. That change didn't account for subports and was trying to allocate memory for the port twice. Signed-off-by:
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Bryan O'Sullivan authored
The chip documentation on the expected TID vs eager TID parity error bits was reversed from what was implemented in the RTL, for both chips. This corrects the definitions. Signed-off-by:
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