- 07 Nov, 2005 36 commits
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Paul Mundt authored
drivers/sh/ got dropped from drivers/Makefile, so add it back in.. Signed-off-by:
Paul Mundt <lethal@linux-sh.org> Signed-off-by:
Andrew Morton <akpm@osdl.org> Signed-off-by:
Linus Torvalds <torvalds@osdl.org>
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Pantelis Antoniou authored
Kconfig patch needed by fs_enet to work. Works like CONFIG_CPM2. Cc: Kumar <kumar.gala@freescale.com> Cc: Benjamin Herrenschmidt <benh@kernel.crashing.org> Cc: Matt Porter <mporter@kernel.crashing.org> Signed-off-by:
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Matt Porter authored
This missing initrd header slipped though last time. Signed-off-by:
Stefan Roese <sr@denx.de> Signed-off-by:
Matt Porter <mporter@kernel.crashing.org> Signed-off-by:
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Matt Porter authored
On PPC405GP/GPR it should be possible to enable PCI support, even when the internal PCI arbiter is disabled (e.g. when using an external PCI arbiter). The removed code didn't allow this, and also generated a warning on PPC405EP platforms. Signed-off-by:
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Matt Porter authored
Cleanup PPC40x eval boards (bubinga, walnut and sycamore) to support U-Boot as bootloader. The OpenBIOS bd_info struct is not used in the kernel anymore (only U-Boot now). uImage (U-Boot) tested on walnut, sycamore and bubinga zImage (OpenBIOS) tested on sycamore, bubinga and ebony Signed-off-by:
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Roland Dreier authored
Add support for AMCC PowerPC 440SPe "Yucca" eval board platform. Signed-off-by:
Roland Dreier <rolandd@cisco.com> Cc: Matt Porter <mporter@kernel.crashing.org> Signed-off-by:
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Roland Dreier authored
Add support for the AMCC PowerPC 440SPe SoC, including PCI Express in root port mode. Signed-off-by:
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Roland Dreier authored
The PowerPC 440SP SoC has two Processor Local Bus (PLB) segments (a high-throughput segment and a low-latency segment). Fix our PLB register definitions to cope with this, and add code to dump the status of both segments when a machine check occurs. Signed-off-by:
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Roland Dreier authored
The PowerPC 440SPe supports up to 16 GB of RAM, and therefore its IO registers are at 0x4_xxxx_xxxx instead of being at 0x1_xxxx_xxxx like most other PPC 440 chips. To allow for this, this patch moves the definition of the ERPN used for mapping UART0 from being hard-coded in the head_44x.S assembly code to being defined in ibm44x.h. Signed-off-by:
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Lee Nicks authored
This patch adds watchdog, RTC support for Marvell EV64360BP board. Signed-off-by:
Lee Nicks <allinux@gmail.com> Signed-off-by:
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Stephen Hemminger authored
It is not valid to enable scatter/gather without hardware checksum support of some kind. (akpm: applies only to the old boomerang cards). Signed-off-by:
Stephen Hemminger <shemminger@osdl.org> Signed-off-by:
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John W. Linville authored
Add capability for 3c59x driver to use memory-mapped PCI I/O resources. This may improve performance for those devices so equipped. This will be the default behaviour for IS_CYCLONE and IS_TORNADO devices. Additionally, it can be enabled/disabled individually for up to MAX_UNITS number of devices via the use_mmio module option or for all units via the global_use_mmio option. The use_mmio option overrides the global_use_mmio option for those devices specified. Signed-off-by:
John W. Linville <linville@tuxdriver.com> Signed-off-by:
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John W. Linville authored
Only increment rx_dropped in case of lack of resources (i.e. not for frames with errors). Signed-off-by:
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John W. Linville authored
Add support for ETHTOOL_GPERMADDR to 3c59x. Signed-off-by:
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John W. Linville authored
Correct several (apparently cut & paste) grammatical typos in module parameter descriptions. They seem to have originated as copies of the description for "global_options". Signed-off-by:
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John W. Linville authored
Beautify the array initilizations for the module parameters. Signed-off-by:
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John W. Linville authored
Add bounds checking to usage of hw_checksums module parameter array. Signed-off-by:
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Tommy Christensen authored
In order to spare some I/O operations, be more intelligent about when to read from the PHY. Pointed out by Bogdan Costescu. Signed-off-by:
Tommy S. Christensen <tommy.christensen@tpack.net> Signed-off-by:
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Neil Horman authored
Clean up mdio_read routines in 3c59x.c to use the MII_* macros defined in include/linux/mii.h Signed-off-by:
Neil Horman <nhorman@tuxdriver.com> Signed-off-by:
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John W. Linville authored
Convert 3c59x driver to use pci_iomap API. This makes it easier to enable the use of memory-mapped PCI I/O resources. Signed-off-by:
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Manfred Spraul authored
Chen noticed that cache_reap uses REAPTIMEOUT_CPUC+smp_processor_id() as the timeout for rescheduling. The "+smp_processor_id()" part is wrong, the timeout should be identical for all cpus: start_cpu_timer already adds a cpu dependant offset to avoid any clustering. The attached patch removes smp_processor_id(). Signed-Off-By:
Manfred Spraul <manfred@colorfullife.com> Signed-off-by:
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Pekka J Enberg authored
This patch renames struct kmem_cache_s to kmem_cache so we can start using it instead of kmem_cache_t typedef. Signed-off-by:
Pekka Enberg <penberg@cs.helsinki.fi> Signed-off-by:
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Andrew Morton authored
slab presently goes BUG if someone tries to register an already-registered cache. But this can happen if the user accidentally loads a module which is already statically linked into the kernel. Nuking the kernel is rather a harsh reaction. Change it into a warning, and just fail the kmem_cache_alloc() attempt. If the module is well-behaved, the modprobe will fail and all is well. Notes: - Swaps the ranking of cache_chain_sem and lock_cpu_hotplug(). Doesn't seem important. Acked-by:
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Andrew Morton authored
!unlikely(expr) hurts my brain. likely(!expr) is more straightforward. Signed-off-by:
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Benjamin Herrenschmidt authored
Oops, some last minute changes caused the 64K pages patch to break ppc32 build, this fixes it. Signed-off-by:
Benjamin Herrenschmidt <benh@kernel.crashing.org> Signed-off-by:
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Benjamin Herrenschmidt authored
The zImage wrapper has a bug where it doesn't claim() the memory for the kernel properly, it forgets to take into account the offset between the ELF header and the kernel itself. This results on some machines, like G5s, into a kernel that crashes at boot when clearing the BSS. Signed-off-by:
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Hugh Dickins authored
Suppress split ptlock on arches which may use one page for multiple page tables. Reconsider what better to do (particularly on ppc64) later on. Signed-off-by:
Hugh Dickins <hugh@veritas.com> Signed-off-by:
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Olof Johansson authored
Two CONFIG_SMP=n build fixes due to missing <asm/smp.h> includes. Signed-off-by:
Olof Johansson <olof@lixom.net> Cc: Benjamin Herrenschmidt <benh@kernel.crashing.org> Cc: Paul Mackerras <paulus@samba.org> Signed-off-by:
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John W. Linville authored
The current ia64 implementation of dma_get_cache_alignment does not work for modules because it relies on a symbol which is not exported. Direct access to a global is a little ugly anyway, so this patch re-implements dma_get_cache_alignment in a manner similar to what is currently used for x86_64. Signed-off-by:
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Yuri Vasilevski authored
A typo fix for fix-build-on-nls-free-systems.patch that caused all systems to be detected as not having NLS. Signed-off-by:
Yuri Vasilevski <yvasilev@duke.math.cinvestav.mx> Signed-off-by:
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David Gibson authored
This patch, however, should be applied on top of the 64k-page-size patch to fix some problems with hugepage (some pre-existing, another introduced by this patch). The patch fixes a bug in the SLB miss handler for hugepages on ppc64 introduced by the dynamic hugepage patch (commit id c594adad) due to a misunderstanding of the srd instruction's behaviour (mea culpa). The problem arises when a 64-bit process maps some hugepages in the low 4GB of the address space (unusual). In this case, as well as the 256M segment in question being marked for hugepages, other segments at 32G intervals will be incorrectly marked for hugepages. In the process, this patch tweaks the semantics of the hugepage bitmaps to be more sensible. Previously, an address below 4G was marked for hugepages if the appropriate segment bit in the "low areas" bitmask was set *or* if the low bit in the "high areas" bitmap was set (which would mark all addresses below 1TB for hugepage). With this patch, any given address is governed by a single bitmap. Addresses below 4GB are marked for hugepage if and only if their bit is set in the "low areas" bitmap (256M granularity). Addresses between 4GB and 1TB are marked for hugepage iff the low bit in the "high areas" bitmap is set. Higher addresses are marked for hugepage iff their bit in the "high areas" bitmap is set (1TB granularity). To avoid conflicts, this patch must be applied on top of BenH's pending patch for 64k base page size [0]. As such, this patch also addresses a hugepage problem introduced by that patch. That patch allows hugepages of 1MB in size on hardware which supports it, however, that won't work when using 4k pages (4 level pagetable), because in that case hugepage PTEs are stored at the PMD level, and each PMD entry maps 2MB. This patch simply disallows hugepages in that case (we can do something cleverer to re-enable them some other day). Built, booted, and a handful of hugepage related tests passed on POWER5 LPAR (both ARCH=powerpc and ARCH=ppc64). [0] http://gate.crashing.org/~benh/ppc64-64k-pages.diffSigned-off-by:
David Gibson <david@gibson.dropbear.id.au> Cc: Benjamin Herrenschmidt <benh@kernel.crashing.org> Cc: Paul Mackerras <paulus@samba.org> Signed-off-by:
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Linus Torvalds authored
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Linus Torvalds authored
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Linus Torvalds authored
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Linus Torvalds authored
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Benjamin Herrenschmidt authored
Adds a new CONFIG_PPC_64K_PAGES which, when enabled, changes the kernel base page size to 64K. The resulting kernel still boots on any hardware. On current machines with 4K pages support only, the kernel will maintain 16 "subpages" for each 64K page transparently. Note that while real 64K capable HW has been tested, the current patch will not enable it yet as such hardware is not released yet, and I'm still verifying with the firmware architects the proper to get the information from the newer hypervisors. Signed-off-by:
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- 06 Nov, 2005 4 commits
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Russell King authored
glibc expects to count lines beginning with "processor" to determine the number of processors, not lines beginning with "Processor". So, give glibc the format it expects. Signed-off-by:Russell King <rmk+kernel@arm.linux.org.uk>
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Russell King authored
We don't want to call dump_cpu_info() from cpu_init() after boot since it produces a lot of unnecessary noise - since cpu_init() gets called on resume and hotplug cpu insertion events. Signed-off-by: -
Russell King authored
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Russell King authored
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