- 11 Sep, 2016 1 commit
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Mylène Josserand authored
The GR8 is an SoC made by Nextthing loosely based on the sun5i family. Since it's not clear yet what we can factor out and merge with the A10s and A13 support, let's keep it out of the sun5i.dtsi include tree. We will figure out what can be shared when things settle down. Signed-off-by:
Mylène Josserand <mylene.josserand@free-electrons.com> Signed-off-by:
Maxime Ripard <maxime.ripard@free-electrons.com> Acked-by:
Chen-Yu Tsai <wens@csie.org>
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- 10 Sep, 2016 14 commits
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Chen-Yu Tsai authored
The usbphy and usb_otg nodes in the A23 and A33 dts files only differ by compatible, and for the usbphy, the size of one of its register regions. Move all the common bits to the A23/A33 common dtsi file. Signed-off-by:
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Maxime Ripard authored
The LCD output needs to be muxed. Add the proper pinctrl node. Signed-off-by:
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Maxime Ripard authored
Add all the needed blocks to the A33 DTSI. Signed-off-by:
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Maxime Ripard authored
Now that we have support for the CCU driver in sunxi-ng, convert the A23 and A33 DTs to that driver. Signed-off-by:
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Chen-Yu Tsai authored
Now that we have a different clock representation, switch to it. Signed-off-by:
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Maxime Ripard authored
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Jean Delvare authored
The sunxi-ng clock driver is useless for other architectures. Signed-off-by:
Jean Delvare <jdelvare@suse.de> Acked-by:
Stephen Boyd <sboyd@codeaurora.org> Signed-off-by:
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Maxime Ripard authored
Add support for the clock unit found in the A23. Due to the similarities with the A33, it also shares its clock IDs to allow sharing the DTSI. Signed-off-by:
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Maxime Ripard authored
This commit introduces the clocks found in the Allwinner A33 CCU. Since this SoC is very similar to the A23, and we share a significant share of the DTSI, the clock IDs that are going to be used will also be shared with the A23, hence the name of the various header files. Signed-off-by:
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Maxime Ripard authored
Add support for the class with a single factor, N, being a multiplier. Signed-off-by:
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Maxime Ripard authored
Add a new macro to declare muxes based on a table and a gate. Signed-off-by:
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Maxime Ripard authored
Some dividers might have a maximum value that is lower than the width of the register. Add a field to _ccu_div to handle those case properly. If the field is set to 0, the code will assume that the maximum value is the maximum one that can be used with the field register width. Otherwise, we'll use whatever value has been set. Signed-off-by:
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Maxime Ripard authored
The internal _ccu_div structure is meant to be embedded into other structures to combine the various dividers and to form the clock classes support. Start to document those structures by using kerneldoc. Signed-off-by: -
Maxime Ripard authored
Add some macros to ease the declaration of clocks that are using them. Signed-off-by:
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- 06 Sep, 2016 2 commits
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James Pettigrew authored
Guangzhou FriendlyARM Computer Tech Co., Ltd is a Chinese ARM board vendor. Signed-off-by:
James Pettigrew <james@innovum.com.au> Reviewed-by:
Rask Ingemann Lambertsen <ccc94453@vip.cybercity.dk> Acked-by:
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James Pettigrew authored
The NanoPi NEO is a minimal H3 based SBC. It comes with 256/512M RAM, a micro SD slot, 10/100Mbit ethernet and a single USB-A port. Signed-off-by:
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- 05 Sep, 2016 3 commits
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Hans de Goede authored
Most of the sun8i q8 boards have an SDIO wifi controller, on the variants which use an USB wifi controller, this will result in a couple of error msg-s in dmesg when proving the sdio bus and an used mmc controller. The best way to deal with wifi on this boards really is to simply let the kernel auto-detect usb or sdio wifi controllers, so we will just have to live with the few errors in dmesg. This has been tested on a23 based q8 tablets with ESP8089, RTL8703AS and RTL8189FTV wifi controllers. Signed-off-by:
Hans de Goede <hdegoede@redhat.com> Signed-off-by:
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Hans de Goede authored
The Orange Pi Plus2E is an extended version of the Orange Pi Pc Plus, with 2G RAM and an external gbit ethernet phy. Note currently the dts is pretty much empty (except for including the pc-plus dts), I've a local patch which enables the emac actually making this dts different from the pc-plus one, but that needs the h3 emac driver to get merged first. Signed-off-by:
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Hans de Goede authored
Update the sun8i-h3-orangepi-plus.dts model string to reflect that it is valid for both the Orange Pi Plus and the Orange Pi Plus 2. This is also meant to help users realize that it is not valid for the new Orange Pi Plus 2E, which will get its own dts. Signed-off-by:
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- 31 Aug, 2016 1 commit
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Milo Kim authored
Acked-by:
Milo Kim <woogyom.kim@gmail.com> Signed-off-by:
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- 27 Aug, 2016 2 commits
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Icenowy Zheng authored
The inet-d978_rev2 is a pcb used in generic A33 based tablets. It features volume buttons, micro-usb otg, headphone connector and a power button. On the board a Realtek RTL8723BS SDIO Wi-Fi module are soldered, and there is also a accompanied board which has a Goodix GT9271 soldered. As this board is desired to create tablets with a Home key dealed by GT9271, a LED is present at the front panel at the position of the Home key. Signed-off-by:
Icenowy Zheng <icenowy@aosc.xyz> Signed-off-by:
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Chen-Yu Tsai authored
The R_PIO device node is missing #interrupt-cells, which causes interrupt parsing to fail to match it as a valid interrupt controller. Add #interrupt-cells to it. Also remove the unnecesary #address-cells and #size-cells. Fixes: 1ac56a6d ("ARM: dts: sun9i: Add A80 R_PIO pin controller device node") Signed-off-by:
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- 26 Aug, 2016 6 commits
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Hans de Goede authored
Rename the reference-design-tablet touchscreen node from gsl1680 to touchscreen, all? tablets seem to use the same power and interrupt gpio-s, but not all tablets use a gsl1680 controller making the gsl1680 name somewhat misleading. Also move the reg and compatible property to the actual tablet dts as they may differ per tablet. Signed-off-by:
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Hans de Goede authored
Add a dts file for the Empire Electronix M712 tablet, this is a 7" A13 tablet, with micro-usb (otg), headphone and micro-sd slots on the outside. It uses a Goodix gt811 touchscreen controller, a RTL8188CTV wifi chip and a DMART06 (1238a4) accelerometer. Note currently the dts for this is somewhat empty. This will change once we add support for the touchscreen and accelerometer. Signed-off-by:
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Hans de Goede authored
This results in a nice cleanup :) Signed-off-by:
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Hans de Goede authored
The ehci1/ohci1 pair on the ba10-tv-box is connected to an USB-2 wifi module soldered on the PCB, so there enabling ohci1 is not necessary. Signed-off-by:
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Hans de Goede authored
The polaroid-mid2809 tablet has an esp8089 wifi chip, add a dt node describing it. Signed-off-by:
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Hans de Goede authored
The polaroid-mid2407 tablet has an esp8089 wifi chip, add a dt node describing it. Signed-off-by:
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- 25 Aug, 2016 6 commits
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Icenowy Zheng authored
A23/A33 has a NAND controller which can now be used properly. Add a device node for it. The DMA function cannot work because of changed DMA IP block, so it's temporarily removed in the device node. However, with PIO mode it can still work. Tested on an Aoson M751s tablet with Boris Brezillon's "mtd: nand: allow vendor specific detection/initialization" patchset, which is needed for the large-block MLC chip to be recognized correctly. ( http://lists.infradead.org/pipermail/linux-mtd/2016-June/068198.html ) Signed-off-by:
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Chen-Yu Tsai authored
Add a new style driver for the clock control unit in Allwinner A31/A31s. A few clocks are still missing: - MIPI PLL's HDMI mode support - EMAC clock Signed-off-by:Rob Herring <robh@kernel.org> Signed-off-by:
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Chen-Yu Tsai authored
On sunxi we support cpufreq by changing the clock rate of PLL-CPU. It's possible the clock output of the PLL goes out of the CPU's operational limits when the PLL's multipliers / dividers are changed and it hasn't stabilized yet. This would result in the CPU hanging. To circumvent this, we temporarily switch the CPU mux clock to another stable clock before the rate change, and switch it back after the PLL stabilizes. This is done with clk notifiers registered on the PLL. This patch adds common functions for notifiers to reparent mux clocks. Signed-off-by:
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Chen-Yu Tsai authored
Some clocks on the A31 have fixed pre-dividers on multiple parents. Add support for them. Signed-off-by:
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Chen-Yu Tsai authored
Some clock muxes have holes, i.e. invalid or unconnected inputs, between parent mux values. Add support for specifying a mux table to map clock parents to mux values. Signed-off-by:
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Maxime Ripard authored
Rename the internal mux macro to be consistent with the other internal structure macros. Signed-off-by:
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- 22 Aug, 2016 5 commits
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Hans de Goede authored
Add a dts file for tablets using the generic inet-q972 PCB. Tablets with this PCB feature a mini-hdmi output, micro-usb usb-host, micro-usb usb-otg, 3.5mm headphone jack, a micro sd slot, (mini) power-barrel and an usb wifi module. This has been tested on a 9.7" 1024x768 qware qw tb9718-qhd tablet. Signed-off-by:
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Hans de Goede authored
Just like with a13/a23/a33 most a31 tablets are derived from the same reference design. Add a .dtsi file with all the common bits to avoid endless copy and pasting of these. The sun6i-reference-design-tablet.dtsi this commit adds is a copy of sun6i-a31s-colorfly-e708-q1.dts with a few tablet specific bits removed / left in sun6i-a31s-colorfly-e708-q1.dts. Signed-off-by:
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Hans de Goede authored
The presence of the mma8452_int_e708_q1 node is a copy and paste error, remove it. Signed-off-by:
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Chen-Yu Tsai authored
The 32.768 kHz clock inside the A80 SoC is fed from an external source, typically the AC100 RTC module. Make the osc32k placeholder a fixed-factor clock so board dts files can specify its source. Signed-off-by:
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Chen-Yu Tsai authored
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