into nuts.davemloft.net:/disk1/BK/net-2.6

They both define radeon_engine_reset. Here's a fix (from Panagiotis Papadakos).

correctly handle the "restart from this device/driver" case, and
caused oopses with ieee1394.

This just uses "list_for_each_entry_continue()" instead.

Add helper macro to make usage of "list_for_each_entry_continue()"
a bit more readable.

Co-authored with Yoshfuji Hideaki.

into home.osdl.org:/home/torvalds/v2.5/linux

into home.osdl.org:/home/torvalds/v2.5/linux

into kernel.bkbits.net:/home/davem/netfix-2.6

The patch adding the OF platform entries had a typo ;)

ppc32 needs this.

Here is the new radeonfb. It doesn't remove the old one, just in case,
though CONFIG_FB_RADEON now builds the new one.

The new driver supports recent cards, has better monitor detection,
including DDC2, fixes a couple of constants in the old driver, and a lot
more.

I had to add an empty fb_set_suspend() function to fbmem.c (the real
implementation is in James tree and will be here soon).  That means that
Power Management on Apple laptops isn't completely right yet until the
core fbdev fixes get in, but it's good enough for now.

rivafb is part of the g5 defconfig, but will cause a build error
on ppc64 due to a missing #include, here is the fix.

into home.osdl.org:/home/torvalds/v2.5/linux

The secondary MPIC is now supported on ppc64, so the driver can
use interrupts all the time now

This syscall is used by XFree to retreive the IO base of the
bus where the video card is plugged. This is only implemented
for compatibility with existing XFree86, I don't plan to do
a 64 bits version, XFree shall be fixed to use proper PCI access
methods

This is only used with the "sccdbg" kernel command line option, as
you need a special adapter (www.geethree.com) to get access to the
serial port on those machines.

This involves moving the final fixup to a function pointer in machdep,
turning all the PCI DMA routines into function pointers in a separate
structure and a bit of renaming work. The PowerMac currently use
"direct" PCI DMA bypassing the iommu. The driver for the IOMMU will
come later, allowing us to lift the limitation to 2Gb of RAM