1. 23 Feb, 2011 4 commits
  2. 22 Feb, 2011 8 commits
  3. 21 Feb, 2011 20 commits
  4. 19 Feb, 2011 2 commits
  5. 11 Feb, 2011 6 commits
    • Mike Rapoport's avatar
      ARM: tegra: add TrimSlice board · cca414b2
      Mike Rapoport authored
      Add basic support for CompuLab TrimSlice platform
      Signed-off-by: default avatarMike Rapoport <mike@compulab.co.il>
      Signed-off-by: default avatarColin Cross <ccross@android.com>
      cca414b2
    • Colin Cross's avatar
      535371c3
    • Olof Johansson's avatar
      ARM: tegra: add tegra_defconfig · f2b6133f
      Olof Johansson authored
      Adding one single defconfig for the tegra family of boards, to over time
      cover the superset of supported platform and drivers.
      Signed-off-by: default avatarOlof Johansson <olof@lixom.net>
      Signed-off-by: default avatarColin Cross <ccross@android.com>
      f2b6133f
    • Colin Cross's avatar
      ARM: tegra: dma: Fix critical data corruption bugs · 5789fee9
      Colin Cross authored
      Sometimes, due to high interrupt latency in the continuous mode
      of DMA transfer, the half buffer complete interrupt is handled
      after DMA has transferred the full buffer.  When this is detected,
      stop DMA immediately and restart with the next buffer if the next
      buffer is ready.
      
      originally fixed by Victor(Weiguo) Pan <wpan@nvidia.com>
      
      In place of using the simple spin_lock()/spi_unlock() in the
      interrupt thread, using the spin_lock_irqsave() and
      spin_unlock_irqrestore(). The lock is shared between the normal
      process context and interrupt context.
      
      originally fixed by Laxman Dewangan (ldewangan@nvidia.com)
      
      The use of shadow registers caused memory corruption at physical
      address 0 because the enable bit was not shadowed, and assuming it
      needed to be set would enable an unconfigured dma block.  Most of the
      register accesses don't need to know the previous state of the
      registers, and the few places that do need to modify only a few bits
      in the registers are the same ones that were sometimes incorrectly
      setting the enable bit.  This patch convert tegra_dma_update_hardware
      to set the entire register, and the other users to read-modify-write,
      and drops the shadow registers completely.
      
      Also fixes missing locking in tegra_dma_allocate_channel
      Signed-off-by: default avatarColin Cross <ccross@android.com>
      5789fee9
    • Colin Cross's avatar
      ARM: tegra: Allow overriding arch_reset · 699fe145
      Colin Cross authored
      Signed-off-by: default avatarColin Cross <ccross@android.com>
      699fe145
    • Colin Cross's avatar
      ARM: tegra: cpufreq: Disable cpufreq during suspend · 1eb2ecf1
      Colin Cross authored
      On Tegra, calling clk_set_rate on the CPU clock may call into the
      regulator API.  If the regulator driver that controls the CPU
      voltage rail has been suspended, this can lead to attempted
      communication with a hardware block that has already been turned
      off.
      
      Adds a SUSPEND_PREPARE notification hook to drop the frequency to
      the lowest possible during suspend.
      
      Also adds 216MHz (off of PLLP) as the lowest CPU frequency, which
      allows PLLX to be turned off.
      Signed-off-by: default avatarColin Cross <ccross@android.com>
      1eb2ecf1