- 25 Aug, 2009 11 commits
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Anton Vorontsov authored
This patch simply adds sdhci node to the device tree. We specify clock-frequency manually, so that eSDHC will work without upgrading U-Boot. Though, that'll only work for default setup (1500 MHz) on new board revisions. For non-default setups, it's recommended to upgrade U-Boot, since it will fixup clock-frequency automatically. Signed-off-by:
Anton Vorontsov <avorontsov@ru.mvista.com> Signed-off-by:
Kumar Gala <galak@kernel.crashing.org>
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Paul Gortmaker authored
The earlier mpc8560 CPUs don't have the RSTCR at 0xe00b0 in the GUTS. The generic reboot code uses this tag to determine if it should be using the RSTCR for reboot, so remove it from the board definition. Signed-off-by:
Paul Gortmaker <paul.gortmaker@windriver.com> Signed-off-by:
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Paul Gortmaker authored
Some CPU, like the MPC8560 don't have a RSTCR in the Global Utilities Block. These boards will implement their own reboot call, and not use this code, so we should only warn about the absence of the GUTS RSTCR when the default reboot code is used. Signed-off-by:
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Liang Li authored
The existing fsl_rstcr_restart function is not applicable to the mpc8560. The Global Utilities Block on this earlier CPU doesn't have the control/reset register at 0xe00b0. This implements a board specific reset function that uses the RCR(Reset Control Register) of the sbc8560's EPLD to do a reset. Signed-off-by:
Liang Li <Liang.Li@windriver.com> Signed-off-by:
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Paul Gortmaker authored
With flash partition entries in the DTS file, MTD might as well be enabled in the defconfig. In a similar vein, enable USB and enough related options (SCSI/ext2/ext3) so that a user can read and write to a generic USB flash drive as well. Also, this board only has the two default SOC UARTs, so adjust the UART config accordingly. Signed-off-by:
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Liang Li authored
Allows interrupts to occur on the sbc834x. Currently PCI devices get assigned an incorrect IRQ and so the interrupt count never increases. This was tested with the 82546GB based dual port E1000 PCI-X NIC which uses two distinct IRQ lines on the one card. root@localhost:/root> cat /proc/interrupts | grep eth 17: 78 IPIC Level eth1 48: 27121 IPIC Level eth0 Signed-off-by:
Yang Shi <yang.shi@windriver.com> Signed-off-by:
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Liang Li authored
There is 8MB flash, 8kB EEPROM and 128MB SDRAM on the sbc834x local bus, so add a localbus node in DTS with MTD partitions. The recent U-boot commit fe613cdd4eb moves u-boot to the beginning of flash, hence the legacy label on the partition at the end of flash. Signed-off-by:
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Liang Li authored
Since only one of the SoC USB devices is brought out to a physical connector on the board, remove the 2nd (USB-DR) node from the DTS. Having it present and USB enabled will cause a hang at boot. Signed-off-by:
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Poonam Aggrwal authored
Add support for the P2020RDB reference board from Freescale. Overview of P2020RDB platform - DDR DDR2 1G - NOR Flash 16MByte - NAND Flash 32MByte - 3 Ethernet interfaces 1) etSEC1 - RGMII - connected to a 5 port Vitesse Switch(VSC7385) - Switch is memory mapped through eLBC interface(CS#2) - IRQ1 2) etSEC2 - SGMII - connected to VSC8221 - IRQ2 3) etSEC3 - RGMII - connected to VSC8641 - IRQ3 - 2 1X PCIe interfaces - SD/MMC ,USB - SPI EEPROM - Serial I2C EEPROM Signed-off-by:
Poonam Aggrwal <poonam.aggrwal@freescale.com> Signed-off-by:
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Kumar Gala authored
The MMUCSR is now defined as part of the Book-3E architecture so we can move it into mmu-book3e.h and add some of the additional bits defined by the architecture specs. Signed-off-by: -
Heiko Schocher authored
- add I2C support - add FCC1 and FCC2 support Signed-off-by:
Heiko Schocher <hs@denx.de> Signed-off-by:
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- 20 Aug, 2009 29 commits
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Benjamin Herrenschmidt authored
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Stephen Rothwell authored
gcc v4.4 currently produces this build warning: arch/powerpc/boot/mktree.c: In function 'main': arch/powerpc/boot/mktree.c:104: warning: dereferencing type-punned pointer will break strict-aliasing rules tmpbuf is only used as an array of unsigned ints, so declare it that way. Signed-off-by:
Stephen Rothwell <sfr@canb.auug.org.au> Signed-off-by:
Benjamin Herrenschmidt <benh@kernel.crashing.org>
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Michael Ellerman authored
Currently _edata does not include several data sections, this causes the kernel's report of memory usage at boot to not match reality, and also prevents kmemleak from working - because it scan between _sdata and _edata for pointers to allocated memory. This mirrors a similar change made recently to the x86 linker script. Signed-off-by:
Michael Ellerman <michael@ellerman.id.au> Signed-off-by:
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Michael Ellerman authored
Make it possible to enable GCOV code coverage measurement on powerpc. Lightly tested on 64-bit, seems to work as expected. Signed-off-by:
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Roel Kluin authored
Check whether index is within bounds prior to calculating a possibly-invalid address. Signed-off-by:
Roel Kluin <roel.kluin@gmail.com> Cc: Bernd Petrovitsch <bernd@firmix.at> Cc: Benjamin Herrenschmidt <benh@kernel.crashing.org> Signed-off-by:
Andrew Morton <akpm@linux-foundation.org> Signed-off-by:
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Christoph Hellwig authored
hardirq.h on powerpc defines a __last_jiffy_stamp field, but it's not actually used anywhere. Signed-off-by:
Christoph Hellwig <hch@lst.de> Signed-off-by:
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Michel Dänzer authored
Map the GART table uncached, so we don't always need to flush the CPU caches explicitly after updates. Signed-off-by:
Michel Dänzer <daenzer@vmware.com> Signed-off-by:
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Michel Dänzer authored
Using the radeon KMS test functionality, I verified that the AGP bridge of the Intrepid2 chipset in my PowerBook supports aperture sizes up to 256M. So allow aperture sizes up to 256M on pre-U3 bridges as well, and bump the default size to 256M. It's possible that older revisions only support smaller sizes, but it'll be easy to verify that with the raden KMS test functionality. Also, there's only a problem on an actual attempt to access the aperture beyond the maximum size supported by the hardware, and non-KMS X still defaults to using only 32M. Also use ARRAY_SIZE for the aperture size arrays. Signed-off-by:
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roel kluin authored
Check whether index is within bounds before grabbing the element. Signed-off-by:
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Julia Lawall authored
The kernel.h macro DIV_ROUND_CLOSEST performs the computation (x + d/2)/d but is perhaps more readable. The semantic patch that makes this change is as follows: (http://www.emn.fr/x-info/coccinelle/) // <smpl> @haskernel@ @@ #include <linux/kernel.h> @depends on haskernel@ expression x,__divisor; @@ - (((x) + ((__divisor) / 2)) / (__divisor)) + DIV_ROUND_CLOSEST(x,__divisor) // </smpl> Signed-off-by:
Julia Lawall <julia@diku.dk> Signed-off-by:
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Geert Uytterhoeven authored
As <asm/iommu.h> doesn't contain any other hardware specific definitions but only interfaces. Reported-by:
Arnd Bergmann <arnd@arndb.de> Signed-off-by:
Geert Uytterhoeven <Geert.Uytterhoeven@sonycom.com> Signed-off-by:
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roel kluin authored
Missing tests after ioremap() Signed-off-by:
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Benjamin Krill authored
Evaluate mem kernel parameter for early memory allocations. If mem is set no allocation in the region above the given boundary is allowed. The current code doesn't take care about this and allocate memory above the given mem boundary. Signed-off-by:
Benjamin Krill <ben@codiert.org> Signed-off-by:
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Stoyan Gaydarov authored
These changes were a direct result of using a semantic patch More information can be found at http://www.emn.fr/x-info/coccinelle/Signed-off-by:
Stoyan Gaydarov <sgayda2@uiuc.edu> Signed-off-by:
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Michael Ellerman authored
Very lightly tested, doesn't crash the kernel. Signed-off-by:
Catalin Marinas <catalin.marinas@arm.com> Signed-off-by:
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Julia Lawall authored
The result of container_of should not be NULL. In particular, in this case the argument to the enclosing function has passed though INIT_WORK, which dereferences it, implying that its container cannot be NULL. A simplified version of the semantic patch that makes this change is as follows: (http://www.emn.fr/x-info/coccinelle/) // <smpl> @@ identifier fn,work,x,fld; type T; expression E1,E2; statement S; @@ static fn(struct work_struct *work) { ... when != work = E1 x = container_of(work,T,fld) ... when != x = E2 - if (x == NULL) S ... } // </smpl> Signed-off-by:
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Martyn Welch authored
Add a byte length read and write interface compatible with the nvram_generic driver interface to the mmio driver. Signed-off-by:
Martyn Welch <martyn.welch@gefanuc.com> Signed-off-by:
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Christoph Hellwig authored
I wrote sputrace before generic tracing infrastrucure was available. Now that we have the generic event tracer we can convert it over and remove a lot of code: 8 files changed, 45 insertions(+), 285 deletions(-) To use it make sure CONFIG_EVENT_TRACING is enabled and then enable the spufs trace channel by echo 1 > /sys/kernel/debug/tracing/events/spufs/spufs_context/enable and then read the trace records using e.g. cat /sys/kernel/debug/tracing/trace Signed-off-by:
Jeremy Kerr <jk@ozlabs.org> Signed-off-by:
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Kumar Gala authored
Since the pte_lockptr is a spinlock it gets optimized away on uniprocessor builds so using spin_is_locked is not correct. We can use assert_spin_locked instead and get the proper behavior between UP and SMP builds. Signed-off-by:
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Martyn Welch authored
Update GE Fanuc DTS to match the alterations suggested during the merge of the ppc9a DTS in commit 740d36aeSigned-off-by:
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Martyn Welch authored
This patch enables the XMC (PCIe daughter card) site on the SBC310. STG enter the description for the patch above. Signed-off-by:
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Martyn Welch authored
/proc/cpuinfo should be showing the boards revision and the revision of the FPGA fitted. The functions currently used to access this information as incorrect. Additionally the VME geographical address of the PPC9A and it's status as system contoller are available in the board registers. Show these in cpuinfo. Signed-off-by:
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Anton Vorontsov authored
Actually, the support is already there, but it requires newer U-Boots (to fill-in clock-frequency, and setup pin multiplexing). Though, it appears that on RDB boards USBB pins aren't multiplexed between USB and eSDHC (unlike MDS boards, where USB and eSDHC share pctl and pwrfault pins). So, for RDB boards we can safely setup pinmux and manually fill-in clock-frequency, thus making eSDHC work even with older u-boots. Signed-off-by:
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Anton Vorontsov authored
This patch simply adds four eeprom nodes to MPC8548CDS' device tree. Signed-off-by:
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Anton Vorontsov authored
MPC8377E-WLAN are basically RDB boards except: - RAM extended to 512 MB; - NAND flash removed, NOR flash extended to 64 MB; - Vitesse VSC7385 5-port switch removed, RTL8211B PHY added; - Power management MCU removed; - PCI slot removed, another mini-PCI slot added (IRQ routing changed); - USB3300 PHY's ID pin grounded, thus USB port is host-only. Signed-off-by:
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Julia Lawall authored
Error handling code following a kzalloc should free the allocated data. The semantic match that finds the problem is as follows: (http://www.emn.fr/x-info/coccinelle/) // <smpl> @r exists@ local idexpression x; statement S; expression E; identifier f,f1,l; position p1,p2; expression *ptr != NULL; @@ x@p1 = \(kmalloc\|kzalloc\|kcalloc\)(...); ... if (x == NULL) S <... when != x when != if (...) { <+...x...+> } ( x->f1 = E | (x->f1 == NULL || ...) | f(...,x->f1,...) ) ...> ( return \(0\|<+...x...+>\|ptr\); | return@p2 ...; ) @script:python@ p1 << r.p1; p2 << r.p2; @@ print "* file: %s kmalloc %s return %s" % (p1[0].file,p1[0].line,p2[0].line) // </smpl> Signed-off-by:
Timur Tabi <timur@freescale.com> Signed-off-by:
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Julia Lawall authored
Error handling code following a kzalloc should free the allocated data. The semantic match that finds the problem is as follows: (http://www.emn.fr/x-info/coccinelle/) // <smpl> @r exists@ local idexpression x; statement S; expression E; identifier f,f1,l; position p1,p2; expression *ptr != NULL; @@ x@p1 = \(kmalloc\|kzalloc\|kcalloc\)(...); ... if (x == NULL) S <... when != x when != if (...) { <+...x...+> } ( x->f1 = E | (x->f1 == NULL || ...) | f(...,x->f1,...) ) ...> ( return \(0\|<+...x...+>\|ptr\); | return@p2 ...; ) @script:python@ p1 << r.p1; p2 << r.p2; @@ print "* file: %s kmalloc %s return %s" % (p1[0].file,p1[0].line,p2[0].line) // </smpl> Signed-off-by:
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Heiko Schocher authored
- add I2C support - add FCC1 and FCC2 support - fix bogus gpio numbering in plattform code Signed-off-by:
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Sebastian Andrzej Siewior authored
in case the interrupt controller was used in an earlier life then it is possible it is that some of its sources were used and are still unmask. If the (unmasked) device is active and is creating interrupts (or one interrupts was pending since the interrupts were disabled) then the boot process "ends" very soon. Once external interrupts are enabled, we land in -> do_IRQ -> call ppc_md.get_irq() -> ipic_read() gets the source number -> irq_linear_revmap(source) -> revmap[source] == NO_IRQ -> irq_find_mapping(source) returns NO_IRQ because no source is registered -> source is NO_IRQ, ppc_spurious_interrupts gets incremented, no further action. Signed-off-by:Sebastian Andrzej Siewior <bigeasy@linutronix.de> Signed-off-by:
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