1. 19 May, 2012 1 commit
  2. 18 May, 2012 9 commits
  3. 12 May, 2012 10 commits
  4. 11 May, 2012 2 commits
  5. 10 May, 2012 2 commits
    • Mika Westerberg's avatar
      gpio/langwell: re-read the IRQ status register after each iteration · c8f925b6
      Mika Westerberg authored
      The IRQ status register should be re-read after each iteration.
      Otherwise the loop misses the interrupt if it gets raised immediately
      after handled.
      Reported-by: default avatarGrant Likely <grant.likely@secretlab.ca>
      Signed-off-by: default avatarMika Westerberg <mika.westerberg@linux.intel.com>
      Acked-by: default avatarLinus Walleij <linus.walleij@linaro.org>
      Signed-off-by: default avatarGrant Likely <grant.likely@secretlab.ca>
      c8f925b6
    • Tarun Kanti DebBarma's avatar
      gpio/omap: fix incorrect initialization of omap_gpio_mod_init · 6edd94db
      Tarun Kanti DebBarma authored
      Initialization of irqenable, irqstatus registers is the common
      operation done in this function for all OMAP platforms, viz. OMAP1,
      OMAP2+. The latter _gpio_rmw()'s which supposedly got introduced
      wrongly to take care of OMAP2+ platforms were overwriting initially
      programmed OMAP1 value breaking functionality on OMAP1.
      Somehow incorrect assumption was made that each _gpio_rmw()'s were
      mutually exclusive. On close observation it is found that the first
      _gpio_rmw() which is supposedly done to take care of OMAP1 platform
      is generic enough and takes care of OMAP2+ platform as well.
      Therefore remove the latter _gpio_rmw() to irqenable as they are
      redundant now.
      
      Writing to ctrl and debounce_en registers for OMAP2+ platforms are
      modified to match the original(pre-cleanup) code where the registers
      are initialized with 0. In the cleanup series since we are using
      _gpio_rmw(reg, 0, 1), instead of __raw_writel(), we are just reading
      and writing the same values to ctrl and debounce_en. This is not an
      issue for debounce_en register because it has 0x0 as the default value.
      But in the case of ctrl register the default value is 0x2 (GATINGRATIO
       = 0x1) so that we end up writing 0x2 instead of intended 0 value.
      Therefore changing back to __raw_writel() as this is sufficient for
      this case besides simpler to understand.
      
      Also, change irqstatus initalization logic that avoids comparison
      with bool, besides making it fit in a single line.
      
      Cc: stable@vger.kernel.org
      Cc: Tony Lindgren <tony@atomide.com>
      Cc: Kevin Hilman <khilman@ti.com>
      Cc: Santosh Shilimkar <santosh.shilimkar@ti.com>
      Cc: Grant Likely <grant.likely@secretlab.ca>
      Reported-by: default avatarJanusz Krzysztofik <jkrzyszt@tis.icnet.pl>
      Tested-by: default avatarJanusz Krzysztofik <jkrzyszt@tis.icnet.pl>
      Signed-off-by: default avatarTarun Kanti DebBarma <tarun.kanti@ti.com>
      Signed-off-by: default avatarKevin Hilman <khilman@ti.com>
      6edd94db
  6. 08 May, 2012 2 commits
  7. 06 May, 2012 5 commits
  8. 05 May, 2012 9 commits