- 22 Apr, 2019 1 commit
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Thierry Reding authored
Sam has been helping out a lot with reviewing DRM panel patches. Add him as reviewer to help him do this important work. Signed-off-by:
Thierry Reding <treding@nvidia.com> Acked-by:
Jagan Teki <jagan@amarulasolutions.com> Signed-off-by:
Sam Ravnborg <sam@ravnborg.org> Link: https://patchwork.freedesktop.org/patch/msgid/20190416075910.12015-1-thierry.reding@gmail.com
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- 20 Apr, 2019 1 commit
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Peter Griffin authored
On Hikey board all lima ip blocks are shared with one irq. This patch avoids a NULL ptr deref crash on this platform on startup. Tested with Weston and kmscube. Signed-off-by:
Peter Griffin <peter.griffin@linaro.org> Cc: Rob Herring <robh@kernel.org> Cc: Daniel Vetter <daniel@ffwll.ch> Cc: Qiang Yu <yuq825@gmail.com> Signed-off-by:
Qiang Yu <yuq825@gmail.com> Link: https://patchwork.freedesktop.org/patch/msgid/1555662781-22570-7-git-send-email-peter.griffin@linaro.org
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- 19 Apr, 2019 1 commit
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Philip Yang authored
After patch "drm: Use the same mmap-range offset and size for GEM and TTM", application failed to create bo of system memory because drm mmap_range size decrease to 64GB from original 1TB. This is not big enough for applications. Increase the drm mmap_range size to 1TB. Reviewed-by:
Thomas Zimmermann <tzimmermann@suse.de> Reviewed-by:
Christian König <christian.koenig@amd.com> Signed-off-by:
Philip Yang <Philip.Yang@amd.com> Signed-off-by:
Alex Deucher <alexander.deucher@amd.com> Link: https://patchwork.freedesktop.org/patch/msgid/20190417221507.933-1-Philip.Yang@amd.com
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- 18 Apr, 2019 11 commits
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Eric Anholt authored
It is the expectation of existing userspace (X11 + Mesa, in particular) that jobs submitted to the kernel against a shared BO will get implicitly synchronized by their submission order. If we want to allow clever userspace to disable implicit synchronization, we should do that under its own submit flag (as amdgpu and lima do). Note that we currently only implicitly sync for the rendering pass, not binning -- if you texture-from-pixmap in the binning vertex shader (vertex coordinate generation), you'll miss out on synchronization. Fixes flickering when multiple clients are running in parallel, particularly GL apps and compositors. v2: Fix a missing refcount on the CSD done fence for L2 cleaning. Signed-off-by:
Eric Anholt <eric@anholt.net> Link: https://patchwork.freedesktop.org/patch/msgid/20190416225856.20264-6-eric@anholt.netAcked-by:
Rob Clark <robdclark@gmail.com>
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Eric Anholt authored
We only set the excl (possible-writing) fence pointer and never add a shared (read-only) fence. Signed-off-by:
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Eric Anholt authored
The compute shader dispatch interface is pretty simple -- just pass in the regs that userspace has passed us, with no CLs to run. However, with no CL to run it means that we need to do manual cache flushing of the L2 after the HW execution completes (for SSBO, atomic, and image_load_store writes that are the output of compute shaders). This doesn't yet expose the L2 cache's ability to have a region of the address space not write back to memory (which could be used for shared_var storage). So far, the Mesa side has been tested on V3D v4.2 simpenrose (passing the ES31 tests), and on the kernel side on 7278 (failing atomic compswap tests in a way that doesn't reproduce on simpenrose). v2: Fix excessive allocation for the clean_job (reported by Dan Carpenter). Keep refs on jobs until clean_job is finished, to avoid spurious MMU errors if the output BOs are freed by userspace before L2 cleaning is finished. Signed-off-by: -
Eric Anholt authored
The CL submission had two jobs embedded in an exec struct. When I added TFU support, I had to replicate some of the exec stuff and some of the job stuff. As I went to add CSD, it became clear that actually what was in exec should just be in the two CL jobs, and it would let us share a lot more code between the 4 queues. v2: Fix missing error path in TFU ioctl's bo[] allocation. Signed-off-by:
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Eric Anholt authored
All consumers wanted drm_gem_object * now. Signed-off-by:
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Paul Kocialkowski authored
Our driver makes a typical use of CMA, with GEM object allocated as GEM CMA objects. Use DRM_GEM_CMA_VMAP_DRIVER_OPS to describe the ops instead of duplicating them. Because DRM_GEM_CMA_VMAP_DRIVER_OPS implements a gem_create_object op which sets per-object funcs (drm_cma_gem_default_funcs), we can also get rid of free_object_unlocked and gem_vm_ops, which are superseded by the object funcs. Signed-off-by:
Paul Kocialkowski <paul.kocialkowski@bootlin.com> Signed-off-by:
Maxime Ripard <maxime.ripard@bootlin.com> Link: https://patchwork.freedesktop.org/patch/msgid/20190418130509.3569-1-paul.kocialkowski@bootlin.com
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Tomeu Vizoso authored
If a job times out in slot 0 while a reset is performed because a job timed out in slot 1, the drm-sched core can get into a deadlock. Signed-off-by:
Tomeu Vizoso <tomeu.vizoso@collabora.com> Signed-off-by:
Rob Herring <robh@kernel.org> Link: https://patchwork.freedesktop.org/patch/msgid/20190418084305.45021-1-tomeu.vizoso@collabora.com
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Steven Price authored
Since panfrost has a 'select' on IOMMU_IO_PGTABLE_LPAE we must depend on the same set of flags. Otherwise IOMMU_IO_PGTABLE_LPAE will be forced on even though it cannot build (no support for cmpxchg64). This fixes the following warning from kconfig: WARNING: unmet direct dependencies detected for IOMMU_IO_PGTABLE_LPAE Depends on [n]: IOMMU_SUPPORT [=y] && (ARM || ARM64 || COMPILE_TEST [=y] && !GENERIC_ATOMIC64 [=y]) Selected by [y]: - DRM_PANFROST [=y] && HAS_IOMEM [=y] && DRM [=y] && (ARM || ARM64 || COMPILE_TEST [=y]) && MMU [=y] Reported-by:
kbuild test robot <lkp@intel.com> Signed-off-by:
Steven Price <steven.price@arm.com> Signed-off-by:
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Steven Price authored
Fix sparse warnings: drivers/gpu/drm/panfrost/panfrost_devfreq.c:133:5: warning: symbol 'panfrost_devfreq_init' was not declared. Should it be static? drivers/gpu/drm/panfrost/panfrost_devfreq.c:168:6: warning: symbol 'panfrost_devfreq_resume' was not declared. Should it be static? drivers/gpu/drm/panfrost/panfrost_devfreq.c:182:6: warning: symbol 'panfrost_devfreq_suspend' was not declared. Should it be static? drivers/gpu/drm/panfrost/panfrost_devfreq.c:212:6: warning: symbol 'panfrost_devfreq_record_transition' was not declared. Should it be static? Signed-off-by:
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YueHaibing authored
Fix sparse warning: drivers/gpu/drm/panfrost/panfrost_gem.c:17:6: warning: symbol 'panfrost_gem_free_object' was not declared. Should it be static? Reported-by:
Hulk Robot <hulkci@huawei.com> Signed-off-by:
YueHaibing <yuehaibing@huawei.com> Reviewed-by:
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Vicente Bergas authored
As explained by Robin Murphy: > the IOMMU shutdown disables paging, so if the VOP is still > scanning out then that will result in whatever IOVAs it was using now going > straight out onto the bus as physical addresses. We had a more radical approach before in commit 7f3ef5de ("drm/rockchip: Allow driver to be shutdown on reboot/kexec") but that resulted in new warnings and oopses on shutdown on rk3399 chromeos devices. So second try is resurrecting Vicentes shutdown change which should achieve the same result but in a less drastic way. Fixes: 63238173 ("Revert "drm/rockchip: Allow driver to be shutdown on reboot/kexec"") Cc: Jeffy Chen <jeffy.chen@rock-chips.com> Cc: Robin Murphy <robin.murphy@arm.com> Cc: Marc Zyngier <marc.zyngier@arm.com> Cc: Brian Norris <briannorris@chromium.org> Cc: Doug Anderson <dianders@chromium.org> Cc: stable@vger.kernel.org Suggested-by:
JeffyChen <jeffy.chen@rock-chips.com> Suggested-by:
Robin Murphy <robin.murphy@arm.com> Signed-off-by:
Vicente Bergas <vicencb@gmail.com> [adapted commit message to explain the history] Signed-off-by:
Heiko Stuebner <heiko@sntech.de> Tested-by:
Brian Norris <briannorris@chromium.org> Tested-by:
Douglas Anderson <dianders@chromium.org> Acked-by:
Marc Zyngier <marc.zyngier@arm.com> Link: https://patchwork.freedesktop.org/patch/msgid/20190402113753.10118-1-heiko@sntech.de
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- 17 Apr, 2019 8 commits
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Jonathan Marek authored
Add ACX467AKM-7 4.95" 1080×1920 LCD panel that is found on the LG Nexus 5 (hammerhead) phone. Signed-off-by:
Jonathan Marek <jonathan@marek.ca> [masneyb@onstation.org: checkpatch fixes; rename jdi,1080p-hammerhead binding to lg,acx467akm-7.] Signed-off-by:
Brian Masney <masneyb@onstation.org> Reviewed-by:
Linus Walleij <linus.walleij@linaro.org> Signed-off-by:
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Brian Masney authored
Add binding for the LG ACX467AKM-7 4.95" 1080×1920 LCD panel that is found on the LG Nexus 5 (hammerhead) phone. This appears to be a JDI panel based on some Internet searches, however a specific model number could not be found. I disassembled an old Nexus 5 with a broken screen and the LG part number is the only model number present on the back of the panel, so I think that is probably the best ID to use. Signed-off-by:
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Linus Walleij authored
This adds the device tree bindings for the ST-Ericsson Multi Channel Display Engine MCDE as found in the U8500 SoCs. Cc: devicetree@vger.kernel.org Reviewed-by:
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Neil Armstrong authored
The Amlogic SoCs Canvas buffers stride must be aligned on 64bytes and overall size should be aligned on PAGE width. Adds a custom dumb_create op to adds these requirements. Fixes: bbbe775e ("drm: Add support for Amlogic Meson Graphic Controller") Suggested-by:
Sky Zhou <sky.zhou@amlogic.com> Signed-off-by:
Neil Armstrong <narmstrong@baylibre.com> Reviewed-by:
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YueHaibing authored
Fix sparse warnings: drivers/gpu/drm/meson/meson_viu.c:93:6: warning: symbol 'meson_viu_set_g12a_osd1_matrix' was not declared. Should it be static? drivers/gpu/drm/meson/meson_viu.c:121:6: warning: symbol 'meson_viu_set_osd_matrix' was not declared. Should it be static? drivers/gpu/drm/meson/meson_viu.c:190:6: warning: symbol 'meson_viu_set_osd_lut' was not declared. Should it be static? Signed-off-by:
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YueHaibing authored
Fix sparse warnings: drivers/gpu/drm/sun4i/sun8i_tcon_top.c:271:36: warning: symbol 'sun8i_r40_tcon_top_quirks' was not declared. Should it be static? drivers/gpu/drm/sun4i/sun8i_tcon_top.c:276:36: warning: symbol 'sun50i_h6_tcon_top_quirks' was not declared. Should it be static? drivers/gpu/drm/sun4i/sun4i_tcon.c:239:6: warning: symbol 'sun4i_tcon_set_mux' was not declared. Should it be static? Reported-by:
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YueHaibing authored
Fix sparse warning: drivers/gpu/drm/lima/lima_sched.c:356:36: warning: symbol 'lima_sched_ops' was not declared. Should it be static? Fixes: a1d2a633 ("drm/lima: driver for ARM Mali4xx GPUs") Reported-by:
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Gerd Hoffmann authored
Also drop the dstclip parameter sphinx has warned about (leftover from an earlier patch version). Signed-off-by:
Gerd Hoffmann <kraxel@redhat.com> Acked-by:
Daniel Vetter <daniel.vetter@ffwll.ch> Link: http://patchwork.freedesktop.org/patch/msgid/20190416090533.28374-1-kraxel@redhat.com
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- 16 Apr, 2019 5 commits
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Eric Anholt authored
It's a pretty direct port of what I did for v3d. Signed-off-by:
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Eric Anholt authored
I needed to add implicit dependency support for v3d, and Rob Herring has been working on it for panfrost, and I had recently looked at the lima implementation so I think this will be a good intersection of what we all want and simplify our scheduler implementations. v2: Rebase on xa_limit_32b API change, and tiny checkpatch cleanups on the way in (unsigned int vs unsigned, extra return before EXPORT_SYMBOL_GPL) Signed-off-by: -
Deepak Rawat authored
Plane property "FB_DAMAGE_CLIPS" can only be used by atomic aware user-space, so no point exposing it otherwise. Cc: <stable@vger.kernel.org> Signed-off-by:
Deepak Rawat <drawat@vmware.com> Reviewed-by:
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Joel Stanley authored
The GFX IP is inside of the ASPEED BMC SoC so there is little use enabling it on a kernel that does not support ASPEED. When building with COMPILE_TEST the architecture many not have CMA support, so to avoid breaking the build we only select these options if the architecture supports the contiguous allocator. I suspect the DRM_PANEL came from a cut/paste error. Fixes: 4f2a8f58 ("drm: Add ASPEED GFX driver") Reported-by:
Stephen Rothwell <sfr@canb.auug.org.au> Reported-by:
Joel Stanley <joel@jms.id.au> Signed-off-by:
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Christian König authored
Instead of checking the upper values of the sequence number use an explicit field in the dma_fence_ops structure to note if a sequence should be 32bit or 64bit. Signed-off-by:
Lionel Landwerlin <lionel.g.landwerlin@intel.com> Link: https://patchwork.freedesktop.org/patch/299655/
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- 12 Apr, 2019 7 commits
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Rob Herring authored
Add support for 2MB sized pages. This will improve our map and unmap times and save a bit of memory by avoiding 3rd level page tables for contiguous allocations. As we use shmem for buffers and huge page allocations for shmem are off by default, there isn't an improvement out of the box and userspace must enable THP for shmem. It's not clear if the h/w can support 1GB page sizes which standard ARM long format descriptors support. In any case, it is unlikely we'll see any contiguous 1GB allocations on current h/w. Cc: Tomeu Vizoso <tomeu.vizoso@collabora.com> Cc: David Airlie <airlied@linux.ie> Cc: Daniel Vetter <daniel@ffwll.ch> Signed-off-by:
Alyssa Rosenzweig <alyssa@rosenzweig.io> Reviewed-by:
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Rob Herring authored
This adds the initial driver for panfrost which supports Arm Mali Midgard and Bifrost family of GPUs. Currently, only the T860 and T760 Midgard GPUs have been tested. v2: - Add GPU reset on job hangs (Tomeu) - Add RuntimePM and devfreq support (Tomeu) - Fix T760 support (Tomeu) - Add a TODO file (Rob, Tomeu) - Support multiple in fences (Tomeu) - Drop support for shared fences (Tomeu) - Fill in MMU de-init (Rob) - Move register definitions back to single header (Rob) - Clean-up hardcoded job submit todos (Rob) - Implement feature setup based on features/issues (Rob) - Add remaining Midgard DT compatible strings (Rob) v3: - Add support for reset lines (Neil) - Add a MAINTAINERS entry (Rob) - Call dma_set_mask_and_coherent (Rob) - Do MMU invalidate on map and unmap. Restructure to do a single operation per map/unmap call. (Rob) - Add a missing explicit padding to struct drm_panfrost_create_bo (Rob) - Fix 0-day error: "panfrost_devfreq.c:151:9-16: ERROR: PTR_ERR applied after initialization to constant on line 150" - Drop HW_FEATURE_AARCH64_MMU conditional (Rob) - s/DRM_PANFROST_PARAM_GPU_ID/DRM_PANFROST_PARAM_GPU_PROD_ID/ (Rob) - Check drm_gem_shmem_prime_import_sg_table() error code (Rob) - Re-order power on sequence (Rob) - Move panfrost_acquire_object_fences() before scheduling job (Rob) - Add NULL checks on array pointers in job clean-up (Rob) - Rework devfreq (Tomeu) - Fix devfreq init with no regulator (Rob) - Various WS and comments clean-up (Rob) Cc: Maarten Lankhorst <maarten.lankhorst@linux.intel.com> Cc: Maxime Ripard <maxime.ripard@bootlin.com> Cc: Sean Paul <sean@poorly.run> Cc: David Airlie <airlied@linux.ie> Cc: Daniel Vetter <daniel@ffwll.ch> Cc: Lyude Paul <lyude@redhat.com> Reviewed-by:
Marty E. Plummer <hanetzer@startmail.com> Signed-off-by:
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Rob Herring authored
Similar to the single handle drm_gem_object_lookup(), drm_gem_objects_lookup() takes an array of handles and returns an array of GEM objects. v2: - Take the userspace pointer directly and allocate the array. - Expand the function documentation. Cc: Maarten Lankhorst <maarten.lankhorst@linux.intel.com> Cc: Maxime Ripard <maxime.ripard@bootlin.com> Cc: Sean Paul <sean@poorly.run> Cc: David Airlie <airlied@linux.ie> Cc: Daniel Vetter <daniel@ffwll.ch> Acked-by:
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Rob Herring authored
ARM Mali midgard GPU is similar to standard 64-bit stage 1 page tables, but have a few differences. Add a new format type to represent the format. The input address size is 48-bits and the output address size is 40-bits (and possibly less?). Note that the later bifrost GPUs follow the standard 64-bit stage 1 format. The differences in the format compared to 64-bit stage 1 format are: The 3rd level page entry bits are 0x1 instead of 0x3 for page entries. The access flags are not read-only and unprivileged, but read and write. This is similar to stage 2 entries, but the memory attributes field matches stage 1 being an index. The nG bit is not set by the vendor driver. This one didn't seem to matter, but we'll keep it aligned to the vendor driver. Cc: Will Deacon <will.deacon@arm.com> Acked-by:
Joerg Roedel <jroedel@suse.de> Signed-off-by:
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Peter Ujfalusi authored
The TFP410 supports 24 bit, single-edge and 12 bit, dual-edge modes. Depending on how many wires are used (24/12) the driver can set the correct bus_format. If the information is not available in DT then assume 24 bit, single-edge setup. Signed-off-by:
Peter Ujfalusi <peter.ujfalusi@ti.com> Reviewed-by:
Laurent Pinchart <laurent.pinchart@ideasonboard.com> Reviewed-by:
Andrzej Hajda <a.hajda@samsung.com> Signed-off-by:
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Peter Ujfalusi authored
tfp410 can be connect to host processor in 24bit, single-edge (24 lines) or 12bit, dual-edge (12 lines). Add bus-width to the documentation so it can be used to select between the two connection scheme. Signed-off-by:
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Peter Ujfalusi authored
In case either the HPD gpio is not specified or when the HPD gpio can not be used as interrupt we should tell the core that the HPD needs to be polled for detecting hotplug. Signed-off-by:
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- 11 Apr, 2019 6 commits
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Gerd Hoffmann authored
Add comments to the existing feature flags, documenting which commands belong to them. Signed-off-by:
Gurchetan Singh <gurchetansingh@chromium.org> Link: http://patchwork.freedesktop.org/patch/msgid/20190410114227.25846-2-kraxel@redhat.com
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Gerd Hoffmann authored
Oops, the __iomem annotation was added to the header file only. Add it to the implementation (and documentation) too. Fixes: 5c5373b5 ("drm: switch drm_fb_xrgb8888_to_rgb888_dstclip to accept __iomem dst") Signed-off-by:
Noralf Trønnes <noralf@tronnes.org> Link: http://patchwork.freedesktop.org/patch/msgid/20190411044932.13247-1-kraxel@redhat.com
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Noralf Trønnes authored
Due to copy/paste error, the fbdev format was changed to 32bpp = XRGB8888 which is an emulated format for the RGB565 drivers. Revert to to using the fallback which is dev->mode_config.preferred_depth for the drivers that set it or 32bpp for those that don't (repaper, st7586). Fixes: 3eba3922 ("drm/tinydrm: Drop using tinydrm_device") Signed-off-by:
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Noralf Trønnes authored
It is generic code and having it in the helper will let other drivers benefit from it. One change was necessary assuming this to be true: INTEL_INFO(dev_priv)->num_pipes == dev->mode_config.num_crtc Suggested-by:
Jani Nikula <jani.nikula@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20190407165243.54043-4-noralf@tronnes.org
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Noralf Trønnes authored
This is done to stay consistent with our naming scheme of _register() = others can start calling us from any thread. Suggested-by:
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Maxime Ripard authored
Now that we can express our DMA topology, rely on those property instead of hardcoding an offset from the dma_addr_t which wasn't really great. We still need to add some code to deal with the old DT that would lack that property, but we move the offset to the DRM device dma_pfn_offset to be able to rely on just the dma_addr_t associated to the GEM object. Acked-by:
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