- 28 Jan, 2013 32 commits
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Prashant Gaikwad authored
With device tree support added for Tegra clocks look up is done from device tree, remove unused TEGRA_CLK_DUPLICATE()s. Signed-off-by: Prashant Gaikwad <pgaikwad@nvidia.com> Acked-by: Mike Turquette <mturquette@linaro.org> Signed-off-by: Stephen Warren <swarren@nvidia.com>
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Prashant Gaikwad authored
With device tree support added for Tegra clocks look up is done from device tree, remove unused TEGRA_CLK_DUPLICATE()s. Signed-off-by: Prashant Gaikwad <pgaikwad@nvidia.com> Acked-by: Mike Turquette <mturquette@linaro.org> Signed-off-by: Stephen Warren <swarren@nvidia.com>
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Prashant Gaikwad authored
Remove AUXDATA as clocks are initialized from device node. Signed-off-by: Prashant Gaikwad <pgaikwad@nvidia.com> Signed-off-by: Stephen Warren <swarren@nvidia.com>
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Prashant Gaikwad authored
Remove AUXDATA as clock are initialized from device node. Signed-off-by: Prashant Gaikwad <pgaikwad@nvidia.com> Signed-off-by: Stephen Warren <swarren@nvidia.com>
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Prashant Gaikwad authored
Configlink clock information is added to device tree. Get the clocks using device node. Remove AUXDATA. Signed-off-by: Prashant Gaikwad <pgaikwad@nvidia.com> Acked-by: Mark Brown <broonie@opensource.wolfsonmicro.com> Signed-off-by: Stephen Warren <swarren@nvidia.com>
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Prashant Gaikwad authored
As clock information is added to device tree clock can be looked up using clk_get. Remove use of clk_get_sys. Signed-off-by: Prashant Gaikwad <pgaikwad@nvidia.com> Acked-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org> Acked-by: Marc Dietrich <marvin24@gmx.de> Acked-by: Julian Andres Klode <jak@jak-linux.org> [swarren: updated TODO file to remove entry that requested this change] Signed-off-by: Stephen Warren <swarren@nvidia.com>
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Prashant Gaikwad authored
Add clock i2c clock information to device node. Signed-off-by: Prashant Gaikwad <pgaikwad@nvidia.com> Signed-off-by: Stephen Warren <swarren@nvidia.com>
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Prashant Gaikwad authored
Add clock information to device nodes. Signed-off-by: Prashant Gaikwad <pgaikwad@nvidia.com> [swarren: added second clock to 3d node] Signed-off-by: Stephen Warren <swarren@nvidia.com>
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Prashant Gaikwad authored
Add clock information to device nodes. Signed-off-by: Prashant Gaikwad <pgaikwad@nvidia.com> Signed-off-by: Stephen Warren <swarren@nvidia.com>
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Prashant Gaikwad authored
Since Tegra spi devices do not have multiple clocks, no need to use clock name to get the clock. Signed-off-by: Prashant Gaikwad <pgaikwad@nvidia.com> Acked-by: Grant Likely <grant.likely@secretlab.ca> Signed-off-by: Stephen Warren <swarren@nvidia.com>
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Prashant Gaikwad authored
Remove all legacy clock code from mach-tegra. Signed-off-by: Prashant Gaikwad <pgaikwad@nvidia.com> Signed-off-by: Stephen Warren <swarren@nvidia.com>
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Prashant Gaikwad authored
Migrate Tegra clock support to drivers/clk/tegra, this involves moving: 1. definition of tegra_cpu_car_ops to clk.c 2. definition of reset functions to clk-peripheral.c 3. change parent of cpu clock. 4. Remove legacy clock initialization. 5. Initialize clocks using DT. 6. Remove all instance of mach/clk.h Signed-off-by: Prashant Gaikwad <pgaikwad@nvidia.com> [swarren: use to_clk_periph_gate().] Signed-off-by: Stephen Warren <swarren@nvidia.com>
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Prashant Gaikwad authored
Add Tegra30 clock support based on common clock framework. Signed-off-by: Prashant Gaikwad <pgaikwad@nvidia.com> [swarren: ensure all OF lookups return valid cookies i.e. an explicit error pointer or valid pointer not NULL, adapt to renames in earlier patches, fixed some checkpatch issues.] Acked-by: Mike Turquette <mturquette@linaro.org> Signed-off-by: Stephen Warren <swarren@nvidia.com>
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Prashant Gaikwad authored
Add Tegra20 clock support based on common clock framework. Signed-off-by: Prashant Gaikwad <pgaikwad@nvidia.com> [swarren: s/1GHz/100MHz/ in call to tegra_clk_plle() to fix PCIe, implemented KBC clock, ensure all OF lookups return valid cookies i.e. an explicit error pointer or valid pointer not NULL, adapt to renames in earlier patches, fixed some checkpatch issues.] Acked-by: Mike Turquette <mturquette@linaro.org> Signed-off-by: Stephen Warren <swarren@nvidia.com>
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Prashant Gaikwad authored
Add Tegra specific clocks, pll, pll_out, peripheral, frac_divider, super. Signed-off-by: Prashant Gaikwad <pgaikwad@nvidia.com> [swarren: alloc sizeof(*foo) not sizeof(struct foo), add comments re: storing pointers to stack variables, make a timeout loop more idiomatic, use _clk_pll_disable() not clk_disable_pll() from _program_pll() to avoid redundant lock operations, unified tegra_clk_periph() and tegra_clk_periph_nodiv(), unified tegra_clk_pll{,e}, rename all clock registration functions so they don't have the same name as the clock structs, return -EINVAL from clk_plle_enable when matching table rate not found, pass ops to _tegra_clk_register_pll rather than a bool.] Acked-by: Mike Turquette <mturquette@linaro.org> Signed-off-by: Stephen Warren <swarren@nvidia.com>
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Prashant Gaikwad authored
The device tree binding models Tegra30 CAR (Clock And Reset) as a single monolithic clock provider. Signed-off-by: Prashant Gaikwad <pgaikwad@nvidia.com> [swarren: fixed typo in binding doc] Signed-off-by: Stephen Warren <swarren@nvidia.com>
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Stephen Warren authored
The Tegra20 CAR (Clock And Reset) Controller controls most aspects of most clocks within Tegra20. The device tree binding models this as a single monolithic clock provider, which exports many clocks. This reduces the number of nodes needed in device tree to represent these clocks. This binding is only useful for Tegra20; the set of clocks that exists on Tegra30 is sufficiently different to merit its own binding. Signed-off-by: Stephen Warren <swarren@nvidia.com> Acked-by: Simon Glass <sjg@chromium.org> [pgaikwad: Added mux clk ids and sorted CAR node] Signed-off-by: Prashant Gaikwad <pgaikwad@nvidia.com> Signed-off-by: Stephen Warren <swarren@nvidia.com>
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Prashant Gaikwad authored
tegra_cpu_car_ops struct is going to be accessed from drivers/clk/tegra. Move the tegra_cpu_car_ops to include/linux/clk/tegra.h. Signed-off-by: Prashant Gaikwad <pgaikwad@nvidia.com> Signed-off-by: Stephen Warren <swarren@nvidia.com>
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Prashant Gaikwad authored
Add function to read chip id from APB MISC registers. This function will also get called from clock driver to flush write operations on apb bus. Signed-off-by: Prashant Gaikwad <pgaikwad@nvidia.com> Signed-off-by: Stephen Warren <swarren@nvidia.com>
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Joseph Lo authored
The "sleep.S" file has many functions that be shared by different module currently. Not just for CPU idle driver. Make it build as default now. Reported-by: Rhyland Klein <rklein@nvidia.com> Signed-off-by: Joseph Lo <josephl@nvidia.com> [swarren: add sleep.o to separate line so each line only contains 1 file] Signed-off-by: Stephen Warren <swarren@nvidia.com>
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Joseph Lo authored
It would rather to use the API of time_to_jiffies than a constant number of jiffies for the wait time of CPU power up. Based on the work by: Sang-Hun Lee <sanlee@nvidia.com> Signed-off-by: Joseph Lo <josephl@nvidia.com> Signed-off-by: Stephen Warren <swarren@nvidia.com>
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Joseph Lo authored
The reset handler code is used for either UP or SMP. To make Tegra device can compile for UP. It needs to be moved to another file that is not SMP only. This is because the reset handler also be needed by CPU idle "powered-down" mode. So we also need to put the reset handler init function in non-SMP only and init them always. And currently the implementation of the reset handler to know which CPU is OK to bring up was identital with "cpu_present_mask". But the "cpu_present_mask" did not initialize yet when the reset handler init function was moved to init early function. We use the "cpu_possible_mask" to replace "cpu_present_mask". Then it can work on both UP and SMP case. Signed-off-by: Joseph Lo <josephl@nvidia.com> [swarren: dropped the move of v7_invalidate_l1() from one file to another, to avoid conflicts with Pavel's cleanup of this function, adjust Makefile so each line only contains 1 file.] Signed-off-by: Stephen Warren <swarren@nvidia.com>
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Joseph Lo authored
There are some redundant codes in the CPUINIT section that was caused by some codes not be organized well in "headsmp.S". Currently all the codes in "headsmp.S" were put into CPUINIT section. But actually it doesn't need to be loacted in CPUINIT section. There is no fuction access them in CPUINIT section and we will relocate them to IRAM. These codes also caused some unnecessary functions that access these codes been put into CPUINIT section too. This patch clean it up and put them into normal text section. Signed-off-by: Joseph Lo <josephl@nvidia.com> Signed-off-by: Stephen Warren <swarren@nvidia.com>
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Joseph Lo authored
The tegra_cpu_die was be executed by the CPU itslf. So the clock gating procedure won't be executed after the CPU hardware shutdown code. Moving the clock gating procedure to tegra_cpu_kill that will be run by another CPU after the CPU died. Signed-off-by: Joseph Lo <josephl@nvidia.com> Acked-by: Peter De Schrijver <pdeschrijver@nvidia.com> Signed-off-by: Stephen Warren <swarren@nvidia.com>
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Joseph Lo authored
Updating the cache maintenance order before CPU shutdown when doing CPU hotplug. The old order: * clean L1 by flush_cache_all * exit SMP * CPU shutdown Adapt to: * disable L1 data cache by clear C bit * clean L1 by v7_flush_dcache_louis * exit SMP * CPU shutdown For CPU hotplug case, it's no need to do "flush_cache_all". And we should disable L1 data cache before clean L1 data cache. Then leaving the SMP coherency. Signed-off-by: Joseph Lo <josephl@nvidia.com> Acked-by: Peter De Schrijver <pdeschrijver@nvidia.com> Signed-off-by: Stephen Warren <swarren@nvidia.com>
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Joseph Lo authored
The power up sequence is different on the cold boot CPU and the CPU that resumed from the hotplug. For the cold boot CPU, it was been power gated as default. To power up the cold boot CPU, the power should be un-gated by un toggling the power gate register manually. For the CPU that resumed from the hotplug, after un-halted the CPU. The flow controller will un-gate the power of the CPU. No need to manually control, just wait the power be resumed and continue the power up sequence after the CPU power is ready. Based on the work by: Varun Wadekar <vwadekar@nvidia.com> Signed-off-by: Joseph Lo <josephl@nvidia.com> Acked-by: Peter De Schrijver <pdeschrijver@nvidia.com> Signed-off-by: Stephen Warren <swarren@nvidia.com>
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Richard Zhao authored
tegra_cpu_init/exit will be called every time one cpu core is online or offline. And all cpu cores share same clocks, redundant clk_get/put wast time, so I move them out. Signed-off-by: Richard Zhao <linuxzsc@gmail.com> Signed-off-by: Stephen Warren <swarren@nvidia.com>
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Stephen Warren authored
Fix: warning: (ARCH_TEGRA_2x_SOC) selects ARM_ERRATA_754327 which has unmet direct dependencies (CPU_V7 && SMP) warning: (ARCH_TEGRA_2x_SOC) selects ARM_ERRATA_742230 which has unmet direct dependencies (CPU_V7 && SMP) by selecting options only if SMP. Signed-off-by: Stephen Warren <swarren@nvidia.com>
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Hiroshi Doyu authored
No need to be public. Checked with: $ touch arch/arm/mach-tegra/*[ch] && make C=1 Signed-off-by: Hiroshi Doyu <hdoyu@nvidia.com> Signed-off-by: Stephen Warren <swarren@nvidia.com>
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Hiroshi Doyu authored
Add missing \n. Signed-off-by: Hiroshi Doyu <hdoyu@nvidia.com> Signed-off-by: Stephen Warren <swarren@nvidia.com>
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Stephen Warren authored
Move arch/arm/mach-tegra/timer.c to drivers/clocksource/tegra20_timer.c so that the code is co-located with other clocksource drivers, and to reduce the size of the mach-tegra directory. Signed-off-by: Stephen Warren <swarren@nvidia.com>
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Stephen Warren authored
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- 14 Jan, 2013 1 commit
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Joachim Eastwood authored
After "ARM: delete struct sys_timer" board-rm9200-dt fails compilation with the following error: CC arch/arm/mach-at91/board-rm9200-dt.o arch/arm/mach-at91/board-rm9200-dt.c:50:2: error: unknown field 'timer' specified in initializer arch/arm/mach-at91/board-rm9200-dt.c:50:13: error: 'at91rm9200_timer' undeclared here (not in a function) make[1]: *** [arch/arm/mach-at91/board-rm9200-dt.o] Error 1 make: *** [arch/arm/mach-at91] Error 2 This is a fall out from the timer conversion. Fix it by converting board-rm9200-dt to use new timer init function as well. Signed-off-by: Joachim Eastwood <manabian@gmail.com> Signed-off-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Olof Johansson <olof@lixom.net>
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- 10 Jan, 2013 1 commit
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Linus Torvalds authored
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- 09 Jan, 2013 6 commits
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git://git.linaro.org/people/rmk/linux-armLinus Torvalds authored
Pull ARM fixes from Russell King. * 'fixes' of git://git.linaro.org/people/rmk/linux-arm: ARM: 7616/1: cache-l2x0: aurora: Use writel_relaxed instead of writel ARM: 7615/1: cache-l2x0: aurora: Invalidate during clean operation with WT enable ARM: 7614/1: mm: fix wrong branch from Cortex-A9 to PJ4b ARM: 7612/1: imx: Do not select some errata that depends on !ARCH_MULTIPLATFORM ARM: 7611/1: VIC: fix bug in VIC irqdomain code ARM: 7610/1: versatile: bump IRQ numbers ARM: 7609/1: disable errata work-arounds which access secure registers ARM: 7608/1: l2x0: Only set .set_debug on PL310 r3p0 and earlier
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git://git.kernel.org/pub/scm/linux/kernel/git/bp/bpLinus Torvalds authored
Pull EDAC fixes from Borislav Petkov: "Two error path fixes causing a crash and a Kconfig fix for an issue which spilled all EDAC suboptions into the 'Device Drivers' menu." * tag 'edac_fixes_for_3.8' of git://git.kernel.org/pub/scm/linux/kernel/git/bp/bp: EDAC: Cleanup device deregistering path EDAC: Fix EDAC Kconfig menu EDAC: Fix kernel panic on module unloading
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Linus Torvalds authored
The check for a pmd being in the process of being split was dropped by mistake by commit d10e63f2 ("mm: numa: Create basic numa page hinting infrastructure"). Put it back. Reported-by: Dave Jones <davej@redhat.com> Debugged-by: Hillf Danton <dhillf@gmail.com> Acked-by: Andrea Arcangeli <aarcange@redhat.com> Acked-by: Mel Gorman <mgorman@suse.de> Cc: Kirill Shutemov <kirill@shutemov.name> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
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Marc Dionne authored
Commit 3a50597d ("KEYS: Make the session and process keyrings per-thread") removed the definition of the thread_group_cred structure, but left a now unused pointer in struct cred. Signed-off-by: Marc Dionne <marc.c.dionne@gmail.com> Signed-off-by: David Howells <dhowells@redhat.com> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
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git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-socLinus Torvalds authored
Pull ARM SoC fixes from Olof Johansson: "People are back from the holiday breaks, and it shows. Here are a bunch of fixes for a number of platforms: - A couple of small fixes for Nomadik - A larger set of changes for kirkwood/mvebu - uart driver selection, dt clocks, gpio-poweroff fixups, a few __init annotation fixes and some error handling improvement in their xor dma driver. - i.MX had a couple of minor fixes (and a critical one for flexcan2 clock setup) - MXS has a small board fix and a framebuffer bugfix - A set of fixes for Samsung Exynos, fixing default bootargs and some Exynos5440 clock issues - A set of OMAP changes including PM fixes and a few sparse warning fixups All in all a bit more positive code delta than we'd ideally want to see here, mostly from the OMAP PM changes, but nothing overly crazy." * tag 'fixes' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (44 commits) ARM: clps711x: Fix bad merge of clockevents setup ARM: highbank: save and restore L2 cache and GIC on suspend ARM: highbank: add a power request clear ARM: highbank: fix secondary boot and hotplug ARM: highbank: fix typos with hignbank in power request functions ARM: dts: fix highbank cpu mpidr values ARM: dts: add device_type prop to cpu nodes on Calxeda platforms ARM: mx5: Fix MX53 flexcan2 clock ARM: OMAP2+: am33xx-hwmod: Fix wrongly terminated am33xx_usbss_mpu_irqs array pinctrl: mvebu: make pdma clock on dove mandatory ARM: Dove: Add pinctrl clock to DT dma: mv_xor: fix error handling for clocks dma: mv_xor: fix error handling of mv_xor_channel_add() arm: mvebu: Add missing ; for cpu node. arm: mvebu: Armada XP MV78230 has only three Ethernet interfaces arm: mvebu: Armada XP MV78230 has two cores, not one clk: mvebu: Remove inappropriate __init tagging ARM: Kirkwood: Use fixed-regulator instead of board gpio call ARM: Kirkwood: Fix missing sdio clock ARM: Kirkwood: Switch TWSI1 of 88f6282 to DT clock providers ...
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git://people.freedesktop.org/~airlied/linuxLinus Torvalds authored
Pull drm update from Dave Airlie: "Exynos and Radeon mostly, with a dma-buf and ttm fix thrown in. It's a bit big but its mostly exynos license fix ups and I'd rather not hold those up since its legally stuff. Radeon has a couple of fixes from dma engine work, TTM is just a locking fix, and dma-buf fix has been hanging around and I finally got a chance to review it." * 'drm-fixes' of git://people.freedesktop.org/~airlied/linux: (30 commits) drm/ttm: fix fence locking in ttm_buffer_object_transfer drm/prime: drop reference on imported dma-buf come from gem drm/radeon: add quirk for d3 delay during switcheroo poweron for apple macbooks drm/exynos: move finish page flip to a common place drm/exynos: fimd: modify condition in fimd resume drm/radeon: fix DMA CS parser for r6xx linear copy packet drm/radeon: split r6xx and r7xx copy_dma functions drm/exynos: Use devm_clk_get in exynos_drm_gsc.c drm/exynos: Remove redundant NULL check in exynos_drm_gsc.c drm/exynos: Remove explicit freeing using devm_* APIs in exynos_drm_gsc.c drm/exynos: Use devm_clk_get in exynos_drm_rotator.c drm/exynos: Remove redundant NULL check in exynos_drm_rotator.c drm/exynos: Remove unnecessary devm_* freeing APIs in exynos_drm_rotator.c drm/exynos: Use devm_clk_get in exynos_drm_fimc.c drm/exynos: Remove redundant NULL check drm/exynos: Remove explicit freeing using devm_* APIs in exynos_drm_fimc.c drm/exynos: Use devm_kzalloc in exynos_drm_ipp.c drm/exynos: fix gem buffer allocation type checking drm/exynos: remove needless parenthesis. drm/exynos: fix incorrect interrupt induced by m2m operation. ...
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