- 27 Apr, 2013 1 commit
-
-
Stephen Boyd authored
Hot-plugging with CONFIG_DEBUG_PREEMPT=y on a device with arm architected timers causes a slew of "using smp_processor_id() in preemptible" warnings: BUG: using smp_processor_id() in preemptible [00000000] code: sh/111 caller is arch_timer_cpu_notify+0x14/0xc8 This happens because sometimes the cpu notifier, arch_timer_cpu_notify(), is called in preemptible context and other times in non-preemptible context but we use this_cpu_ptr() to retrieve the clockevent in all cases. We're only going to actually use the pointer in non-preemptible context though, so push the this_cpu_ptr() access down into the cases to force the checks to occur only in non-preemptible contexts. Cc: John Stultz <john.stultz@linaro.org> Cc: Thomas Gleixner <tglx@linutronix.de> Cc: Mark Rutland <mark.rutland@arm.com> Acked-by: Marc Zyngier <Marc.Zyngier@arm.com> Signed-off-by: Stephen Boyd <sboyd@codeaurora.org> Signed-off-by: Olof Johansson <olof@lixom.net>
-
- 23 Apr, 2013 1 commit
-
-
Arnd Bergmann authored
Commit 0583fe47 "ARM: convert arm/arm64 arch timer to use CLKSRC_OF init" has left the omap5_realtime_timer_init() function with a stale variable and broken whitespace. This fixes both. Signed-off-by: Arnd Bergmann <arnd@arndb.de>
-
- 17 Apr, 2013 1 commit
-
-
Olof Johansson authored
Merge tag 'clksrc-cleanup-for-3.10-part2' of git://sources.calxeda.com/kernel/linux into late/clksrc This is the 2nd part of ARM timer clean-ups for 3.10. This series has the following changes: - Add sched_clock selection logic to select the highest frequency clock - Use full 64-bit arch timer counter for sched_clock - Convert arch timer, sp804 and integrator-cp timers to CLKSRC_OF and adapt all users to use clocksource_of_init * tag 'clksrc-cleanup-for-3.10-part2' of git://sources.calxeda.com/kernel/linux: devtree: add binding documentation for sp804 ARM: integrator-cp: convert use CLKSRC_OF for timer init ARM: versatile: use OF init for sp804 timer ARM: versatile: add versatile dtbs to dtbs target ARM: vexpress: remove extra timer-sp control register clearing ARM: dts: vexpress: disable CA9 core tile sp804 timer ARM: vexpress: remove sp804 OF init ARM: highbank: use OF init for sp804 timer ARM: timer-sp: convert to use CLKSRC_OF init OF: add empty of_device_is_available for !OF ARM: convert arm/arm64 arch timer to use CLKSRC_OF init ARM: make machine_desc->init_time default to clocksource_of_init ARM: arch_timer: use full 64-bit counter for sched_clock ARM: make sched_clock just call a function pointer ARM: sched_clock: allow changing to higher frequency counter Signed-off-by: Olof Johansson <olof@lixom.net> This has a nasty set of conflicts with the exynos MCT code, which was moved in a separate branch, and then fixed up when merged in, but still conflicts a bit here. It should have been sorted out by this merge though.
-
- 11 Apr, 2013 13 commits
-
-
Haojian Zhuang authored
The sp804 binding is already in use by several platforms. This adds missing documentation for the binding and also extends the binding to handle some additional possible interrupt configurations. Signed-off-by: Haojian Zhuang <haojian.zhuang@linaro.org> Signed-off-by: Rob Herring <rob.herring@calxeda.com>
-
Rob Herring authored
Move the integrator-cp timer init to timer-sp.c and use CLKSRC_OF. There is no reason to use the aliases, so drop them from the init code. The integrator-cp timers are mistakenly called sp804 timers in the dts, but in fact they are not sp804 dual timers, but single timers with the same programming model. Fix the dts to reflect this. Signed-off-by: Rob Herring <rob.herring@calxeda.com> Acked-by: Linus Walleij <linus.walleij@linaro.org>
-
Rob Herring authored
Enable DT based init for the sp804 timers on versatile DT platform. Signed-off-by: Rob Herring <rob.herring@calxeda.com>
-
Rob Herring authored
Add the versatile platform dtbs to the dtbs make rule. Signed-off-by: Rob Herring <rob.herring@calxeda.com>
-
Rob Herring authored
The timer-sp initialization code clears the control register before initializing the timers, so every platform doing this is redundant. Signed-off-by: Rob Herring <rob.herring@calxeda.com>
-
Rob Herring authored
The motherboard sp804 timer is used, but core tile sp804 timer is not. According to Russell King, the clock configuration is undocumented and defaults to 32kHz which is not desireable. So mark core tile sp804 timer as disabled. Signed-off-by: Rob Herring <rob.herring@calxeda.com>
-
Rob Herring authored
Remove the vexpress specific setup for the sp804 timer now that clocksource_of_init will do it. Signed-off-by: Rob Herring <rob.herring@calxeda.com> Acked-by: Pawel Moll <pawel.moll@arm.com>
-
Rob Herring authored
Remove the highbank specific setup for the sp804 timer now that clocksource_of_init will do it. Signed-off-by: Rob Herring <rob.herring@calxeda.com>
-
Rob Herring authored
This adds CLKSRC_OF based init for sp804 timer. The clock initialization is refactored to support retrieving the clock(s) from the DT. Signed-off-by: Rob Herring <rob.herring@calxeda.com>
-
Rob Herring authored
Add an empty version of of_device_is_available. Signed-off-by: Rob Herring <rob.herring@calxeda.com>
-
Rob Herring authored
This converts arm and arm64 to use CLKSRC_OF DT based initialization for the arch timer. A new function arch_timer_arch_init is added to allow for arch specific setup. This has a side effect of enabling sched_clock on omap5 and exynos5. There should not be any reason not to use the arch timers for sched_clock. Signed-off-by: Rob Herring <rob.herring@calxeda.com> Cc: Russell King <linux@arm.linux.org.uk> Cc: Kukjin Kim <kgene.kim@samsung.com> Cc: Tony Lindgren <tony@atomide.com> Cc: Simon Horman <horms@verge.net.au> Cc: Magnus Damm <magnus.damm@gmail.com> Cc: Catalin Marinas <catalin.marinas@arm.com> Cc: Will Deacon <will.deacon@arm.com> Cc: John Stultz <john.stultz@linaro.org> Cc: Thomas Gleixner <tglx@linutronix.de> Cc: linux-samsung-soc@vger.kernel.org Cc: linux-omap@vger.kernel.org Cc: linux-sh@vger.kernel.org Acked-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
-
Arnd Bergmann authored
Originally from a default machine descriptor patch from Arnd, pull out just the default call to clocksource_of_init part. This is needed so that platforms can simply remove .init_time calls as they are converted to use clocksource_of_init. Signed-off-by: Arnd Bergmann <arnd@arndb.de> Acked-by: Nicolas Pitre <nico@linaro.org> Acked-by: Olof Johansson <olof@lixom.net> Signed-off-by: Rob Herring <rob.herring@calxeda.com>
-
Rob Herring authored
Only 32-bits of the arch timer were being used and wrapping was needlessly being done in s/w. By using the full counter (56-64 bits), we don't need to deal with wrapping and can simplify the implementation when using arch timer. Signed-off-by: Rob Herring <rob.herring@calxeda.com>
-
- 10 Apr, 2013 2 commits
-
-
Rob Herring authored
This converts sched_clock to simply a call to a function pointer in order to allow overriding it. This will allow for use with 64-bit counters where overflow handling is not needed. Signed-off-by: Rob Herring <rob.herring@calxeda.com>
-
Rob Herring authored
Allow multiple calls to setup_sched_clock and switch to the new counter if it is higher frequency. Signed-off-by: Rob Herring <rob.herring@calxeda.com>
-
- 09 Apr, 2013 6 commits
-
-
Arnd Bergmann authored
Merge tag 'mct-exynos-for-v3.10' of git://git.kernel.org/pub/scm/linux/kernel/git/kgene/linux-samsung into next/drivers From Kukjin Kim <kgene.kim@samsung.com>: add support exynos mct device tree and move into drivers/clocksource * tag 'mct-exynos-for-v3.10' of git://git.kernel.org/pub/scm/linux/kernel/git/kgene/linux-samsung: clocksource: mct: Add terminating entry for exynos_mct_ids table clocksource: mct: Add missing semicolons in exynos_mct.c ARM: EXYNOS: move mct driver to drivers/clocksource ARM: EXYNOS: remove static io-remapping of mct registers for Exynos5 ARM: dts: add mct device tree node for all supported Exynos SoC's ARM: EXYNOS: allow dt based discovery of mct controller using clocksource_of_init ARM: EXYNOS: add device tree support for MCT controller driver ARM: EXYNOS: prepare an array of MCT interrupt numbers and use it ARM: EXYNOS: add a register base address variable in mct controller driver Conflicts: drivers/clocksource/Makefile drivers/clocksource/exynos_mct.c [arnd: adapt to CLOCKSOURCE_OF_DECLARE interface change] Signed-off-by: Arnd Bergmann <arnd@arndb.de>
-
Arnd Bergmann authored
Merge tag 'irq-s3c24xx-for-v3.10' of git://git.kernel.org/pub/scm/linux/kernel/git/kgene/linux-samsung into next/drivers From Kukjin Kim <kgene.kim@samsung.com>: s3c24xx irq cleanup and move into drivers/irqchip * tag 'irq-s3c24xx-for-v3.10' of git://git.kernel.org/pub/scm/linux/kernel/git/kgene/linux-samsung: irqchip: s3c24xx: add devicetree support irqchip: s3c24xx: make interrupt handling independent of irq_domain structure irqchip: s3c24xx: globally keep track of the created intc instances irqchip: s3c24xx: add irq_set_type callback for basic interrupt types irqchip: s3c24xx: fix irqlist of second s3c2416 controller irqchip: s3c24xx: fix comments on some camera interrupts ARM: S3C24XX: move irq driver to drivers/irqchip ARM: S3C24XX: add handle_irq function ARM: S3C24XX: make s3c24xx_init_intc static ARM: S3C24XX: move s3c24xx_init_irq to s3c2410_init_irq ARM: S3C24XX: fix irq parent check ARM: S3C24XX: fix redundant checks in the irq mapping function Signed-off-by: Arnd Bergmann <arnd@arndb.de>
-
Arnd Bergmann authored
Merge tag 'ux500-pinctrl' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-stericsson into next/drivers From Linus Walleij <linus.walleij@linaro.org>: ux500 pinctrl updates for the ARM SoC tree. * tag 'ux500-pinctrl' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-stericsson: ARM: ux500: 8500: add ab8500-musb pinctrl support ARM: ux500: remove redundant DB8500_PIN_SLEEP definition ARM: ux500: Add Snowball pin configuration for user LED ARM: ux500: u8500: fix pinctrl IDLE state definition for SPI2 Signed-off-by: Arnd Bergmann <arnd@arndb.de>
-
Arnd Bergmann authored
Merge tag 'tegra-for-3.10-clk' of git://git.kernel.org/pub/scm/linux/kernel/git/swarren/linux-tegra into next/drivers From Stephen Warren <swarren@wwwdotorg.org>: ARM: tegra: clock driver development This branch contains most fixes and enhancements to the Tegra common clock driver. The main new feature is a driver for Tegra114, which coupled with later device tree changes enables many devices on that chip, such as MMC, I2C, etc. This branch depends on a patch in: git://git.linaro.org/people/mturquette/linux.git clk-for-3.10 Mike has stated that this branch is stable, and is aware of this dependency and merge. Mike's branch is based on v3.9-rc3, which includes a USB change which causes problems on Tegra. That problem was fixed in v3.9-rc4. Hence, this branch pulls in v3.9-rc4 to ensure bisectability as much as possible. This branch is based on v3.9-rc4, followed by a merge of previous Tegra "soc" pull request, followed by a merge of clk-for-3.10. * tag 'tegra-for-3.10-clk' of git://git.kernel.org/pub/scm/linux/kernel/git/swarren/linux-tegra: clk: tegra: fix enum tegra114_clk to match binding clk: tegra: Remove forced clk_enable of uartd ARM: dt: Add references to tegra_car clocks clk: tegra: devicetree match for nvidia,tegra114-car clk: tegra: Implement clocks for Tegra114 ARM: tegra: Define Tegra114 CAR binding clk: tegra: Workaround for Tegra114 MSENC problem clk: tegra: Add flags to tegra_clk_periph() clk: tegra: Add new fields and PLL types for Tegra114 clk: tegra: move from a lock bit idx to a lock mask clk: tegra: Add PLL post divider table clk: tegra: introduce TEGRA_PLL_HAS_LOCK_ENABLE clk: tegra: Add TEGRA_PLL_BYPASS flag clk: tegra: Refactor PLL programming code clk: tegra: provide dummy cpu car ops clk: tegra: defer application of init table clk: tegra: Fix cdev1 and cdev2 IDs clk: tegra: Make gr2d and gr3d clocks children of pll_c clk: tegra: Export peripheral reset functions clk: tegra: Fix periph_clk_to_bit macro Signed-off-by: Arnd Bergmann <arnd@arndb.de>
-
Arnd Bergmann authored
This is a snapshot of the stable clk branch at git://git.linaro.org/people/mturquette/linux.git clk-for-3.10 which is a dependency for the tegra clock changes. Signed-off-by: Arnd Bergmann <arnd@arndb.de>
-
Arnd Bergmann authored
This is a dependency for the tegra/clk branch. Signed-off-by: Arnd Bergmann <arnd@arndb.de> Conflicts: drivers/clocksource/tegra20_timer.c
-
- 08 Apr, 2013 6 commits
-
-
Arnd Bergmann authored
Merge tag 'omap-for-v3.10/gpmc-signed' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap into next/drivers From Tony Lindgren <tony@atomide.com>: GPMC updates from Jon Hunter <jon-hunter@ti.com>: Adds GPMC (General Purpose Memory Controller) DT support for NOR flash and Ethernet and includes various GPMC cleans-up and fixes. This series is dependent on commit 71856843 (ARM: OMAP: use consistent error checking) from RMK's clean-up branch and commit 31d9adca (ARM: OMAP2+: Fix broken gpmc support). * tag 'omap-for-v3.10/gpmc-signed' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap: (29 commits) ARM: OMAP2+: Add GPMC DT support for Ethernet child nodes ARM: OMAP2+: rename gpmc_probe_nor_child() to gpmc_probe_generic_child() ARM: OMAP2+: return -ENODEV if GPMC child device creation fails ARM: OMAP2+: Allow GPMC probe to complete even if CS mapping fails ARM: OMAP2+: Remove unnecesssary GPMC definitions and variable ARM: OMAP2+: Detect incorrectly aligned GPMC base address ARM: OMAP2+: Convert ONENAND to retrieve GPMC settings from DT ARM: OMAP2+: Convert NAND to retrieve GPMC settings from DT ARM: OMAP2+: Add device-tree support for NOR flash ARM: OMAP2+: Add additional GPMC timing parameters ARM: OMAP2+: Add function to read GPMC settings from device-tree ARM: OMAP2+: Don't configure of chip-select options in gpmc_cs_configure() ARM: OMAP2+: Convert TUSB to use gpmc_cs_program_settings() ARM: OMAP2+: Convert SMC91x to use gpmc_cs_program_settings() ARM: OMAP2+: Convert NAND to use gpmc_cs_program_settings() ARM: OMAP2+: Convert ONENAND to use gpmc_cs_program_settings() ARM: OMAP2+: Add function for configuring GPMC settings ARM: OMAP2+: Add structure for storing GPMC settings ARM: OMAP2+: Add variable to store number of GPMC waitpins ARM: OMAP2+: Simplify code configuring ONENAND devices ... Signed-off-by: Arnd Bergmann <arnd@arndb.de>
-
Arnd Bergmann authored
Merge tag 'omap-for-v3.10/timer-signed' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap into next/drivers From Tony Lindgren <tony@atomide.com>: Clean-up for omap2+ timers from Jon Hunter <jon-hunter@ti.com>: This series consists mainly of clean-ups for clockevents and clocksource timers on OMAP2+ devices. The most significant change in functionality comes from the 5th patch which is changing the selection of the clocksource timer for OMAP3 and AM335x devices when gptimers are used for clocksource. Note that this series depends on 71856843 (ARM: OMAP: use consistent error checking) in RMK's tree and 960cba67 (ARM: OMAP5: timer: Update the clocksource name as per clock data) in omap-for-v3.10/fixes-non-critical. So this branch is based on a merge of 71856843 and omap-for-v3.10/fixes-non-critical to avoid non-trivial merge conflicts. * tag 'omap-for-v3.10/timer-signed' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap: ARM: OMAP4+: Fix sparse warning in system timers ARM: OMAP2+: Store ID of system timers in timer structure ARM: OMAP3: Update clocksource timer selection ARM: OMAP2+: Simplify system timers definitions ARM: OMAP2+: Simplify system timer clock definitions ARM: OMAP2+: Remove hard-coded test on timer ID ARM: OMAP2+: Display correct system timer name ARM: OMAP2+: fix typo "CONFIG_BRIDGE_DVFS" ARM: OMAP1: remove "config MACH_OMAP_HTCWIZARD" ARM: OMAP: dpll: enable bypass clock only when attempting dpll bypass ARM: OMAP2+: powerdomain: avoid testing whether an unsigned char is less than 0 ARM: OMAP2+: hwmod: Remove unused _HWMOD_WAKEUP_ENABLED flag ARM: OMAP2+: am335x: Change the wdt1 func clk src to per_32k clk ARM: OMAP2+: AM33xx: hwmod: Add missing sysc definition to wdt1 entry Signed-off-by: Arnd Bergmann <arnd@arndb.de>
-
Arnd Bergmann authored
Merge tag 'omap-for-v3.10/usb-signed' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap into next/drivers From Tony Lindgren <tony@atomide.com>: EHCI platform data related changes for v3.10 merge window. These are needed for the USB PHY support, and are based on commit 1f0972f5 from Felipe Balbi's tree as agreed on the mailing lists. * tag 'omap-for-v3.10/usb-signed' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap: (21 commits) ARM: dts: omap3-beagle: Add USB Host support ARM: dts: OMAP3: Add HS USB Host IP nodes ARM: dts: OMAP4: Add HS USB Host IP nodes ARM: OMAP: zoom: Adapt to ehci-omap changes ARM: OMAP3: overo: Adapt to ehci-omap changes ARM: OMAP3: omap3touchbook: Adapt to ehci-omap changes ARM: OMAP3: omap3stalker: Adapt to ehci-omap changes ARM: OMAP3: omap3pandora: Adapt to ehci-omap changes ARM: OMAP3: omap3evm: Adapt to ehci-omap changes ARM: OMAP3: igep0020: Adapt to ehci-omap changes ARM: OMAP: devkit8000: Adapt to ehci-omap changes ARM: OMAP3: cm-t3517: Adapt to ehci-omap changes ARM: OMAP3: cm-t35: Adapt to ehci-omap changes ARM: OMAP: AM3517evm: Adapt to ehci-omap changes ARM: OMAP: AM3517crane: Adapt to ehci-omap changes ARM: OMAP3: 3630SDP: Adapt to ehci-omap changes ARM: OMAP3: 3430SDP: Adapt to ehci-omap changes ARM: OMAP3: Beagle: Adapt to ehci-omap changes ARM: OMAP2+: omap4panda: Adapt to ehci-omap changes ARM: OMAP2+: omap-usb-host: Add usbhs_init_phys() ... Signed-off-by: Arnd Bergmann <arnd@arndb.de>
-
git://git.xilinx.com/linux-xlnxArnd Bergmann authored
From Michal Simek <michal.simek@xilinx.com>: * 'zynq/clksrc/cleanup' of git://git.xilinx.com/linux-xlnx: arm: zynq: Move timer to generic location arm: zynq: Do not use xilinx specific function names arm: zynq: Move timer to clocksource interface arm: zynq: Use standard timer binding Signed-off-by: Arnd Bergmann <arnd@arndb.de>
-
git://server.prisktech.co.nz/git/linuxwmtArnd Bergmann authored
From Tony Prisk <linux@prisktech.co.nz>: arm: vt8500: Add pinctrl driver for arch-vt8500 This series adds support for the pinctrl/gpio module on all arch-vt8500 supported SoCs. As part of the review process, some tidy up is also done to drivers/of/base.c to remove some code that is being constantly duplicated. Also, a patch for the bcm2835 pinctrl driver is included to take advantage of the new of/base.c code. * tag 'vt8500/pinctrl' of git://server.prisktech.co.nz/git/linuxwmt: (606 commits) pinctrl: bcm2835: make use of of_property_read_u32_index() gpio: vt8500: Remove arch-vt8500 gpio driver arm: vt8500: Remove gpio devicetree nodes arm: dts: vt8500: Update Wondermedia SoC dtsi files for pinctrl driver pinctrl: gpio: vt8500: Add pincontrol driver for arch-vt8500 arm: vt8500: Increase available GPIOs on arch-vt8500 of: Remove duplicated code for validating property and value of: Add support for reading a u32 from a multi-value property. Signed-off-by: Arnd Bergmann <arnd@arndb.de>
-
Arnd Bergmann authored
Merge tag 'renesas-intc-external-irq2-for-v3.10' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas into next/drivers From Simon Horman <horms+renesas@verge.net.au>: Update for Renesas INTC External IRQ pin driver for v3.10 This adds support for shared interrupt lines to the Renesas INTC External IRQ pin driver which has already been queued up for v3.10 (tag renesas-intc-external-irq-for-v3.10). * tag 'renesas-intc-external-irq2-for-v3.10' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas: irqchip: intc-irqpin: Add support for shared interrupt lines Signed-off-by: Arnd Bergmann <arnd@arndb.de>
-
- 05 Apr, 2013 1 commit
-
-
Wei Yongjun authored
Remove duplicated include. Signed-off-by: Wei Yongjun <yongjun_wei@trendmicro.com.cn> Signed-off-by: Stephen Warren <swarren@nvidia.com>
-
- 04 Apr, 2013 9 commits
-
-
Stephen Warren authored
A gap exists in the binding's clock ID definitions. Fix the clock driver to be consistent. This allows pclk to be looked up through device tree and prevents: ERROR: could not get clock /pmc:pclk(0) Signed-off-by: Stephen Warren <swarren@nvidia.com>
-
Peter De Schrijver authored
The UART driver enables the console uart clock, so we don't need to do that anymore in this file. Signed-off-by: Peter De Schrijver <pdeschrijver@nvidia.com> Acked-by: Mike Turquette <mturquette@linaro.org> Signed-off-by: Stephen Warren <swarren@nvidia.com>
-
Peter De Schrijver authored
Add references to tegra_car clocks for the basic device nodes. Also remove the clock-frequency property of the serial node as the UART driver can now use the clock framework to obtain the frequency. Signed-off-by: Peter De Schrijver <pdeschrijver@nvidia.com> Acked-by: Mike Turquette <mturquette@linaro.org> Signed-off-by: Stephen Warren <swarren@nvidia.com>
-
Peter De Schrijver authored
Signed-off-by: Peter De Schrijver <pdeschrijver@nvidia.com> Acked-by: Mike Turquette <mturquette@linaro.org> Signed-off-by: Stephen Warren <swarren@nvidia.com>
-
Peter De Schrijver authored
Implement clocks for Tegra114. Signed-off-by: Peter De Schrijver <pdeschrijver@nvidia.com> Acked-by: Mike Turquette <mturquette@linaro.org> Signed-off-by: Stephen Warren <swarren@nvidia.com>
-
Peter De Schrijver authored
The device tree binding models Tegra114 CAR (Clock And Reset) as a single monolithic clock provider. Signed-off-by: Peter De Schrijver <pdeschrijver@nvidia.com> Acked-by: Mike Turquette <mturquette@linaro.org> Signed-off-by: Stephen Warren <swarren@nvidia.com>
-
Peter De Schrijver authored
Workaround a hardware bug in MSENC during clock enable. Signed-off-by: Peter De Schrijver <pdeschrijver@nvidia.com> Acked-by: Mike Turquette <mturquette@linaro.org> Signed-off-by: Stephen Warren <swarren@nvidia.com>
-
Peter De Schrijver authored
We will need some tegra peripheral clocks with the CLK_IGNORE_UNUSED flag, most notably mselect, which is a bridge between AXI and most peripherals. Signed-off-by: Peter De Schrijver <pdeschrijver@nvidia.com> Acked-by: Mike Turquette <mturquette@linaro.org> Signed-off-by: Stephen Warren <swarren@nvidia.com>
-
Peter De Schrijver authored
Tegra114 introduces new PLL types. This requires new clocktypes as well as some new fields in the pll structure. Signed-off-by: Peter De Schrijver <pdeschrijver@nvidia.com> Acked-by: Mike Turquette <mturquette@linaro.org> Signed-off-by: Stephen Warren <swarren@nvidia.com>
-