- 16 Oct, 2008 40 commits
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Yinghai Lu authored
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Yinghai Lu <yhlu.kernel@gmail.com> Signed-off-by:
Ingo Molnar <mingo@elte.hu>
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Yinghai Lu authored
except x2apic, detec_init_APIC, and calibrating_APIC_clock Signed-off-by:
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Yinghai Lu authored
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Yinghai Lu authored
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Yinghai Lu authored
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Cyrill Gorcunov authored
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Cyrill Gorcunov <gorcunov@gmail.com> Signed-off-by:
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Cyrill Gorcunov authored
All callers are __init or __cpuinit so there is no need to hold this code without CPU_HOTPLUG being set. Signed-off-by:
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Cyrill Gorcunov authored
- remove useless read of APIC_LVR - wrap with preempt_disable/enable - check for integrated APIC just in place v2: fix by Yinghai Lu. fix lapic_is_integrated using let 64-bit too have pic_mode Signed-off-by:
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Cyrill Gorcunov authored
Do not check for SPUTIOUS_APIC_VECTOR definition twice. Check it once - is what we need. Signed-off-by:
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Cyrill Gorcunov authored
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Cyrill Gorcunov authored
We don't really use it now on 64bit mode but could reserve it for future. Signed-off-by:
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Cyrill Gorcunov authored
There is no need to hold this code if CPU_HOTPLUG is not defined. Signed-off-by:
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Alok Kataria authored
Initialize vector_irq for the vmi used vector, to point to correct irq. Signed-off-by:
Alok N Kataria <akataria@vmware.com> Signed-off-by:
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Yinghai Lu authored
otherwise Xen is _completely_ unusable with 5 or more VCPUs. (when !CONFIG_HAVE_SPARSE_IRQ). based on Alex Nixon's patch. also add +1 offset after redir_entries Signed-off-by:
Jeremy Fitzhardinge <jeremy.fitzhardinge@citrix.com> Acked-by:
Alex Nixon <alex.nixon@citrix.com> Signed-off-by:
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Yinghai Lu authored
Missed two lines when copying. Fix panic on one of Ingo's machines that need to adjust ioapic id when acpi off/ 32bit. Signed-off-by:
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Yinghai Lu authored
Suresh Siddha noticed that we should have a spinlock around it. Signed-off-by:
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Suresh Siddha authored
In irq_2_iommu_alloc() and set_irte_irq(), irq_to_desc or irq_2_iommu pointers may not be allocated. So use the routines which will allocate them if they are not already allocated. Signed-off-by:
Suresh Siddha <suresh.b.siddha@intel.com> Signed-off-by:
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Ingo Molnar authored
fix warning: arch/x86/kernel/io_apic.c: In function ‘print_local_APIC’: arch/x86/kernel/io_apic.c:1786: warning: format ‘%08x’ expects type ‘unsigned int’, but argument 2 has type ‘u64’ arch/x86/kernel/io_apic.c:1787: warning: format ‘%08x’ expects type ‘unsigned int’, but argument 2 has type ‘u64’ By creating uniform behavior on 32-bit and 64-bit and printing out the ICR value in two 32-bit words. Code has changed: text data bss dec hex filename 22901 19650 17040 59591 e8c7 io_apic.o.before 22899 19650 17040 59589 e8c5 io_apic.o.after Due to the 32-bit cast narrowing the printed out value on 64-bit. Signed-off-by: -
Alex Nixon authored
Following commit 9c3f2468d8339866d9ef6a25aae31a8909c6be0d, do_IRQ() looks up the IRQ number in the per-cpu variable vector_irq. This commit makes Xen initialise an identity vector_irq map for both X86_32 and X86_64. Signed-off-by:
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Yinghai Lu authored
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Alex Nixon authored
When sparse IRQs are enabled, it is not safe to assume an IRQ descriptor exists for every possible IRQ. This patch causes init_evtchn_cpu_bindings to skip initialisation of IRQ descriptors which don't exist. Signed-off-by:
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Yinghai Lu authored
for !CONFIG_HAVE_SPARSE_IRQ fix: In file included from arch/x86/kernel/early-quirks.c:18: include/asm/io_apic.h: In function 'probe_nr_irqs': include/asm/io_apic.h:209: error: 'NR_IRQS' undeclared (first use in this function) include/asm/io_apic.h:209: error: (Each undeclared identifier is reported only once include/asm/io_apic.h:209: error: for each function it appears in.) v2: fix by Ingo Signed-off-by:
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Yinghai Lu authored
Ingo said sparse_irq is some intrusive. need to make it selectable to make it simple, remove irq_desc as parameter in some functions. (ack, eoi, set_affinity). may need to make member if irq_chip to take irq_desc, or struct irq later. Signed-off-by:
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Yinghai Lu authored
instead of print that of all APs at the time Signed-off-by:
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Yinghai Lu authored
no user now Signed-off-by:
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Yinghai Lu authored
use code in 64 to replace move_native_irq(irq, desc); in 32 bit Signed-off-by:
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Yinghai Lu authored
use MACRO for 32 bit too Signed-off-by:
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Yinghai Lu authored
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Yinghai Lu authored
we are using 28bit pci (bus/dev/fn + 12 bits) as irq number, so the cache for irq number should be 32 bit too. Signed-off-by:
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Yinghai Lu authored
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Yinghai Lu authored
The two files are now line by line equal. (sans a printk) Signed-off-by:
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Ingo Molnar authored
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Yinghai Lu authored
all the same except INTR_REMAPPING related and ioapic io resource. Signed-off-by:
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Yinghai Lu authored
no user left. Signed-off-by:
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Yinghai Lu authored
do we have 64bit system with sis chipset? [ mingo@elte.hu: nope, the problem chipset was 32-bit only. The code symmetry is good nevertheless. ] Signed-off-by: -
Yinghai Lu authored
also make no_timer_check to be global on 64 bit, because vmi_32 is using that. Signed-off-by:
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Ingo Molnar authored
-tip testing found this lockdep splat: [ 0.000000] Initializing CPU#0 [ 0.000000] found new irq_desc for irq 0 [ 0.000000] INFO: trying to register non-static key. [ 0.000000] the code is fine but needs lockdep annotation. [ 0.000000] turning off the locking correctness validator. [ 0.000000] Pid: 0, comm: swapper Not tainted 2.6.27-rc3-tip-00191-g98ccb89-dirty #1 [ 0.000000] [<c0153c22>] register_lock_class+0x3d2/0x400 [ 0.000000] [<c0104d87>] ? mcount_call+0x5/0xa [ 0.000000] [<c0154f3a>] __lock_acquire+0x22a/0x5d0 [ 0.000000] [<c0104d87>] ? mcount_call+0x5/0xa [ 0.000000] [<c0155351>] lock_acquire+0x71/0xa0 [ 0.000000] [<c016d61f>] ? set_irq_chip+0x3f/0x90 [ 0.000000] [<c070f148>] _spin_lock_irqsave+0x58/0x90 [ 0.000000] [<c016d61f>] ? set_irq_chip+0x3f/0x90 [ 0.000000] [<c016d61f>] set_irq_chip+0x3f/0x90 [ 0.000000] [<c016d7e0>] ? handle_level_irq+0x0/0xe0 [ 0.000000] [<c016da1a>] set_irq_chip_and_handler_name+0x1a/0x40 [ 0.000000] [<c0a396c1>] init_ISA_irqs+0x51/0xa0 [ 0.000000] [<c0a4a365>] pre_intr_init_hook+0x25/0x30 [ 0.000000] [<c0a39723>] native_init_IRQ+0x13/0x370 [ 0.000000] [<c015569c>] ? lock_release+0xcc/0x1d0 [ 0.000000] [<c0104d87>] ? mcount_call+0x5/0xa [ 0.000000] [<c070dc22>] ? __mutex_unlock_slowpath+0x92/0x110 [ 0.000000] [<c070dcad>] ? mutex_unlock+0xd/0x10 [ 0.000000] [<c0135f62>] ? cpu_maps_update_done+0x12/0x20 [ 0.000000] [<c06c6743>] ? register_cpu_notifier+0x23/0x30 [ 0.000000] [<c011e8ae>] init_IRQ+0xe/0x10 [ 0.000000] [<c0a357a5>] start_kernel+0x1c5/0x340 [ 0.000000] [<c0a35280>] ? unknown_bootoption+0x0/0x210 [ 0.000000] [<c0a3506b>] i386_start_kernel+0x6b/0x80 [ 0.000000] ======================= [ 0.000000] found new irq_desc for irq 1 [ 0.000000] found new irq_desc for irq 2 [ 0.000000] found new irq_desc for irq 3 this: static void init_one_irq_desc(struct irq_desc *desc) { memcpy(desc, &irq_desc_init, sizeof(struct irq_desc)); #ifdef CONFIG_TRACE_IRQFLAGS lockdep_set_class(&desc->lock, &irq_desc_lock_class); #endif } should be unconditional. Signed-off-by: -
Yinghai Lu authored
move first_system_vector to apic_64.c. also add #ifdef CONFIG_INTR_REMAP to prepare 32 bit to use same file. Signed-off-by:
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Yinghai Lu authored
try to make functions have the same order between 32-bit and 64-bit. Signed-off-by:
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Yinghai Lu authored
prepare for unification: try to make functions be of the same order to io_apic_64.c. v2: add calling setup_msi_irq back to arch_setup_msi_irq Signed-off-by:
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