- 06 Oct, 2010 18 commits
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Jason Wessel authored
When changing VTs non-atomically the kernel works in conjunction with the Xserver in user space and receives the LUT information from the Xserver via a system call. When changing modes atomically for kdb, this information must be saved and restored without disturbing user space as if nothing ever happened. Signed-off-by:
Jason Wessel <jason.wessel@windriver.com> CC: Jesse Barnes <jbarnes@virtuousgeek.org> CC: David Airlie <airlied@linux.ie> CC: dri-devel@lists.freedesktop.org Signed-off-by:
Dave Airlie <airlied@redhat.com>
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Jason Wessel authored
Some devices such as the radeon chips receive information from user space which needs to be saved when executing an atomic mode set operation, else the user space would have to be queried again for the information. This patch extends the mode_set_base_atomic() call to pass an argument to indicate if this is an entry or an exit from an atomic kernel mode set change. Individual drm drivers can properly save and restore state accordingly. Signed-off-by:
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Chris Ball authored
Tested on nv50 and nv04 HW. Signed-off-by:
Chris Ball <cjb@laptop.org> Signed-off-by:
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Chris Ball authored
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Dave Airlie authored
* drm-vmware-next: drm/vmwgfx: Bump minor and driver date drm/vmwgfx: Save at least one screen layout drm/vmwgfx: Add modinfo version drm/vmwgfx: Add a parameter to get the max fb size drm/vmwgfx: Don't flush fb if we're in the suspended state. drm/vmwgfx: Prune modes based on available VRAM size drm/vmwgfx: Take the ttm lock around the dirty ioctl drm: vmwgfx: Add a struct drm_file parameter to the dirty framebuffer callback drm/vmwgfx: Add new-style PM hooks to improve hibernation behavior drm/vmwgfx: Fix ACPI S3 & S4 functionality. drm/vmwgfx: Really support other depths than 32
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Thomas Hellstrom authored
Signed-off-by:
Thomas Hellstrom <thellstrom@vmware.com> Signed-off-by:
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Thomas Hellstrom authored
Save at least one screen layout during vga save to avoid odd things happening during restore. Signed-off-by:
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Thomas Hellstrom authored
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Thomas Hellstrom authored
This can be used by the X server to restrict mode resolutions and size of root pixmap. Bump minor to announce this availability. Bump driver date. Signed-off-by:
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Thomas Hellstrom authored
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Thomas Hellstrom authored
This needs to be reviewed once we support screen objects and don't rely on VRAM for the frame-buffer. Also fix some integer overflow issues pointed out by Michel Daenzer. Signed-off-by:
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Thomas Hellstrom authored
This makes sure noone accesses the fifo while it's taken down using the dirty ioctl. Also make sure all workqueues are idled before the fifo is taken down. Signed-off-by:
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Thomas Hellstrom authored
This is needed for the callback to identify the caller and take appropriate locks if needed. Signed-off-by:
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Thomas Hellstrom authored
Add the new-style PM hooks prepare and complete. This allows us to power up the device again after the hibernation image has been created, and display output will thus be active until the VM is finally powered off. Signed-off-by:
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Thomas Hellstrom authored
Don't suspend or hibernate when there are 3D resources active since we can't restore the device's 3D state. Instead fail with an error message. In other cases, make sure we re-enable the fifo and unlock ttm on resume. Signed-off-by:
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Thomas Hellstrom authored
Also add some sanity checks. Signed-off-by:
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Dave Airlie authored
necessary for some of the vmware fixes to be pushed in. Conflicts: drivers/gpu/drm/drm_gem.c drivers/gpu/drm/i915/intel_fb.c include/drm/drmP.h
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Dave Airlie authored
* 'intel/drm-intel-next' of ../drm-next: (266 commits) drm/i915: Avoid circular locking from intel_fbdev_fini() drm/i915: mark display port DPMS state as 'ON' when enabling output drm/i915: Skip pread/pwrite if size to copy is 0. drm/i915: avoid struct mutex output_poll mutex lock loop on unload drm/i915: Rephrase pwrite bounds checking to avoid any potential overflow drm/i915: Sanity check pread/pwrite drm/i915: Use pipe state to tell when pipe is off drm/i915: vblank status not valid while training display port drivers/gpu/drm/i915/i915_gem.c: Add missing error handling code drm/i915: Don't mask the return code whilst relocating. drm/i915: If the GPU hangs twice within 5 seconds, declare it wedged. drm/i915: Only print 'generating error event' if we actually are drm/i915: Try to reset gen2 devices. drm/i915: Clear fence registers on GPU reset drm/i915: Force the domain to CPU on unbinding whilst wedged. drm: Move the GTT accounting to i915 drm/i915: Fix refleak during eviction. i915: Added function to initialize VBT settings drm/i915: Remove redundant deletion of obj->gpu_write_list drm/i915: Make get/put pages static ...
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- 04 Oct, 2010 5 commits
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Chris Wilson authored
lockdep spots that the fb_info->lock takes the dev->struct_mutex during init (due to the device probing) and so we can not hold dev->struct_mutex when unregistering the framebuffer. Simply reverse the order of initialisation during cleanup and so do the intel_fbdev_fini() before the intel_modeset_cleanup. Signed-off-by:Chris Wilson <chris@chris-wilson.co.uk>
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Keith Packard authored
The display port DPMS state is tracked internally in the display port driver so that when a hotplug event comes along, the driver can know whether to try retraining the link. This doesn't work well if the driver never sets the DPMS state to ON when the output is enabled. Signed-off-by:
Keith Packard <keithp@keithp.com> Signed-off-by:
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Chris Wilson authored
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Chris Wilson authored
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Keith Packard authored
Cancel the output polling work proc before acquiring the struct mutex to avoid acquiring the work proc mutex with the struct mutex held. This avoids inverting the lock order seen when the work proc runs. Signed-off-by:
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- 03 Oct, 2010 5 commits
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Chris Wilson authored
... and do the same for pread. Signed-off-by: -
Chris Wilson authored
Move the access control up from the fast paths, which are no longer universally taken first, up into the caller. This then duplicates some sanity checking along the slow paths, but is much simpler. Tracked as CVE-2010-2962. Reported-by:
Kees Cook <kees@ubuntu.com> Signed-off-by:
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Chris Wilson authored
Conflicts: drivers/gpu/drm/i915/i915_gem_evict.c drivers/gpu/drm/i915/intel_display.c drivers/gpu/drm/i915/intel_dp.c
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Keith Packard authored
Instead of waiting for the display line value to settle, we can simply wait for the pipe configuration register 'state' bit to turn off. Contrarywise, disabling the plane will not cause the display line value to stop changing, so instead we wait for the vblank interrupt bit to get set. And, we only do this when we're not about to wait for the pipe to turn off. Signed-off-by:
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Keith Packard authored
While the display port is in training mode, vblank interrupts don't occur. Because we have to wait for the display port output to turn on before starting the training sequence, enable the output in 'normal' mode so that we can tell when a vblank has occurred, then start the training sequence. Signed-off-by:
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- 02 Oct, 2010 2 commits
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Julia Lawall authored
Extend the error handling code with operations found in other nearby error handling code A simplified version of the sematic match that finds this problem is as follows: (http://coccinelle.lip6.fr/) // <smpl> @r exists@ @r@ statement S1,S2,S3; constant C1,C2,C3; @@ *if (...) {... S1 return -C1;} ... *if (...) {... when != S1 return -C2;} ... *if (...) {... S1 return -C3;} // </smpl> Signed-off-by:
Julia Lawall <julia@diku.dk> Signed-off-by:
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Chris Wilson authored
The return from move_to_gtt_domain() may indicate a pending signal which needs to handled as opposed to an actual error, for instance, so report the original return value rather than forcing an EINVAL. Signed-off-by:
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- 01 Oct, 2010 10 commits
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Chris Wilson authored
The issue is that we may become stuck executing a long running shader and continually attempt to reset the GPU. (Or maybe we tickle some bug and need to break the vicious cycle.) So if we are detect a second hang within 5 seconds, give up trying to programme the GPU and report it wedged. Signed-off-by: -
Chris Wilson authored
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Chris Wilson authored
So far only found registers for i830, i845, i865 and one of those has no effect on i865! At this moment in time, attempting to reset i8xx is a little optimistic... Signed-off-by: -
Chris Wilson authored
When the GPU is reset, the fence registers are invalidated, so release the objects and clear them out. Signed-off-by: -
Chris Wilson authored
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=30083Reported-by:
Sitsofe Wheeler <sitsofe@yahoo.com> Signed-off-by:
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Chris Wilson authored
Only drm/i915 does the bookkeeping that makes the information useful, and the information maintained is driver specific, so move it out of the core and into its single user. Signed-off-by: -
Thomas Hellstrom authored
If the soon-to-be scanout buffer is partly covering the intended VRAM region, move and pin will fail. In that case, just move it out to system before attempting to move it in again. Signed-off-by:
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Thomas Hellstrom authored
The removed code causes oopses with newer drms on master drop. Signed-off-by:
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Thomas Hellstrom authored
This is to avoid accessing uninitialized data during drm_irq_uninstall and vblank ioctls. At the same time, enable error check from drm_kms_init which previously appeared to ignore all errors. Signed-off-by:
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Thomas Hellstrom authored
We add an option not to enable fbdev, this option is off (0) by default. Not enabling fbdev at load time makes it possible to co-operate with vga16fb and vga text mode when VT switching. However, if 3D resources are active when VT switching, we're currently not able to switch over to vga, due to device limitations. This fixes a bug where we previously lost 3D state during VT switch. Signed-off-by:
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