- 06 Aug, 2018 2 commits
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Alexandru Gheorghe authored
A new helper function(__drm_atomic_helper_plane_reset) has been added for linking a plane with its state and resetting the core properties(alpha, rotation, etc.) to their default values. Use that instead of duplicating the logic. Reviewed-by:
Ayan Kumar halder <ayan.halder@arm.com> Acked-by:
Liviu Dudau <liviu.dudau@arm.com> Signed-off-by:
Alexandru Gheorghe <alexandru-cosmin.gheorghe@arm.com> Link: https://patchwork.freedesktop.org/patch/msgid/20180804161530.12275-4-alexandru-cosmin.gheorghe@arm.com
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Alexandru Gheorghe authored
There are a lot of drivers that subclass drm_plane_state, all of them duplicate the code that links together the plane with plane_state. On top of that, drivers that enable core properties also have to duplicate the code for initializing the properties to their default values, which in all cases are the same as the defaults from core. Change since v1: - Make it consistent with the other helpers and require that both plane and state not be NULL, suggested by Boris Brezillon and Philipp Zabel. Reviewed-by:
Laurent Pinchart <laurent.pinchart@ideasonboard.com> Signed-off-by:
Philipp Zabel <p.zabel@pengutronix.de> Link: https://patchwork.freedesktop.org/patch/msgid/20180804161530.12275-2-alexandru-cosmin.gheorghe@arm.com
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- 03 Aug, 2018 3 commits
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Haneen Mohammed authored
Release pages_lock before return when vkms_obj->vaddr is NULL. This patch fixes: 6c234fe3 ("drm/vkms: Implement CRC debugfs API"). Signed-off-by:
Haneen Mohammed <hamohammed.sa@gmail.com> Signed-off-by:
Sean Paul <seanpaul@chromium.org> Link: https://patchwork.freedesktop.org/patch/msgid/20180803201142.GA2206@haneenDRM
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Haneen Mohammed authored
This patch implement the necessary functions to compute and add CRCs entries: - Implement the set_crc_source() callback. - Compute CRC using crc32 on the visible part of the framebuffer. - Use ordered workqueue per output to compute and add CRC at the end of a vblank. - Use appropriate synchronization methods since the CRC computation must be atomic wrt the generated vblank event for a given atomic update, by using spinlock across atomic_begin/atomic_flush to wrap the event handling code completely and match the flip event with the CRC. Since vkms_crc_work_handle() can sleep, spinlock can't be acquired while accessing vkms_output->primary_crc to compute CRC. To make sure the data is updated and released without conflict with the vkms_crc_work_handle(), the work_struct is flushed @crtc_destroy and the data is updated before scheduling the work handle again, as follow: * CRC data update: 1- store vkms_crc_data {fb, src} per plane_state 2- @plane_duplicate_state -> allocate vkms_crc_data 3- during atomic commit (@atomic_update) -> a) copy {fb, src} to plane_state->crc_data b) get reference to fb, 3- @plane_destroy_state -> a) if (fb refcount) remove reference to fb b) deallocate crc_data * Atomic Commit: 1- vkms_plane_atomic_check 2- vkms_prepare_fb -> vmap vkms_gem_obj->vaddr 3- atomic_begin -> hold crc spinlock 4- atomic_plane_update -> a) update vkms_output->primary_crc b) get reference to fb 5- atomic_flush -> a) send vblank event while holding event_lock b) release crc spinlock * hrtimer regular callback: 1- hold crc spinlock 2- drm_crtc_handle_vblank() 3- queue vkms_crc_work_handle 4- release crc spinlock * cleanup: 1- @cleanup_fb ->vunmap vkms_gem_obj->vaddr 2- @crtc_destroy -> flush work struct 3- @plane_destroy -> a) if (fb refcount) remove reference to fb b) deallocate crc_data Signed-off-by: -
Haneen Mohammed authored
Subclass plane state struct to enable storing driver's private state. This patch only adds the base drm_plane_state struct and the atomic functions that handle it. Signed-off-by:
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- 02 Aug, 2018 2 commits
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Sandy Huang authored
PX30 have vop big and vop lite, just like rk3036 and rk3126 the max input and output resolution is 1920x1080, the main difference between the two vop is: vop big: win0 support yuv and rgb format; win1 and win2 support rgb format; vop lit: win1 support rgb format; Signed-off-by:Sandy Huang <hjc@rock-chips.com> Signed-off-by:
Heiko Stuebner <heiko@sntech.de> Link: https://patchwork.freedesktop.org/patch/msgid/1530003215-46593-3-git-send-email-hjc@rock-chips.com
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Sandy Huang authored
Add the compatible values for the px30 display controllers. Signed-off-by:
Rob Herring <robh@kernel.org> [added commit message] Signed-off-by:
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- 01 Aug, 2018 2 commits
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Paulo Zanoni authored
"(an unmatched left parenthesis creates an unresolved tension that will stay with you all day." -- Randall Munroe Signed-off-by:Paulo Zanoni <paulo.r.zanoni@intel.com> Reviewed-by:
Alex Deucher <alexander.deucher@amd.com> Signed-off-by:
Rodrigo Vivi <rodrigo.vivi@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20180727203331.27778-1-paulo.r.zanoni@intel.com
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Souptick Joarder authored
convert drm_atomic_helper_suspend/resume() to use drm_mode_config_helper_suspend/resume(). With this conversion, rockchip_drm_fb_resume() and rockchip_drm_fb_suspend() will not be used anymore. Both of these functions can be removed. Also, in struct rockchip_drm_private state will not be used anymore. So this can be removed forever. Signed-off-by:
Souptick Joarder <jrdr.linux@gmail.com> Co-Developed-by:
Ajit Negi <ajitn.linux@gmail.com> [changed to Co-Developed-by, according to process/submitting-patches.rst] Signed-off-by:
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- 31 Jul, 2018 1 commit
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Sean Paul authored
This function name was changed to drm_connector_attach_encoder(). Unfortunately this driver was posted on the list before that change, and applied after Fixes: a095f15c ("drm/bridge: add support for sn65dsi86 bridge driver") Cc: Sandeep Panda <spanda@codeaurora.org> Cc: Andrzej Hajda <a.hajda@samsung.com> Cc: Archit Taneja <architt@codeaurora.org> Cc: Laurent Pinchart <Laurent.pinchart@ideasonboard.com> Reviewed-by:
Sandeep Panda <spanda@codeaurora.org> Signed-off-by:
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- 30 Jul, 2018 6 commits
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Souptick Joarder authored
Use new return type vm_fault_t for fault handler. Signed-off-by:
Gustavo Padovan <gustavo.padovan@collabora.com> Link: https://patchwork.freedesktop.org/patch/msgid/20180726144549.GA9434@jordon-HP-15-Notebook-PC
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Andrzej Hajda authored
Recently drm_mode_connector_attach_encoder changed it's name. The change was not noticed by bridge author, as a result gcc reports compile error on next branch. Fixes: f38b7cca ("drm/bridge: tc358764: Add DSI to LVDS bridge driver") Reported-by:
kbuild test robot <lkp@intel.com> Signed-off-by:
Andrzej Hajda <a.hajda@samsung.com> Signed-off-by:
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Haneen Mohammed authored
Subclass CRTC state struct to enable storing driver's private state. This patch only adds the base drm_crtc_state struct and the atomic functions that handle it. Signed-off-by:
Daniel Vetter <daniel.vetter@ffwll.ch> Reviewed-by:
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Haneen Mohammed authored
Call atomic_helper_check_plane_state to clip plane coordinates. Signed-off-by:
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Haneen Mohammed authored
This patch map/unmap GEM backing memory to kernel address space in prepare/cleanup_fb respectively and cache the virtual address for later use. Signed-off-by:
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Haneen Mohammed authored
This patch add the necessary functions to map/unmap GEM backing memory to the kernel's virtual address space. Signed-off-by:
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- 27 Jul, 2018 5 commits
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Masahiro Yamada authored
Please do not comment out unneeded code. Remove. Signed-off-by:
Masahiro Yamada <yamada.masahiro@socionext.com> Reviewed-by:
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Andrzej Hajda authored
Add a drm_bridge driver for the Toshiba TC358764 DSI to LVDS bridge. Changes in v4: - removed license blob, - ordered includes, - added error handling, - fixed reset GPIO handling, - added missing calls to the panel, - custom OF graph code replaced with helpers, - removed tc358764_poweroff from remove callback. v5: - fixed supply names, - fixed broken console - added connector to fb_helper, - added detach callback - unbinding works, - fixed typo in error checking code, - removed sparse bridge->encoder check - core does it already. Signed-off-by:
Maciej Purski <m.purski@samsung.com> [ a.hajda@samsung.com: v4, v5 ] Signed-off-by:
Archit Taneja <architt@codeaurora.org> Link: https://patchwork.freedesktop.org/patch/msgid/20180725154644.25412-6-a.hajda@samsung.com
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Andrzej Hajda authored
The patch adds bindings to Toshiba DSI/LVDS bridge TC358764. Bindings describe power supplies, reset gpio and video interfaces. Signed-off-by:
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Sandeep Panda authored
Add support for TI's sn65dsi86 dsi2edp bridge chip. The chip converts DSI transmitted signal to eDP signal, which is fed to the connected eDP panel. This chip can be controlled via either i2c interface or dsi interface. Currently in driver all the control registers are being accessed through i2c interface only. Also as of now HPD support has not been added to bridge chip driver. Changes in v1: - Split the dt-bindings and the driver support into separate patches (Andrzej Hajda). - Use of gpiod APIs to parse and configure gpios instead of obsolete ones (Andrzej Hajda). - Use macros to define the register offsets (Andrzej Hajda). Changes in v2: - Separate out edp panel specific HW resource handling from bridge driver and create a separate edp panel drivers to handle panel specific mode information and HW resources (Sean Paul). - Replace pr_* APIs to DRM_* APIs to log error or debug information (Sean Paul). - Remove some of the unnecessary structure/variable from driver (Sean Paul). - Rename the function and structure prefix "sn65dsi86" to "ti_sn_bridge" (Sean Paul / Rob Herring). - Remove most of the hard-coding and modified the bridge init sequence based on current mode (Sean Paul). - Remove the existing function to retrieve the EDID data and implemented this as an i2c_adapter and use drm_get_edid() (Sean Paul). - Remove the dummy irq handler implementation, will add back the proper irq handling later (Sean Paul). - Capture the required enable gpios in a single array based on dt entry instead of having individual descriptor for each gpio (Sean Paul). Changes in v3: - Remove usage of irq_gpio and replace it as "interrupts" property (Rob Herring). - Remove the unnecessary header file inclusions (Sean Paul). - Rearrange the header files in alphabetical order (Sean Paul). - Use regmap interface to perform i2c transactions. - Update Copyright/License field and address other review comments (Jordan Crouse). Changes in v4: - Update License/Copyright (Sean Paul). - Add Kconfig and Makefile changes (Sean Paul). - Drop i2c gpio handling from this bridge driver, since i2c sda/scl gpios will be handled by i2c master. - Update required supplies names. - Remove unnecessary goto statements (Sean Paul). - Add mutex lock to power_ctrl API to avoid race conditions (Sean Paul). - Add support to parse reference clk frequency from dt(optional). - Update the bridge chip enable/disable sequence. Changes in v5: - Fixed Kbuild test service reported warnings. Changes in v6: - Use PM runtime based ref-counting instead of local ref_count mechanism (Stephen Boyd). - Clean up some debug logs and indentations (Sean Paul). - Simplify dp rate calculation (Sean Paul). - Add support to configure refclk based on input REFCLK pin or DACP/N pin (Stephen Boyd). Changes in v7: - Use static supply entries instead of dynamic allocation (Andrzej Hajda). - Defer bridge driver probe if panel is not probed (Andrzej Hajda). - Update of_graph APIs for correct node reference management. (Andrzej Hajda). - Remove local display_mode object (Andrzej Hajda). - Remove version id check function from driver. Changes in v8: - Move dsi register/attach function to bridge driver probe (Andrzej Hajda). - Introduce a new helper function to write 16bit words into consecutive registers (Andrzej Hajda). - Remove unnecessary macros (Andrzej Hajda). Changes in v9: - Remove dsi register/attach from bridge probe, since dsi dev register completion also waits for any panel or bridge to get added. This creates deadlock situation when bridge driver calls dsi dev register and attach before bridge add, in its probe function. - Fix issues faced during testing of bridge driver on actual HW. - Remove unnecessary initializations (Stephen Boyd). - Use local refclk lut size instead of global macro (Sean Paul). Changes in v10: - Use refclk to determine if continuous dsi clock is needed or not. Changes in v11: - Read DPPLL_SRC register to determine continuous clock instead of using refclk handle (Stephen Boyd). Changes in v12: - Explain in comment as in why dsi dev registration is done in bridge_attach (Andrzej Hajda). - Move HPD disable to bridge_pre_enable (Andrzej Hajda). - Make panel/DDC exclusive until HPD support is added (Andrzej Hajda). Changes in v13: - eDP panels report EDID via DP-AUX channel, so remove support for dedicated DDC line (Andrzej Hajda). Changes in v14: - Remove unnecessary drm_panel checks (Andrzej Hajda). Signed-off-by:
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Sandeep Panda authored
Document the bindings used for the sn65dsi86 DSI to eDP bridge. Changes in v1: - Rephrase the dt-binding descriptions to be more inline with existing bindings (Andrzej Hajda). - Add missing dt-binding that are parsed by corresponding driver (Andrzej Hajda). Changes in v2: - Remove edp panel specific dt-binding entries. Only keep bridge specific entries (Sean Paul). - Remove custom-modes dt entry since its usage is removed from driver also (Sean Paul). - Remove is-pluggable dt entry since this will not be needed anymore (Sean Paul). Changes in v3: - Remove irq-gpio dt entry and instead populate is an interrupt property (Rob Herring). Changes in v4: - Add link to bridge chip datasheet (Stephen Boyd) - Add vpll and vcc regulator supply bindings (Stephen Boyd) - Add ref clk optional dt binding (Stephen Boyd) - Add gpio-controller optional dt binding (Stephen Boyd) Changes in v5: - Use clock property to specify the input refclk (Stephen Boyd). - Update gpio cell and pwm cell numbers (Stephen Boyd). Changes in v6: - Add property to mention the lane mapping scheme and polarity inversion (Stephen Boyd). Changes in v7: - Detail description of lane mapping scheme dt property (Andrzej Hajda/ Rob Herring). - Removed HDP gpio binding, since the bridge uses IRQ signal to determine HPD, and IRQ property is already documented in binding. Changes in v8: - Removed unnecessary explanation of lane mapping and polarity dt property, since these are already explained in media/video-interface dt binidng (Rob Herring). Changes in v9: - Avoid putting re-definition of lane mapping and polarity dt binding (Rob Herring). Changes in v10: - Use interrupts-extended property instead of interrupts to specify interrupt line (Andrzej Hajda). - Move data-lanes and lane-polarity property example to proper place (Andrzej Hajda). Changes in v11: - Add a property for suspend gpio function of GPIO1 pin on bridge chip (Stephen Boyd). Changes in v12: - Remove binding for dedicated DDC line (Andrzej Hajda). Signed-off-by:
Stephen Boyd <swboyd@chromium.org> Signed-off-by:
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- 25 Jul, 2018 2 commits
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Archit Taneja authored
Add binding info for peripherals that support dual-channel DSI. Add corresponding optional bindings for DSI host controllers that may be configured in this mode. Add an example of an I2C controlled device operating in dual-channel DSI mode. Reviewed-by:
Philippe Cornu <philippe.cornu@st.com> Reviewed-by:
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Archit Taneja authored
Add a section that describes dt-bindings for peripherals that support MIPI DSI, but have a different bus as the primary control bus, or no control bus at all. Add an example for a peripheral with a non-DSI control bus. Reviewed-by:
Boris Brezillon <boris.brezillon@free-electrons.com> Reviewed-by:
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- 24 Jul, 2018 3 commits
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Jernej Skrabec authored
R40 TV TCON is basically the same as on A83T. However, it needs special handling, because it has to set up TCON TOP muxes at runtime. Reviewed-by:
Chen-Yu Tsai <wens@csie.org> Signed-off-by:
Jernej Skrabec <jernej.skrabec@siol.net> Signed-off-by:
Maxime Ripard <maxime.ripard@bootlin.com> Link: https://patchwork.freedesktop.org/patch/msgid/20180710203511.18454-14-jernej.skrabec@siol.net
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Jernej Skrabec authored
Till now, new way of matching engines with TCONs was reading their respective ids and match them by those ids. However, with introduction of TCON TOP, that might not be so straightforward anymore. - there might be more TCONs that engines (mixers) - TCON ids might have non-consecutive ids Workaround that by matching mixer id with TCON index from TCON list. For example, R40 has 2 mixers and 4 TCONs. Board designer can choose 2 outputs, which are connected to any of those 4 TCONs. As long as there are only 2 TCONs enabled in DT, using index in list as alternative id, will allow to match them with mixer 0 and 1. Reviewed-by:
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Ayan Kumar Halder authored
drm/sun4i: Use (struct drm_format_info) fields to determine if a format is yuv and multi planar or not. We do not need sun4i_backend_format_is_packed_yuv422() / sun4i_backend_format_is_planar_yuv() to determine if the format is yuv multi planar or not. (struct drm_format_info *)->is_yuv tells if the format is yuv or not. And (struct drm_format_info *)->num_planes denotes the number of planes. This issue was identified during a review on a previous patch:- https://lists.freedesktop.org/archives/dri-devel/2018-July/183840.htmlSigned-off-by:
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- 23 Jul, 2018 2 commits
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Thomas Zimmermann authored
This patch unifies the naming of DRM functions for reference counting of struct drm_device. The resulting code is more aligned with the rest of the Linux kernel interfaces. Signed-off-by:
Thomas Zimmermann <tzimmermann@suse.de> Signed-off-by:
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Oleksandr Andrushchenko authored
Dan Carpenter has reported that there is the following static checker warning: drivers/gpu/drm/drm_prime.c:317 drm_gem_map_dma_buf() warn: 'sgt' can also be NULL 314 sgt = obj->dev->driver->gem_prime_get_sg_table(obj); 315 316 if (!IS_ERR(sgt)) { 317 if (!dma_map_sg_attrs(attach->dev, sgt->sgl, sgt->nents, dir, Problematic functions are xen_drm_front_gem_get_sg_table and drm_gem_cma_prime_get_sg_table. Fix those by replacing NULL with error value. Signed-off-by:Oleksandr Andrushchenko <oleksandr_andrushchenko@epam.com> Reported-by:
Dan Carpenter <dan.carpenter@oracle.com> Reviewed-by:
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- 19 Jul, 2018 4 commits
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Lyude Paul authored
This isn't supposed to take dev as an argument, I guess no one noticed! Signed-off-by:
Lyude Paul <lyude@redhat.com> Reviewed-by:
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Paul Kocialkowski authored
Not all sunxi platforms with the first version of the Display Engine support an alpha component on the plane with the lowest z position (as in: lowest z-pos), that gets blended with the background color. In particular, the A13 is known to have this limitation. However, it was recently discovered that the A20 and A33 are capable of having alpha on their lowest plane. Thus, this introduces a specific quirk to indicate such support, per-platform. Since this was not tested on sun4i and sun6i platforms, a conservative approach is kept and this feature is not supported. Signed-off-by:
Paul Kocialkowski <paul.kocialkowski@bootlin.com> Signed-off-by:
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Paul Kocialkowski authored
In prevision for introducing a new quirk that will be used at atomic plane check time, register the quirks structure with the backend structure. This way, it can easily be grabbed where needed. Signed-off-by:
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Giulio Benetti authored
Handle both positive and negative dclk polarity, according to bus_flags, taking care of this: On A20 and similar SoCs, the only way to achieve Positive Edge (Rising Edge), is setting dclk clock phase to 2/3(240°). By default TCON works in Negative Edge(Falling Edge), this is why phase is set to 0 in that case. Unfortunately there's no way to logically invert dclk through IO_POL register. The only acceptable way to work, triple checked with scope, is using clock phase set to 0° for Negative Edge and set to 240° for Positive Edge. On A33 and similar SoCs there would be a 90° phase option, but it divides also dclk by 2. This patch is a way to avoid quirks all around TCON and DOTCLOCK drivers for using A33 90° phase divided by 2 and consequently increase code complexity. Check if panel is used. TCON can also handle VGA DAC, then panel could be empty. Signed-off-by:
Giulio Benetti <giulio.benetti@micronovasrl.com> Signed-off-by:
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- 18 Jul, 2018 4 commits
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Ayan Kumar Halder authored
drm_format_info table has a field 'is_yuv' to denote if the format is yuv or not. The driver is expected to use this instead of having a function for the same purpose. Signed-off-by:
Ville Syrjala <ville.syrjala@linux.intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/1531847626-22248-5-git-send-email-ayan.halder@arm.com
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Ayan Kumar Halder authored
drm_format_info table has a field 'is_yuv' to denote if the format is yuv or not. The driver is expected to use this instead of having a function for the same purpose. Signed-off-by:
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Ayan Kumar Halder authored
drm_format_info table has a field 'is_yuv' to denote if the format is yuv or not. The driver is expected to use this instead of having a function for the same purpose. Signed-off-by:
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Ayan Kumar Halder authored
A lot of drivers duplicate the function to check if a format is yuv or not. If we add a field (to denote whether the format is yuv or not) in the drm_format_info table, all the drivers can use this field and it will prevent duplication of similar logic. Signed-off-by:
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- 17 Jul, 2018 4 commits
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Gustavo A. R. Silva authored
Add suffix ULL to constant 1000 in order to give the compiler complete information about the proper arithmetic to use. Notice that such constant is used in a context that expects an expression of type u64 (64 bits, unsigned) and the following expression is currently being evaluated using 32-bit arithmetic: mode->clock * 1000 Addresses-Coverity-ID: 1466139 ("Unintentional integer overflow") Signed-off-by:Gustavo A. R. Silva <gustavo@embeddedor.com> Signed-off-by:
Eric Anholt <eric@anholt.net> Link: https://patchwork.freedesktop.org/patch/msgid/20180704142255.GA8614@embeddedor.com
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Thomas Zimmermann authored
This patch unifies the naming of DRM functions for reference counting of struct drm_device. The resulting code is more aligned with the rest of the Linux kernel interfaces. Signed-off-by:
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Thomas Zimmermann authored
This patch unifies the naming of DRM functions for reference counting of struct drm_device. The resulting code is more aligned with the rest of the Linux kernel interfaces. Signed-off-by:
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Paul Kocialkowski authored
Blending order is set based on the z position of each DRM plane. The blending order register is currently cleared at each atomic DRM commit, with the intent that each committed plane will set the appropriate bits (based on its z-pos) when enabling the plane. However, it sometimes happens that a particular plane is left unchanged by an atomic commit and thus will not be configured again. In that scenario, blending order is cleared and only the bits relevant for the planes affected by the commit are set. This leaves the planes that did not change without their blending order set in the register, leading to that plane not being displayed. Instead of clearing the blending order register at every atomic commit, this change moves the register's initial clear at bind time and only clears the bits for a specific plane when disabling it or changing its zpos. This way, planes that are left untouched by a DRM atomic commit are no longer disabled. Signed-off-by:
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