Skip to content
Projects
Groups
Snippets
Help
Loading...
Help
Support
Keyboard shortcuts
?
Submit feedback
Contribute to GitLab
Sign in / Register
Toggle navigation
O
ors-root-access
Project overview
Project overview
Details
Activity
Releases
Repository
Repository
Files
Commits
Branches
Tags
Contributors
Graph
Compare
Issues
0
Issues
0
List
Boards
Labels
Milestones
Merge Requests
0
Merge Requests
0
CI / CD
CI / CD
Pipelines
Jobs
Schedules
Analytics
Analytics
CI / CD
Repository
Value Stream
Wiki
Wiki
Snippets
Snippets
Members
Members
Collapse sidebar
Close sidebar
Activity
Graph
Create a new issue
Jobs
Commits
Issue Boards
Open sidebar
nexedi
ors-root-access
Commits
eff389ca
Commit
eff389ca
authored
Sep 16, 2024
by
Joanne Hugé
Browse files
Options
Browse Files
Download
Email Patches
Plain Diff
update README.md
parent
5125dbbf
Changes
1
Hide whitespace changes
Inline
Side-by-side
Showing
1 changed file
with
4 additions
and
0 deletions
+4
-0
README.md
README.md
+4
-0
No files found.
README.md
View file @
eff389ca
...
@@ -4,6 +4,7 @@
...
@@ -4,6 +4,7 @@
You can check your FPGA version by doing:
You can check your FPGA version by doing:
```
root@orsXXX:~# AMARISOFT_PATH/trx_sdr/sdr_util version
root@orsXXX:~# AMARISOFT_PATH/trx_sdr/sdr_util version
SDR board utilities version 2023-09-09, Copyright (C) 2012-2023 Amarisoft
SDR board utilities version 2023-09-09, Copyright (C) 2012-2023 Amarisoft
=== Device /dev/sdr0 ===
=== Device /dev/sdr0 ===
...
@@ -17,6 +18,7 @@ DMA: 1 ch, 32 bits, SMem index: Off
...
@@ -17,6 +18,7 @@ DMA: 1 ch, 32 bits, SMem index: Off
DNA: [0x19296160552233052]
DNA: [0x19296160552233052]
Serial ''
Serial ''
PCIe bus: bus=0x01 FPGA PCI gen2 x1 (4.0Gb/s) OK
PCIe bus: bus=0x01 FPGA PCI gen2 x1 (4.0Gb/s) OK
```
Please check "Software version" is 2023-09-09
Please check "Software version" is 2023-09-09
...
@@ -24,7 +26,9 @@ Please check "Software version" is 2023-09-09
...
@@ -24,7 +26,9 @@ Please check "Software version" is 2023-09-09
To patch your FPGA, first get the ORS 2023-09-09 bitstream from Rapid.Space, then:
To patch your FPGA, first get the ORS 2023-09-09 bitstream from Rapid.Space, then:
```
root@orsXXX:~/ors-root-access/flash-fpga# ./init.sh
root@orsXXX:~/ors-root-access/flash-fpga# ./init.sh
root@orsXXX:~/ors-root-access/flash-fpga# ./patch-FPGA.sh
root@orsXXX:~/ors-root-access/flash-fpga# ./patch-FPGA.sh
```
Then do a hard reboot by unplugging the ORS and replugging it (make sure not to unplug it from the POE cable)
Then do a hard reboot by unplugging the ORS and replugging it (make sure not to unplug it from the POE cable)
Write
Preview
Markdown
is supported
0%
Try again
or
attach a new file
Attach a file
Cancel
You are about to add
0
people
to the discussion. Proceed with caution.
Finish editing this message first!
Cancel
Please
register
or
sign in
to comment