Commit 13f6f62f authored by Linus Torvalds's avatar Linus Torvalds

Merge tag 'rtc-4.6' of git://git.kernel.org/pub/scm/linux/kernel/git/abelloni/linux

Pull RTC updates from Alexandre Belloni:
 "Core:
   - New sysfs interface to set and read clock offset
   - Drivers can now be both I2C and SPI (see pcf2127 and ds3232)

  New drivers:
   - Alphascale ASM9260
   - Epson RX6110SA
   - Maxim max20024 and max77620 (in max77686)
   - Microchip PIC32
   - NXP pcf2129 (in pcf2127)

  Subsystem wide cleanups:
   - remove IRQF_EARLY_RESUME when unecessary

  Drivers:
   - ds1307: clock output, temperature sensor and wakeup-source support
   - ds1685: actually spin forever in poweroff error path
   - ds3232: many cleanups
   - ds3234: merged in ds3232
   - hym8563: fix invalid year calculation
   - max77686: many cleanups
   - max77802 merged in max77686
   - pcf2123: cleanups and offset support
   - pcf85063: cleanups
   - pcf8523: propely handle oscillator stop bit
   - rv3029: many cleanups, trickle charger and temperature sensor support
   - rv8803: convert spin_lock to mutex_lock
   - rx8025: many fixes
   - vr41xx: restore alarm_irq_enable"

* tag 'rtc-4.6' of git://git.kernel.org/pub/scm/linux/kernel/git/abelloni/linux: (86 commits)
  rtc: pcf2127: add pcf2129 device id
  rtc: pcf2127: add support for spi interface
  rtc: pcf2127: convert to use regmap
  rtc: rv3029: Add thermometer hwmon support
  rtc: rv3029: Add update_bits helper for eeprom access
  rtc: ds1685: actually spin forever in poweroff error path
  rtc: hym8563: fix invalid year calculation
  rtc: ds3232: use rtc->ops_lock to protect alarm operations
  rtc: ds3232: fix issue when irq is shared several devices
  rtc: ds3232: remove unused UIE code
  rtc: ds3232: add register access error checks
  rtc: ds3232: fix read on /dev/rtc after RTC_AIE_ON
  rtc: merge ds3232 and ds3234
  rtc: ds3232: convert to use regmap
  rtc: pxa: fix Kconfig indentation
  rtc: rv3029: Add device tree property for trickle charger
  rtc: rv3029: Add functions for EEPROM access
  rtc: rv3029: Add i2c register update-bits helper
  rtc: rv3029: Add missing register definitions
  rtc: rv3029: Add "rv3029" I2C device id
  ...
parents f0718cea cee2cc21
* Alphascale asm9260 SoC Real Time Clock
Required properties:
- compatible: Should be "alphascale,asm9260-rtc"
- reg: Physical base address of the controller and length
of memory mapped region.
- interrupts: IRQ line for the RTC.
- clocks: Reference to the clock entry.
- clock-names: should contain:
* "ahb" for the SoC RTC clock
Example:
rtc0: rtc@800a0000 {
compatible = "alphascale,asm9260-rtc";
reg = <0x800a0000 0x100>;
clocks = <&acc CLKID_AHB_RTC>;
clock-names = "ahb";
interrupts = <2>;
};
Epson RX6110 Real Time Clock
============================
The Epson RX6110 can be used with SPI or I2C busses. The kind of
bus depends on the SPISEL pin and can not be configured via software.
I2C mode
--------
Required properties:
- compatible: should be: "epson,rx6110"
- reg : the I2C address of the device for I2C
Example:
rtc: rtc@32 {
compatible = "epson,rx6110"
reg = <0x32>;
};
SPI mode
--------
Required properties:
- compatible: should be: "epson,rx6110"
- reg: chip select number
- spi-cs-high: RX6110 needs chipselect high
- spi-cpha: RX6110 works with SPI shifted clock phase
- spi-cpol: RX6110 works with SPI inverse clock polarity
Example:
rtc: rtc@3 {
compatible = "epson,rx6110"
reg = <3>
spi-cs-high;
spi-cpha;
spi-cpol;
};
* Maxim DS3231 Real Time Clock
Required properties:
see: Documentation/devicetree/bindings/i2c/trivial-devices.txt
Optional property:
- #clock-cells: Should be 1.
- clock-output-names:
overwrite the default clock names "ds3231_clk_sqw" and "ds3231_clk_32khz".
Each clock is assigned an identifier and client nodes can use this identifier
to specify the clock which they consume. Following indices are allowed:
- 0: square-wave output on the SQW pin
- 1: square-wave output on the 32kHz pin
- interrupts: rtc alarm/event interrupt. When this property is selected,
clock on the SQW pin cannot be used.
Example:
ds3231: ds3231@51 {
compatible = "maxim,ds3231";
reg = <0x68>;
#clock-cells = <1>;
};
device1 {
...
clocks = <&ds3231 0>;
...
};
device2 {
...
clocks = <&ds3231 1>;
...
};
* Microchip PIC32 Real Time Clock and Calendar
The RTCC keeps time in hours, minutes, and seconds, and one half second. It
provides a calendar in weekday, date, month, and year. It also provides a
configurable alarm.
Required properties:
- compatible: should be: "microchip,pic32mzda-rtc"
- reg: physical base address of the controller and length of memory mapped
region.
- interrupts: RTC alarm/event interrupt
- clocks: clock phandle
Example:
rtc: rtc@1f8c0000 {
compatible = "microchip,pic32mzda-rtc";
reg = <0x1f8c0000 0x60>;
interrupts = <166 IRQ_TYPE_EDGE_RISING>;
clocks = <&PBCLK6>;
};
...@@ -157,6 +157,12 @@ wakealarm: The time at which the clock will generate a system wakeup ...@@ -157,6 +157,12 @@ wakealarm: The time at which the clock will generate a system wakeup
the epoch by default, or if there's a leading +, seconds in the the epoch by default, or if there's a leading +, seconds in the
future, or if there is a leading +=, seconds ahead of the current future, or if there is a leading +=, seconds ahead of the current
alarm. alarm.
offset: The amount which the rtc clock has been adjusted in firmware.
Visible only if the driver supports clock offset adjustment.
The unit is parts per billion, i.e. The number of clock ticks
which are added to or removed from the rtc's base clock per
billion ticks. A positive value makes a day pass more slowly,
longer, and a negative value makes a day pass more quickly.
IOCTL INTERFACE IOCTL INTERFACE
--------------- ---------------
......
...@@ -35,8 +35,6 @@ ...@@ -35,8 +35,6 @@
#include <linux/err.h> #include <linux/err.h>
#include <linux/of.h> #include <linux/of.h>
#define I2C_ADDR_RTC (0x0C >> 1)
static const struct mfd_cell max77686_devs[] = { static const struct mfd_cell max77686_devs[] = {
{ .name = "max77686-pmic", }, { .name = "max77686-pmic", },
{ .name = "max77686-rtc", }, { .name = "max77686-rtc", },
...@@ -116,11 +114,6 @@ static const struct regmap_config max77686_regmap_config = { ...@@ -116,11 +114,6 @@ static const struct regmap_config max77686_regmap_config = {
.val_bits = 8, .val_bits = 8,
}; };
static const struct regmap_config max77686_rtc_regmap_config = {
.reg_bits = 8,
.val_bits = 8,
};
static const struct regmap_config max77802_regmap_config = { static const struct regmap_config max77802_regmap_config = {
.reg_bits = 8, .reg_bits = 8,
.val_bits = 8, .val_bits = 8,
...@@ -156,25 +149,6 @@ static const struct regmap_irq_chip max77686_irq_chip = { ...@@ -156,25 +149,6 @@ static const struct regmap_irq_chip max77686_irq_chip = {
.num_irqs = ARRAY_SIZE(max77686_irqs), .num_irqs = ARRAY_SIZE(max77686_irqs),
}; };
static const struct regmap_irq max77686_rtc_irqs[] = {
/* RTC interrupts */
{ .reg_offset = 0, .mask = MAX77686_RTCINT_RTC60S_MSK, },
{ .reg_offset = 0, .mask = MAX77686_RTCINT_RTCA1_MSK, },
{ .reg_offset = 0, .mask = MAX77686_RTCINT_RTCA2_MSK, },
{ .reg_offset = 0, .mask = MAX77686_RTCINT_SMPL_MSK, },
{ .reg_offset = 0, .mask = MAX77686_RTCINT_RTC1S_MSK, },
{ .reg_offset = 0, .mask = MAX77686_RTCINT_WTSR_MSK, },
};
static const struct regmap_irq_chip max77686_rtc_irq_chip = {
.name = "max77686-rtc",
.status_base = MAX77686_RTC_INT,
.mask_base = MAX77686_RTC_INTM,
.num_regs = 1,
.irqs = max77686_rtc_irqs,
.num_irqs = ARRAY_SIZE(max77686_rtc_irqs),
};
static const struct regmap_irq_chip max77802_irq_chip = { static const struct regmap_irq_chip max77802_irq_chip = {
.name = "max77802-pmic", .name = "max77802-pmic",
.status_base = MAX77802_REG_INT1, .status_base = MAX77802_REG_INT1,
...@@ -184,15 +158,6 @@ static const struct regmap_irq_chip max77802_irq_chip = { ...@@ -184,15 +158,6 @@ static const struct regmap_irq_chip max77802_irq_chip = {
.num_irqs = ARRAY_SIZE(max77686_irqs), .num_irqs = ARRAY_SIZE(max77686_irqs),
}; };
static const struct regmap_irq_chip max77802_rtc_irq_chip = {
.name = "max77802-rtc",
.status_base = MAX77802_RTC_INT,
.mask_base = MAX77802_RTC_INTM,
.num_regs = 1,
.irqs = max77686_rtc_irqs, /* same masks as 77686 */
.num_irqs = ARRAY_SIZE(max77686_rtc_irqs),
};
static const struct of_device_id max77686_pmic_dt_match[] = { static const struct of_device_id max77686_pmic_dt_match[] = {
{ {
.compatible = "maxim,max77686", .compatible = "maxim,max77686",
...@@ -214,8 +179,6 @@ static int max77686_i2c_probe(struct i2c_client *i2c, ...@@ -214,8 +179,6 @@ static int max77686_i2c_probe(struct i2c_client *i2c,
int ret = 0; int ret = 0;
const struct regmap_config *config; const struct regmap_config *config;
const struct regmap_irq_chip *irq_chip; const struct regmap_irq_chip *irq_chip;
const struct regmap_irq_chip *rtc_irq_chip;
struct regmap **rtc_regmap;
const struct mfd_cell *cells; const struct mfd_cell *cells;
int n_devs; int n_devs;
...@@ -242,15 +205,11 @@ static int max77686_i2c_probe(struct i2c_client *i2c, ...@@ -242,15 +205,11 @@ static int max77686_i2c_probe(struct i2c_client *i2c,
if (max77686->type == TYPE_MAX77686) { if (max77686->type == TYPE_MAX77686) {
config = &max77686_regmap_config; config = &max77686_regmap_config;
irq_chip = &max77686_irq_chip; irq_chip = &max77686_irq_chip;
rtc_irq_chip = &max77686_rtc_irq_chip;
rtc_regmap = &max77686->rtc_regmap;
cells = max77686_devs; cells = max77686_devs;
n_devs = ARRAY_SIZE(max77686_devs); n_devs = ARRAY_SIZE(max77686_devs);
} else { } else {
config = &max77802_regmap_config; config = &max77802_regmap_config;
irq_chip = &max77802_irq_chip; irq_chip = &max77802_irq_chip;
rtc_irq_chip = &max77802_rtc_irq_chip;
rtc_regmap = &max77686->regmap;
cells = max77802_devs; cells = max77802_devs;
n_devs = ARRAY_SIZE(max77802_devs); n_devs = ARRAY_SIZE(max77802_devs);
} }
...@@ -270,60 +229,25 @@ static int max77686_i2c_probe(struct i2c_client *i2c, ...@@ -270,60 +229,25 @@ static int max77686_i2c_probe(struct i2c_client *i2c,
return -ENODEV; return -ENODEV;
} }
if (max77686->type == TYPE_MAX77686) {
max77686->rtc = i2c_new_dummy(i2c->adapter, I2C_ADDR_RTC);
if (!max77686->rtc) {
dev_err(max77686->dev,
"Failed to allocate I2C device for RTC\n");
return -ENODEV;
}
i2c_set_clientdata(max77686->rtc, max77686);
max77686->rtc_regmap =
devm_regmap_init_i2c(max77686->rtc,
&max77686_rtc_regmap_config);
if (IS_ERR(max77686->rtc_regmap)) {
ret = PTR_ERR(max77686->rtc_regmap);
dev_err(max77686->dev,
"failed to allocate RTC regmap: %d\n",
ret);
goto err_unregister_i2c;
}
}
ret = regmap_add_irq_chip(max77686->regmap, max77686->irq, ret = regmap_add_irq_chip(max77686->regmap, max77686->irq,
IRQF_TRIGGER_FALLING | IRQF_ONESHOT | IRQF_TRIGGER_FALLING | IRQF_ONESHOT |
IRQF_SHARED, 0, irq_chip, IRQF_SHARED, 0, irq_chip,
&max77686->irq_data); &max77686->irq_data);
if (ret) { if (ret < 0) {
dev_err(&i2c->dev, "failed to add PMIC irq chip: %d\n", ret); dev_err(&i2c->dev, "failed to add PMIC irq chip: %d\n", ret);
goto err_unregister_i2c; return ret;
}
ret = regmap_add_irq_chip(*rtc_regmap, max77686->irq,
IRQF_TRIGGER_FALLING | IRQF_ONESHOT |
IRQF_SHARED, 0, rtc_irq_chip,
&max77686->rtc_irq_data);
if (ret) {
dev_err(&i2c->dev, "failed to add RTC irq chip: %d\n", ret);
goto err_del_irqc;
} }
ret = mfd_add_devices(max77686->dev, -1, cells, n_devs, NULL, 0, NULL); ret = mfd_add_devices(max77686->dev, -1, cells, n_devs, NULL, 0, NULL);
if (ret < 0) { if (ret < 0) {
dev_err(&i2c->dev, "failed to add MFD devices: %d\n", ret); dev_err(&i2c->dev, "failed to add MFD devices: %d\n", ret);
goto err_del_rtc_irqc; goto err_del_irqc;
} }
return 0; return 0;
err_del_rtc_irqc:
regmap_del_irq_chip(max77686->irq, max77686->rtc_irq_data);
err_del_irqc: err_del_irqc:
regmap_del_irq_chip(max77686->irq, max77686->irq_data); regmap_del_irq_chip(max77686->irq, max77686->irq_data);
err_unregister_i2c:
if (max77686->type == TYPE_MAX77686)
i2c_unregister_device(max77686->rtc);
return ret; return ret;
} }
...@@ -334,12 +258,8 @@ static int max77686_i2c_remove(struct i2c_client *i2c) ...@@ -334,12 +258,8 @@ static int max77686_i2c_remove(struct i2c_client *i2c)
mfd_remove_devices(max77686->dev); mfd_remove_devices(max77686->dev);
regmap_del_irq_chip(max77686->irq, max77686->rtc_irq_data);
regmap_del_irq_chip(max77686->irq, max77686->irq_data); regmap_del_irq_chip(max77686->irq, max77686->irq_data);
if (max77686->type == TYPE_MAX77686)
i2c_unregister_device(max77686->rtc);
return 0; return 0;
} }
......
This diff is collapsed.
...@@ -28,6 +28,7 @@ obj-$(CONFIG_RTC_DRV_ABB5ZES3) += rtc-ab-b5ze-s3.o ...@@ -28,6 +28,7 @@ obj-$(CONFIG_RTC_DRV_ABB5ZES3) += rtc-ab-b5ze-s3.o
obj-$(CONFIG_RTC_DRV_ABX80X) += rtc-abx80x.o obj-$(CONFIG_RTC_DRV_ABX80X) += rtc-abx80x.o
obj-$(CONFIG_RTC_DRV_ARMADA38X) += rtc-armada38x.o obj-$(CONFIG_RTC_DRV_ARMADA38X) += rtc-armada38x.o
obj-$(CONFIG_RTC_DRV_AS3722) += rtc-as3722.o obj-$(CONFIG_RTC_DRV_AS3722) += rtc-as3722.o
obj-$(CONFIG_RTC_DRV_ASM9260) += rtc-asm9260.o
obj-$(CONFIG_RTC_DRV_AT32AP700X)+= rtc-at32ap700x.o obj-$(CONFIG_RTC_DRV_AT32AP700X)+= rtc-at32ap700x.o
obj-$(CONFIG_RTC_DRV_AT91RM9200)+= rtc-at91rm9200.o obj-$(CONFIG_RTC_DRV_AT91RM9200)+= rtc-at91rm9200.o
obj-$(CONFIG_RTC_DRV_AT91SAM9) += rtc-at91sam9.o obj-$(CONFIG_RTC_DRV_AT91SAM9) += rtc-at91sam9.o
...@@ -59,7 +60,6 @@ obj-$(CONFIG_RTC_DRV_DS1685_FAMILY) += rtc-ds1685.o ...@@ -59,7 +60,6 @@ obj-$(CONFIG_RTC_DRV_DS1685_FAMILY) += rtc-ds1685.o
obj-$(CONFIG_RTC_DRV_DS1742) += rtc-ds1742.o obj-$(CONFIG_RTC_DRV_DS1742) += rtc-ds1742.o
obj-$(CONFIG_RTC_DRV_DS2404) += rtc-ds2404.o obj-$(CONFIG_RTC_DRV_DS2404) += rtc-ds2404.o
obj-$(CONFIG_RTC_DRV_DS3232) += rtc-ds3232.o obj-$(CONFIG_RTC_DRV_DS3232) += rtc-ds3232.o
obj-$(CONFIG_RTC_DRV_DS3234) += rtc-ds3234.o
obj-$(CONFIG_RTC_DRV_EFI) += rtc-efi.o obj-$(CONFIG_RTC_DRV_EFI) += rtc-efi.o
obj-$(CONFIG_RTC_DRV_EM3027) += rtc-em3027.o obj-$(CONFIG_RTC_DRV_EM3027) += rtc-em3027.o
obj-$(CONFIG_RTC_DRV_EP93XX) += rtc-ep93xx.o obj-$(CONFIG_RTC_DRV_EP93XX) += rtc-ep93xx.o
...@@ -86,7 +86,6 @@ obj-$(CONFIG_RTC_DRV_M48T86) += rtc-m48t86.o ...@@ -86,7 +86,6 @@ obj-$(CONFIG_RTC_DRV_M48T86) += rtc-m48t86.o
obj-$(CONFIG_RTC_DRV_MAX6900) += rtc-max6900.o obj-$(CONFIG_RTC_DRV_MAX6900) += rtc-max6900.o
obj-$(CONFIG_RTC_DRV_MAX6902) += rtc-max6902.o obj-$(CONFIG_RTC_DRV_MAX6902) += rtc-max6902.o
obj-$(CONFIG_RTC_DRV_MAX77686) += rtc-max77686.o obj-$(CONFIG_RTC_DRV_MAX77686) += rtc-max77686.o
obj-$(CONFIG_RTC_DRV_MAX77802) += rtc-max77802.o
obj-$(CONFIG_RTC_DRV_MAX8907) += rtc-max8907.o obj-$(CONFIG_RTC_DRV_MAX8907) += rtc-max8907.o
obj-$(CONFIG_RTC_DRV_MAX8925) += rtc-max8925.o obj-$(CONFIG_RTC_DRV_MAX8925) += rtc-max8925.o
obj-$(CONFIG_RTC_DRV_MAX8997) += rtc-max8997.o obj-$(CONFIG_RTC_DRV_MAX8997) += rtc-max8997.o
...@@ -112,6 +111,7 @@ obj-$(CONFIG_RTC_DRV_PCF85063) += rtc-pcf85063.o ...@@ -112,6 +111,7 @@ obj-$(CONFIG_RTC_DRV_PCF85063) += rtc-pcf85063.o
obj-$(CONFIG_RTC_DRV_PCF8523) += rtc-pcf8523.o obj-$(CONFIG_RTC_DRV_PCF8523) += rtc-pcf8523.o
obj-$(CONFIG_RTC_DRV_PCF8563) += rtc-pcf8563.o obj-$(CONFIG_RTC_DRV_PCF8563) += rtc-pcf8563.o
obj-$(CONFIG_RTC_DRV_PCF8583) += rtc-pcf8583.o obj-$(CONFIG_RTC_DRV_PCF8583) += rtc-pcf8583.o
obj-$(CONFIG_RTC_DRV_PIC32) += rtc-pic32.o
obj-$(CONFIG_RTC_DRV_PL030) += rtc-pl030.o obj-$(CONFIG_RTC_DRV_PL030) += rtc-pl030.o
obj-$(CONFIG_RTC_DRV_PL031) += rtc-pl031.o obj-$(CONFIG_RTC_DRV_PL031) += rtc-pl031.o
obj-$(CONFIG_RTC_DRV_PM8XXX) += rtc-pm8xxx.o obj-$(CONFIG_RTC_DRV_PM8XXX) += rtc-pm8xxx.o
...@@ -128,6 +128,7 @@ obj-$(CONFIG_RTC_DRV_RS5C372) += rtc-rs5c372.o ...@@ -128,6 +128,7 @@ obj-$(CONFIG_RTC_DRV_RS5C372) += rtc-rs5c372.o
obj-$(CONFIG_RTC_DRV_RV3029C2) += rtc-rv3029c2.o obj-$(CONFIG_RTC_DRV_RV3029C2) += rtc-rv3029c2.o
obj-$(CONFIG_RTC_DRV_RV8803) += rtc-rv8803.o obj-$(CONFIG_RTC_DRV_RV8803) += rtc-rv8803.o
obj-$(CONFIG_RTC_DRV_RX4581) += rtc-rx4581.o obj-$(CONFIG_RTC_DRV_RX4581) += rtc-rx4581.o
obj-$(CONFIG_RTC_DRV_RX6110) += rtc-rx6110.o
obj-$(CONFIG_RTC_DRV_RX8010) += rtc-rx8010.o obj-$(CONFIG_RTC_DRV_RX8010) += rtc-rx8010.o
obj-$(CONFIG_RTC_DRV_RX8025) += rtc-rx8025.o obj-$(CONFIG_RTC_DRV_RX8025) += rtc-rx8025.o
obj-$(CONFIG_RTC_DRV_RX8581) += rtc-rx8581.o obj-$(CONFIG_RTC_DRV_RX8581) += rtc-rx8581.o
......
...@@ -361,17 +361,4 @@ static int __init rtc_init(void) ...@@ -361,17 +361,4 @@ static int __init rtc_init(void)
rtc_dev_init(); rtc_dev_init();
return 0; return 0;
} }
static void __exit rtc_exit(void)
{
rtc_dev_exit();
class_destroy(rtc_class);
ida_destroy(&rtc_ida);
}
subsys_initcall(rtc_init); subsys_initcall(rtc_init);
module_exit(rtc_exit);
MODULE_AUTHOR("Alessandro Zummo <a.zummo@towertech.it>");
MODULE_DESCRIPTION("RTC class support");
MODULE_LICENSE("GPL");
...@@ -939,4 +939,58 @@ void rtc_timer_cancel(struct rtc_device *rtc, struct rtc_timer *timer) ...@@ -939,4 +939,58 @@ void rtc_timer_cancel(struct rtc_device *rtc, struct rtc_timer *timer)
mutex_unlock(&rtc->ops_lock); mutex_unlock(&rtc->ops_lock);
} }
/**
* rtc_read_offset - Read the amount of rtc offset in parts per billion
* @ rtc: rtc device to be used
* @ offset: the offset in parts per billion
*
* see below for details.
*
* Kernel interface to read rtc clock offset
* Returns 0 on success, or a negative number on error.
* If read_offset() is not implemented for the rtc, return -EINVAL
*/
int rtc_read_offset(struct rtc_device *rtc, long *offset)
{
int ret;
if (!rtc->ops)
return -ENODEV;
if (!rtc->ops->read_offset)
return -EINVAL;
mutex_lock(&rtc->ops_lock);
ret = rtc->ops->read_offset(rtc->dev.parent, offset);
mutex_unlock(&rtc->ops_lock);
return ret;
}
/**
* rtc_set_offset - Adjusts the duration of the average second
* @ rtc: rtc device to be used
* @ offset: the offset in parts per billion
*
* Some rtc's allow an adjustment to the average duration of a second
* to compensate for differences in the actual clock rate due to temperature,
* the crystal, capacitor, etc.
*
* Kernel interface to adjust an rtc clock offset.
* Return 0 on success, or a negative number on error.
* If the rtc offset is not setable (or not implemented), return -EINVAL
*/
int rtc_set_offset(struct rtc_device *rtc, long offset)
{
int ret;
if (!rtc->ops)
return -ENODEV;
if (!rtc->ops->set_offset)
return -EINVAL;
mutex_lock(&rtc->ops_lock);
ret = rtc->ops->set_offset(rtc->dev.parent, offset);
mutex_unlock(&rtc->ops_lock);
return ret;
}
...@@ -210,7 +210,7 @@ static int as3722_rtc_probe(struct platform_device *pdev) ...@@ -210,7 +210,7 @@ static int as3722_rtc_probe(struct platform_device *pdev)
dev_info(&pdev->dev, "RTC interrupt %d\n", as3722_rtc->alarm_irq); dev_info(&pdev->dev, "RTC interrupt %d\n", as3722_rtc->alarm_irq);
ret = devm_request_threaded_irq(&pdev->dev, as3722_rtc->alarm_irq, NULL, ret = devm_request_threaded_irq(&pdev->dev, as3722_rtc->alarm_irq, NULL,
as3722_alarm_irq, IRQF_ONESHOT | IRQF_EARLY_RESUME, as3722_alarm_irq, IRQF_ONESHOT,
"rtc-alarm", as3722_rtc); "rtc-alarm", as3722_rtc);
if (ret < 0) { if (ret < 0) {
dev_err(&pdev->dev, "Failed to request alarm IRQ %d: %d\n", dev_err(&pdev->dev, "Failed to request alarm IRQ %d: %d\n",
......
/*
* Copyright (C) 2016 Oleksij Rempel <linux@rempel-privat.de>
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of the GNU General Public License as published by the
* Free Software Foundation; either version 2 of the License,
* or (at your option) any later version.
*/
#include <linux/clk.h>
#include <linux/interrupt.h>
#include <linux/io.h>
#include <linux/module.h>
#include <linux/of.h>
#include <linux/platform_device.h>
#include <linux/rtc.h>
/* Miscellaneous registers */
/* Interrupt Location Register */
#define HW_ILR 0x00
#define BM_RTCALF BIT(1)
#define BM_RTCCIF BIT(0)
/* Clock Control Register */
#define HW_CCR 0x08
/* Calibration counter disable */
#define BM_CCALOFF BIT(4)
/* Reset internal oscillator divider */
#define BM_CTCRST BIT(1)
/* Clock Enable */
#define BM_CLKEN BIT(0)
/* Counter Increment Interrupt Register */
#define HW_CIIR 0x0C
#define BM_CIIR_IMYEAR BIT(7)
#define BM_CIIR_IMMON BIT(6)
#define BM_CIIR_IMDOY BIT(5)
#define BM_CIIR_IMDOW BIT(4)
#define BM_CIIR_IMDOM BIT(3)
#define BM_CIIR_IMHOUR BIT(2)
#define BM_CIIR_IMMIN BIT(1)
#define BM_CIIR_IMSEC BIT(0)
/* Alarm Mask Register */
#define HW_AMR 0x10
#define BM_AMR_IMYEAR BIT(7)
#define BM_AMR_IMMON BIT(6)
#define BM_AMR_IMDOY BIT(5)
#define BM_AMR_IMDOW BIT(4)
#define BM_AMR_IMDOM BIT(3)
#define BM_AMR_IMHOUR BIT(2)
#define BM_AMR_IMMIN BIT(1)
#define BM_AMR_IMSEC BIT(0)
#define BM_AMR_OFF 0xff
/* Consolidated time registers */
#define HW_CTIME0 0x14
#define BM_CTIME0_DOW_S 24
#define BM_CTIME0_DOW_M 0x7
#define BM_CTIME0_HOUR_S 16
#define BM_CTIME0_HOUR_M 0x1f
#define BM_CTIME0_MIN_S 8
#define BM_CTIME0_MIN_M 0x3f
#define BM_CTIME0_SEC_S 0
#define BM_CTIME0_SEC_M 0x3f
#define HW_CTIME1 0x18
#define BM_CTIME1_YEAR_S 16
#define BM_CTIME1_YEAR_M 0xfff
#define BM_CTIME1_MON_S 8
#define BM_CTIME1_MON_M 0xf
#define BM_CTIME1_DOM_S 0
#define BM_CTIME1_DOM_M 0x1f
#define HW_CTIME2 0x1C
#define BM_CTIME2_DOY_S 0
#define BM_CTIME2_DOY_M 0xfff
/* Time counter registers */
#define HW_SEC 0x20
#define HW_MIN 0x24
#define HW_HOUR 0x28
#define HW_DOM 0x2C
#define HW_DOW 0x30
#define HW_DOY 0x34
#define HW_MONTH 0x38
#define HW_YEAR 0x3C
#define HW_CALIBRATION 0x40
#define BM_CALDIR_BACK BIT(17)
#define BM_CALVAL_M 0x1ffff
/* General purpose registers */
#define HW_GPREG0 0x44
#define HW_GPREG1 0x48
#define HW_GPREG2 0x4C
#define HW_GPREG3 0x50
#define HW_GPREG4 0x54
/* Alarm register group */
#define HW_ALSEC 0x60
#define HW_ALMIN 0x64
#define HW_ALHOUR 0x68
#define HW_ALDOM 0x6C
#define HW_ALDOW 0x70
#define HW_ALDOY 0x74
#define HW_ALMON 0x78
#define HW_ALYEAR 0x7C
struct asm9260_rtc_priv {
struct device *dev;
void __iomem *iobase;
struct rtc_device *rtc;
struct clk *clk;
/* io lock */
spinlock_t lock;
};
static irqreturn_t asm9260_rtc_irq(int irq, void *dev_id)
{
struct asm9260_rtc_priv *priv = dev_id;
u32 isr;
unsigned long events = 0;
isr = ioread32(priv->iobase + HW_CIIR);
if (!isr)
return IRQ_NONE;
iowrite32(0, priv->iobase + HW_CIIR);
events |= RTC_AF | RTC_IRQF;
rtc_update_irq(priv->rtc, 1, events);
return IRQ_HANDLED;
}
static int asm9260_rtc_read_time(struct device *dev, struct rtc_time *tm)
{
struct asm9260_rtc_priv *priv = dev_get_drvdata(dev);
u32 ctime0, ctime1, ctime2;
unsigned long irq_flags;
spin_lock_irqsave(&priv->lock, irq_flags);
ctime0 = ioread32(priv->iobase + HW_CTIME0);
ctime1 = ioread32(priv->iobase + HW_CTIME1);
ctime2 = ioread32(priv->iobase + HW_CTIME2);
if (ctime1 != ioread32(priv->iobase + HW_CTIME1)) {
/*
* woops, counter flipped right now. Now we are safe
* to reread.
*/
ctime0 = ioread32(priv->iobase + HW_CTIME0);
ctime1 = ioread32(priv->iobase + HW_CTIME1);
ctime2 = ioread32(priv->iobase + HW_CTIME2);
}
spin_unlock_irqrestore(&priv->lock, irq_flags);
tm->tm_sec = (ctime0 >> BM_CTIME0_SEC_S) & BM_CTIME0_SEC_M;
tm->tm_min = (ctime0 >> BM_CTIME0_MIN_S) & BM_CTIME0_MIN_M;
tm->tm_hour = (ctime0 >> BM_CTIME0_HOUR_S) & BM_CTIME0_HOUR_M;
tm->tm_wday = (ctime0 >> BM_CTIME0_DOW_S) & BM_CTIME0_DOW_M;
tm->tm_mday = (ctime1 >> BM_CTIME1_DOM_S) & BM_CTIME1_DOM_M;
tm->tm_mon = (ctime1 >> BM_CTIME1_MON_S) & BM_CTIME1_MON_M;
tm->tm_year = (ctime1 >> BM_CTIME1_YEAR_S) & BM_CTIME1_YEAR_M;
tm->tm_yday = (ctime2 >> BM_CTIME2_DOY_S) & BM_CTIME2_DOY_M;
return 0;
}
static int asm9260_rtc_set_time(struct device *dev, struct rtc_time *tm)
{
struct asm9260_rtc_priv *priv = dev_get_drvdata(dev);
unsigned long irq_flags;
spin_lock_irqsave(&priv->lock, irq_flags);
/*
* make sure SEC counter will not flip other counter on write time,
* real value will be written at the enf of sequence.
*/
iowrite32(0, priv->iobase + HW_SEC);
iowrite32(tm->tm_year, priv->iobase + HW_YEAR);
iowrite32(tm->tm_mon, priv->iobase + HW_MONTH);
iowrite32(tm->tm_mday, priv->iobase + HW_DOM);
iowrite32(tm->tm_wday, priv->iobase + HW_DOW);
iowrite32(tm->tm_yday, priv->iobase + HW_DOY);
iowrite32(tm->tm_hour, priv->iobase + HW_HOUR);
iowrite32(tm->tm_min, priv->iobase + HW_MIN);
iowrite32(tm->tm_sec, priv->iobase + HW_SEC);
spin_unlock_irqrestore(&priv->lock, irq_flags);
return 0;
}
static int asm9260_rtc_read_alarm(struct device *dev, struct rtc_wkalrm *alrm)
{
struct asm9260_rtc_priv *priv = dev_get_drvdata(dev);
unsigned long irq_flags;
spin_lock_irqsave(&priv->lock, irq_flags);
alrm->time.tm_year = ioread32(priv->iobase + HW_ALYEAR);
alrm->time.tm_mon = ioread32(priv->iobase + HW_ALMON);
alrm->time.tm_mday = ioread32(priv->iobase + HW_ALDOM);
alrm->time.tm_wday = ioread32(priv->iobase + HW_ALDOW);
alrm->time.tm_yday = ioread32(priv->iobase + HW_ALDOY);
alrm->time.tm_hour = ioread32(priv->iobase + HW_ALHOUR);
alrm->time.tm_min = ioread32(priv->iobase + HW_ALMIN);
alrm->time.tm_sec = ioread32(priv->iobase + HW_ALSEC);
alrm->enabled = ioread32(priv->iobase + HW_AMR) ? 1 : 0;
alrm->pending = ioread32(priv->iobase + HW_CIIR) ? 1 : 0;
spin_unlock_irqrestore(&priv->lock, irq_flags);
return rtc_valid_tm(&alrm->time);
}
static int asm9260_rtc_set_alarm(struct device *dev, struct rtc_wkalrm *alrm)
{
struct asm9260_rtc_priv *priv = dev_get_drvdata(dev);
unsigned long irq_flags;
spin_lock_irqsave(&priv->lock, irq_flags);
iowrite32(alrm->time.tm_year, priv->iobase + HW_ALYEAR);
iowrite32(alrm->time.tm_mon, priv->iobase + HW_ALMON);
iowrite32(alrm->time.tm_mday, priv->iobase + HW_ALDOM);
iowrite32(alrm->time.tm_wday, priv->iobase + HW_ALDOW);
iowrite32(alrm->time.tm_yday, priv->iobase + HW_ALDOY);
iowrite32(alrm->time.tm_hour, priv->iobase + HW_ALHOUR);
iowrite32(alrm->time.tm_min, priv->iobase + HW_ALMIN);
iowrite32(alrm->time.tm_sec, priv->iobase + HW_ALSEC);
iowrite32(alrm->enabled ? 0 : BM_AMR_OFF, priv->iobase + HW_AMR);
spin_unlock_irqrestore(&priv->lock, irq_flags);
return 0;
}
static int asm9260_alarm_irq_enable(struct device *dev, unsigned int enabled)
{
struct asm9260_rtc_priv *priv = dev_get_drvdata(dev);
iowrite32(enabled ? 0 : BM_AMR_OFF, priv->iobase + HW_AMR);
return 0;
}
static const struct rtc_class_ops asm9260_rtc_ops = {
.read_time = asm9260_rtc_read_time,
.set_time = asm9260_rtc_set_time,
.read_alarm = asm9260_rtc_read_alarm,
.set_alarm = asm9260_rtc_set_alarm,
.alarm_irq_enable = asm9260_alarm_irq_enable,
};
static int __init asm9260_rtc_probe(struct platform_device *pdev)
{
struct asm9260_rtc_priv *priv;
struct device *dev = &pdev->dev;
struct resource *res;
int irq_alarm, ret;
u32 ccr;
priv = devm_kzalloc(dev, sizeof(struct asm9260_rtc_priv), GFP_KERNEL);
if (!priv)
return -ENOMEM;
priv->dev = &pdev->dev;
platform_set_drvdata(pdev, priv);
irq_alarm = platform_get_irq(pdev, 0);
if (irq_alarm < 0) {
dev_err(dev, "No alarm IRQ resource defined\n");
return irq_alarm;
}
res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
priv->iobase = devm_ioremap_resource(dev, res);
if (IS_ERR(priv->iobase))
return PTR_ERR(priv->iobase);
priv->clk = devm_clk_get(dev, "ahb");
ret = clk_prepare_enable(priv->clk);
if (ret) {
dev_err(dev, "Failed to enable clk!\n");
return ret;
}
ccr = ioread32(priv->iobase + HW_CCR);
/* if dev is not enabled, reset it */
if ((ccr & (BM_CLKEN | BM_CTCRST)) != BM_CLKEN) {
iowrite32(BM_CTCRST, priv->iobase + HW_CCR);
ccr = 0;
}
iowrite32(BM_CLKEN | ccr, priv->iobase + HW_CCR);
iowrite32(0, priv->iobase + HW_CIIR);
iowrite32(BM_AMR_OFF, priv->iobase + HW_AMR);
priv->rtc = devm_rtc_device_register(dev, dev_name(dev),
&asm9260_rtc_ops, THIS_MODULE);
if (IS_ERR(priv->rtc)) {
ret = PTR_ERR(priv->rtc);
dev_err(dev, "Failed to register RTC device: %d\n", ret);
goto err_return;
}
ret = devm_request_threaded_irq(dev, irq_alarm, NULL,
asm9260_rtc_irq, IRQF_ONESHOT,
dev_name(dev), priv);
if (ret < 0) {
dev_err(dev, "can't get irq %i, err %d\n",
irq_alarm, ret);
goto err_return;
}
return 0;
err_return:
clk_disable_unprepare(priv->clk);
return ret;
}
static int __exit asm9260_rtc_remove(struct platform_device *pdev)
{
struct asm9260_rtc_priv *priv = platform_get_drvdata(pdev);
/* Disable alarm matching */
iowrite32(BM_AMR_OFF, priv->iobase + HW_AMR);
clk_disable_unprepare(priv->clk);
return 0;
}
static const struct of_device_id asm9260_dt_ids[] = {
{ .compatible = "alphascale,asm9260-rtc", },
{}
};
static struct platform_driver asm9260_rtc_driver = {
.probe = asm9260_rtc_probe,
.remove = asm9260_rtc_remove,
.driver = {
.name = "asm9260-rtc",
.owner = THIS_MODULE,
.of_match_table = asm9260_dt_ids,
},
};
module_platform_driver(asm9260_rtc_driver);
MODULE_AUTHOR("Oleksij Rempel <linux@rempel-privat.de>");
MODULE_DESCRIPTION("Alphascale asm9260 SoC Realtime Clock Driver (RTC)");
MODULE_LICENSE("GPL");
...@@ -532,7 +532,7 @@ ds1305_nvram_read(struct file *filp, struct kobject *kobj, ...@@ -532,7 +532,7 @@ ds1305_nvram_read(struct file *filp, struct kobject *kobj,
struct spi_transfer x[2]; struct spi_transfer x[2];
int status; int status;
spi = container_of(kobj, struct spi_device, dev.kobj); spi = to_spi_device(kobj_to_dev(kobj));
addr = DS1305_NVRAM + off; addr = DS1305_NVRAM + off;
msg_init(&m, x, &addr, count, NULL, buf); msg_init(&m, x, &addr, count, NULL, buf);
...@@ -554,7 +554,7 @@ ds1305_nvram_write(struct file *filp, struct kobject *kobj, ...@@ -554,7 +554,7 @@ ds1305_nvram_write(struct file *filp, struct kobject *kobj,
struct spi_transfer x[2]; struct spi_transfer x[2];
int status; int status;
spi = container_of(kobj, struct spi_device, dev.kobj); spi = to_spi_device(kobj_to_dev(kobj));
addr = (DS1305_WRITE | DS1305_NVRAM) + off; addr = (DS1305_WRITE | DS1305_NVRAM) + off;
msg_init(&m, x, &addr, count, buf, NULL); msg_init(&m, x, &addr, count, buf, NULL);
......
This diff is collapsed.
...@@ -187,9 +187,9 @@ ds1685_rtc_end_data_access(struct ds1685_priv *rtc) ...@@ -187,9 +187,9 @@ ds1685_rtc_end_data_access(struct ds1685_priv *rtc)
* Only use this where you are certain another lock will not be held. * Only use this where you are certain another lock will not be held.
*/ */
static inline void static inline void
ds1685_rtc_begin_ctrl_access(struct ds1685_priv *rtc, unsigned long flags) ds1685_rtc_begin_ctrl_access(struct ds1685_priv *rtc, unsigned long *flags)
{ {
spin_lock_irqsave(&rtc->lock, flags); spin_lock_irqsave(&rtc->lock, *flags);
ds1685_rtc_switch_to_bank1(rtc); ds1685_rtc_switch_to_bank1(rtc);
} }
...@@ -1300,7 +1300,7 @@ ds1685_rtc_sysfs_ctrl_regs_store(struct device *dev, ...@@ -1300,7 +1300,7 @@ ds1685_rtc_sysfs_ctrl_regs_store(struct device *dev,
{ {
struct ds1685_priv *rtc = dev_get_drvdata(dev); struct ds1685_priv *rtc = dev_get_drvdata(dev);
u8 reg = 0, bit = 0, tmp; u8 reg = 0, bit = 0, tmp;
unsigned long flags = 0; unsigned long flags;
long int val = 0; long int val = 0;
const struct ds1685_rtc_ctrl_regs *reg_info = const struct ds1685_rtc_ctrl_regs *reg_info =
ds1685_rtc_sysfs_ctrl_regs_lookup(attr->attr.name); ds1685_rtc_sysfs_ctrl_regs_lookup(attr->attr.name);
...@@ -1321,7 +1321,7 @@ ds1685_rtc_sysfs_ctrl_regs_store(struct device *dev, ...@@ -1321,7 +1321,7 @@ ds1685_rtc_sysfs_ctrl_regs_store(struct device *dev,
bit = reg_info->bit; bit = reg_info->bit;
/* Safe to spinlock during a write. */ /* Safe to spinlock during a write. */
ds1685_rtc_begin_ctrl_access(rtc, flags); ds1685_rtc_begin_ctrl_access(rtc, &flags);
tmp = rtc->read(rtc, reg); tmp = rtc->read(rtc, reg);
rtc->write(rtc, reg, (val ? (tmp | bit) : (tmp & ~(bit)))); rtc->write(rtc, reg, (val ? (tmp | bit) : (tmp & ~(bit))));
ds1685_rtc_end_ctrl_access(rtc, flags); ds1685_rtc_end_ctrl_access(rtc, flags);
...@@ -2161,6 +2161,7 @@ ds1685_rtc_poweroff(struct platform_device *pdev) ...@@ -2161,6 +2161,7 @@ ds1685_rtc_poweroff(struct platform_device *pdev)
/* Check for valid RTC data, else, spin forever. */ /* Check for valid RTC data, else, spin forever. */
if (unlikely(!pdev)) { if (unlikely(!pdev)) {
pr_emerg("platform device data not available, spinning forever ...\n"); pr_emerg("platform device data not available, spinning forever ...\n");
while(1);
unreachable(); unreachable();
} else { } else {
/* Get the rtc data. */ /* Get the rtc data. */
......
This diff is collapsed.
/* rtc-ds3234.c
*
* Driver for Dallas Semiconductor (DS3234) SPI RTC with Integrated Crystal
* and SRAM.
*
* Copyright (C) 2008 MIMOMax Wireless Ltd.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 as
* published by the Free Software Foundation.
*
*/
#include <linux/init.h>
#include <linux/module.h>
#include <linux/device.h>
#include <linux/platform_device.h>
#include <linux/rtc.h>
#include <linux/spi/spi.h>
#include <linux/bcd.h>
#define DS3234_REG_SECONDS 0x00
#define DS3234_REG_MINUTES 0x01
#define DS3234_REG_HOURS 0x02
#define DS3234_REG_DAY 0x03
#define DS3234_REG_DATE 0x04
#define DS3234_REG_MONTH 0x05
#define DS3234_REG_YEAR 0x06
#define DS3234_REG_CENTURY (1 << 7) /* Bit 7 of the Month register */
#define DS3234_REG_CONTROL 0x0E
#define DS3234_REG_CONT_STAT 0x0F
static int ds3234_set_reg(struct device *dev, unsigned char address,
unsigned char data)
{
struct spi_device *spi = to_spi_device(dev);
unsigned char buf[2];
/* MSB must be '1' to indicate write */
buf[0] = address | 0x80;
buf[1] = data;
return spi_write_then_read(spi, buf, 2, NULL, 0);
}
static int ds3234_get_reg(struct device *dev, unsigned char address,
unsigned char *data)
{
struct spi_device *spi = to_spi_device(dev);
*data = address & 0x7f;
return spi_write_then_read(spi, data, 1, data, 1);
}
static int ds3234_read_time(struct device *dev, struct rtc_time *dt)
{
int err;
unsigned char buf[8];
struct spi_device *spi = to_spi_device(dev);
buf[0] = 0x00; /* Start address */
err = spi_write_then_read(spi, buf, 1, buf, 8);
if (err != 0)
return err;
/* Seconds, Minutes, Hours, Day, Date, Month, Year */
dt->tm_sec = bcd2bin(buf[0]);
dt->tm_min = bcd2bin(buf[1]);
dt->tm_hour = bcd2bin(buf[2] & 0x3f);
dt->tm_wday = bcd2bin(buf[3]) - 1; /* 0 = Sun */
dt->tm_mday = bcd2bin(buf[4]);
dt->tm_mon = bcd2bin(buf[5] & 0x1f) - 1; /* 0 = Jan */
dt->tm_year = bcd2bin(buf[6] & 0xff) + 100; /* Assume 20YY */
return rtc_valid_tm(dt);
}
static int ds3234_set_time(struct device *dev, struct rtc_time *dt)
{
ds3234_set_reg(dev, DS3234_REG_SECONDS, bin2bcd(dt->tm_sec));
ds3234_set_reg(dev, DS3234_REG_MINUTES, bin2bcd(dt->tm_min));
ds3234_set_reg(dev, DS3234_REG_HOURS, bin2bcd(dt->tm_hour) & 0x3f);
/* 0 = Sun */
ds3234_set_reg(dev, DS3234_REG_DAY, bin2bcd(dt->tm_wday + 1));
ds3234_set_reg(dev, DS3234_REG_DATE, bin2bcd(dt->tm_mday));
/* 0 = Jan */
ds3234_set_reg(dev, DS3234_REG_MONTH, bin2bcd(dt->tm_mon + 1));
/* Assume 20YY although we just want to make sure not to go negative. */
if (dt->tm_year > 100)
dt->tm_year -= 100;
ds3234_set_reg(dev, DS3234_REG_YEAR, bin2bcd(dt->tm_year));
return 0;
}
static const struct rtc_class_ops ds3234_rtc_ops = {
.read_time = ds3234_read_time,
.set_time = ds3234_set_time,
};
static int ds3234_probe(struct spi_device *spi)
{
struct rtc_device *rtc;
unsigned char tmp;
int res;
spi->mode = SPI_MODE_3;
spi->bits_per_word = 8;
spi_setup(spi);
res = ds3234_get_reg(&spi->dev, DS3234_REG_SECONDS, &tmp);
if (res != 0)
return res;
/* Control settings
*
* CONTROL_REG
* BIT 7 6 5 4 3 2 1 0
* EOSC BBSQW CONV RS2 RS1 INTCN A2IE A1IE
*
* 0 0 0 1 1 1 0 0
*
* CONTROL_STAT_REG
* BIT 7 6 5 4 3 2 1 0
* OSF BB32kHz CRATE1 CRATE0 EN32kHz BSY A2F A1F
*
* 1 0 0 0 1 0 0 0
*/
ds3234_get_reg(&spi->dev, DS3234_REG_CONTROL, &tmp);
ds3234_set_reg(&spi->dev, DS3234_REG_CONTROL, tmp & 0x1c);
ds3234_get_reg(&spi->dev, DS3234_REG_CONT_STAT, &tmp);
ds3234_set_reg(&spi->dev, DS3234_REG_CONT_STAT, tmp & 0x88);
/* Print our settings */
ds3234_get_reg(&spi->dev, DS3234_REG_CONTROL, &tmp);
dev_info(&spi->dev, "Control Reg: 0x%02x\n", tmp);
ds3234_get_reg(&spi->dev, DS3234_REG_CONT_STAT, &tmp);
dev_info(&spi->dev, "Ctrl/Stat Reg: 0x%02x\n", tmp);
rtc = devm_rtc_device_register(&spi->dev, "ds3234",
&ds3234_rtc_ops, THIS_MODULE);
if (IS_ERR(rtc))
return PTR_ERR(rtc);
spi_set_drvdata(spi, rtc);
return 0;
}
static struct spi_driver ds3234_driver = {
.driver = {
.name = "ds3234",
},
.probe = ds3234_probe,
};
module_spi_driver(ds3234_driver);
MODULE_DESCRIPTION("DS3234 SPI RTC driver");
MODULE_AUTHOR("Dennis Aberilla <denzzzhome@yahoo.com>");
MODULE_LICENSE("GPL");
MODULE_ALIAS("spi:ds3234");
...@@ -9,6 +9,8 @@ ...@@ -9,6 +9,8 @@
#include <linux/platform_device.h> #include <linux/platform_device.h>
#include <linux/rtc.h> #include <linux/rtc.h>
#if defined(CONFIG_M68K) || defined(CONFIG_PARISC) || \
defined(CONFIG_PPC) || defined(CONFIG_SUPERH32)
#include <asm/rtc.h> #include <asm/rtc.h>
static int generic_get_time(struct device *dev, struct rtc_time *tm) static int generic_get_time(struct device *dev, struct rtc_time *tm)
...@@ -33,13 +35,21 @@ static const struct rtc_class_ops generic_rtc_ops = { ...@@ -33,13 +35,21 @@ static const struct rtc_class_ops generic_rtc_ops = {
.read_time = generic_get_time, .read_time = generic_get_time,
.set_time = generic_set_time, .set_time = generic_set_time,
}; };
#else
#define generic_rtc_ops *(struct rtc_class_ops*)NULL
#endif
static int __init generic_rtc_probe(struct platform_device *dev) static int __init generic_rtc_probe(struct platform_device *dev)
{ {
struct rtc_device *rtc; struct rtc_device *rtc;
const struct rtc_class_ops *ops;
ops = dev_get_platdata(&dev->dev);
if (!ops)
ops = &generic_rtc_ops;
rtc = devm_rtc_device_register(&dev->dev, "rtc-generic", rtc = devm_rtc_device_register(&dev->dev, "rtc-generic",
&generic_rtc_ops, THIS_MODULE); ops, THIS_MODULE);
if (IS_ERR(rtc)) if (IS_ERR(rtc))
return PTR_ERR(rtc); return PTR_ERR(rtc);
......
...@@ -144,7 +144,7 @@ static int hym8563_rtc_set_time(struct device *dev, struct rtc_time *tm) ...@@ -144,7 +144,7 @@ static int hym8563_rtc_set_time(struct device *dev, struct rtc_time *tm)
* it does not seem to carry it over a subsequent write/read. * it does not seem to carry it over a subsequent write/read.
* So we'll limit ourself to 100 years, starting at 2000 for now. * So we'll limit ourself to 100 years, starting at 2000 for now.
*/ */
buf[6] = tm->tm_year - 100; buf[6] = bin2bcd(tm->tm_year - 100);
/* /*
* CTL1 only contains TEST-mode bits apart from stop, * CTL1 only contains TEST-mode bits apart from stop,
......
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...@@ -419,4 +419,3 @@ module_platform_driver(mtk_rtc_driver); ...@@ -419,4 +419,3 @@ module_platform_driver(mtk_rtc_driver);
MODULE_LICENSE("GPL v2"); MODULE_LICENSE("GPL v2");
MODULE_AUTHOR("Tianping Fang <tianping.fang@mediatek.com>"); MODULE_AUTHOR("Tianping Fang <tianping.fang@mediatek.com>");
MODULE_DESCRIPTION("RTC Driver for MediaTek MT6397 PMIC"); MODULE_DESCRIPTION("RTC Driver for MediaTek MT6397 PMIC");
MODULE_ALIAS("platform:mt6397-rtc");
...@@ -311,8 +311,7 @@ static int palmas_rtc_probe(struct platform_device *pdev) ...@@ -311,8 +311,7 @@ static int palmas_rtc_probe(struct platform_device *pdev)
ret = devm_request_threaded_irq(&pdev->dev, palmas_rtc->irq, NULL, ret = devm_request_threaded_irq(&pdev->dev, palmas_rtc->irq, NULL,
palmas_rtc_interrupt, palmas_rtc_interrupt,
IRQF_TRIGGER_LOW | IRQF_ONESHOT | IRQF_TRIGGER_LOW | IRQF_ONESHOT,
IRQF_EARLY_RESUME,
dev_name(&pdev->dev), palmas_rtc); dev_name(&pdev->dev), palmas_rtc);
if (ret < 0) { if (ret < 0) {
dev_err(&pdev->dev, "IRQ request failed, err = %d\n", ret); dev_err(&pdev->dev, "IRQ request failed, err = %d\n", ret);
......
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...@@ -178,28 +178,8 @@ static int pcf8523_rtc_read_time(struct device *dev, struct rtc_time *tm) ...@@ -178,28 +178,8 @@ static int pcf8523_rtc_read_time(struct device *dev, struct rtc_time *tm)
if (err < 0) if (err < 0)
return err; return err;
if (regs[0] & REG_SECONDS_OS) { if (regs[0] & REG_SECONDS_OS)
/* return -EINVAL;
* If the oscillator was stopped, try to clear the flag. Upon
* power-up the flag is always set, but if we cannot clear it
* the oscillator isn't running properly for some reason. The
* sensible thing therefore is to return an error, signalling
* that the clock cannot be assumed to be correct.
*/
regs[0] &= ~REG_SECONDS_OS;
err = pcf8523_write(client, REG_SECONDS, regs[0]);
if (err < 0)
return err;
err = pcf8523_read(client, REG_SECONDS, &regs[0]);
if (err < 0)
return err;
if (regs[0] & REG_SECONDS_OS)
return -EAGAIN;
}
tm->tm_sec = bcd2bin(regs[0] & 0x7f); tm->tm_sec = bcd2bin(regs[0] & 0x7f);
tm->tm_min = bcd2bin(regs[1] & 0x7f); tm->tm_min = bcd2bin(regs[1] & 0x7f);
...@@ -235,6 +215,7 @@ static int pcf8523_rtc_set_time(struct device *dev, struct rtc_time *tm) ...@@ -235,6 +215,7 @@ static int pcf8523_rtc_set_time(struct device *dev, struct rtc_time *tm)
return err; return err;
regs[0] = REG_SECONDS; regs[0] = REG_SECONDS;
/* This will purposely overwrite REG_SECONDS_OS */
regs[1] = bin2bcd(tm->tm_sec); regs[1] = bin2bcd(tm->tm_sec);
regs[2] = bin2bcd(tm->tm_min); regs[2] = bin2bcd(tm->tm_min);
regs[3] = bin2bcd(tm->tm_hour); regs[3] = bin2bcd(tm->tm_hour);
......
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...@@ -65,7 +65,6 @@ ...@@ -65,7 +65,6 @@
static const struct i2c_device_id rx8025_id[] = { static const struct i2c_device_id rx8025_id[] = {
{ "rx8025", 0 }, { "rx8025", 0 },
{ "rv8803", 1 },
{ } { }
}; };
MODULE_DEVICE_TABLE(i2c, rx8025_id); MODULE_DEVICE_TABLE(i2c, rx8025_id);
...@@ -147,8 +146,10 @@ static irqreturn_t rx8025_handle_irq(int irq, void *dev_id) ...@@ -147,8 +146,10 @@ static irqreturn_t rx8025_handle_irq(int irq, void *dev_id)
{ {
struct i2c_client *client = dev_id; struct i2c_client *client = dev_id;
struct rx8025_data *rx8025 = i2c_get_clientdata(client); struct rx8025_data *rx8025 = i2c_get_clientdata(client);
struct mutex *lock = &rx8025->rtc->ops_lock;
int status; int status;
mutex_lock(lock);
status = rx8025_read_reg(client, RX8025_REG_CTRL2); status = rx8025_read_reg(client, RX8025_REG_CTRL2);
if (status < 0) if (status < 0)
goto out; goto out;
...@@ -173,6 +174,8 @@ static irqreturn_t rx8025_handle_irq(int irq, void *dev_id) ...@@ -173,6 +174,8 @@ static irqreturn_t rx8025_handle_irq(int irq, void *dev_id)
} }
out: out:
mutex_unlock(lock);
return IRQ_HANDLED; return IRQ_HANDLED;
} }
...@@ -341,7 +344,17 @@ static int rx8025_set_alarm(struct device *dev, struct rtc_wkalrm *t) ...@@ -341,7 +344,17 @@ static int rx8025_set_alarm(struct device *dev, struct rtc_wkalrm *t)
if (client->irq <= 0) if (client->irq <= 0)
return -EINVAL; return -EINVAL;
/* Hardware alarm precision is 1 minute! */ /*
* Hardware alarm precision is 1 minute!
* round up to nearest minute
*/
if (t->time.tm_sec) {
time64_t alarm_time = rtc_tm_to_time64(&t->time);
alarm_time += 60 - t->time.tm_sec;
rtc_time64_to_tm(alarm_time, &t->time);
}
ald[0] = bin2bcd(t->time.tm_min); ald[0] = bin2bcd(t->time.tm_min);
if (rx8025->ctrl1 & RX8025_BIT_CTRL1_1224) if (rx8025->ctrl1 & RX8025_BIT_CTRL1_1224)
ald[1] = bin2bcd(t->time.tm_hour); ald[1] = bin2bcd(t->time.tm_hour);
...@@ -539,8 +552,9 @@ static int rx8025_probe(struct i2c_client *client, ...@@ -539,8 +552,9 @@ static int rx8025_probe(struct i2c_client *client,
if (client->irq > 0) { if (client->irq > 0) {
dev_info(&client->dev, "IRQ %d supplied\n", client->irq); dev_info(&client->dev, "IRQ %d supplied\n", client->irq);
err = devm_request_threaded_irq(&client->dev, client->irq, NULL, err = devm_request_threaded_irq(&client->dev, client->irq, NULL,
rx8025_handle_irq, 0, "rx8025", rx8025_handle_irq,
client); IRQF_ONESHOT,
"rx8025", client);
if (err) { if (err) {
dev_err(&client->dev, "unable to request IRQ, alarms disabled\n"); dev_err(&client->dev, "unable to request IRQ, alarms disabled\n");
client->irq = 0; client->irq = 0;
...@@ -549,6 +563,9 @@ static int rx8025_probe(struct i2c_client *client, ...@@ -549,6 +563,9 @@ static int rx8025_probe(struct i2c_client *client,
rx8025->rtc->max_user_freq = 1; rx8025->rtc->max_user_freq = 1;
/* the rx8025 alarm only supports a minute accuracy */
rx8025->rtc->uie_unsupported = 1;
err = rx8025_sysfs_register(&client->dev); err = rx8025_sysfs_register(&client->dev);
return err; return err;
} }
......
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...@@ -286,7 +286,7 @@ static int tps6586x_rtc_probe(struct platform_device *pdev) ...@@ -286,7 +286,7 @@ static int tps6586x_rtc_probe(struct platform_device *pdev)
ret = devm_request_threaded_irq(&pdev->dev, rtc->irq, NULL, ret = devm_request_threaded_irq(&pdev->dev, rtc->irq, NULL,
tps6586x_rtc_irq, tps6586x_rtc_irq,
IRQF_ONESHOT | IRQF_EARLY_RESUME, IRQF_ONESHOT,
dev_name(&pdev->dev), rtc); dev_name(&pdev->dev), rtc);
if (ret < 0) { if (ret < 0) {
dev_err(&pdev->dev, "request IRQ(%d) failed with ret %d\n", dev_err(&pdev->dev, "request IRQ(%d) failed with ret %d\n",
......
...@@ -268,7 +268,7 @@ static int tps65910_rtc_probe(struct platform_device *pdev) ...@@ -268,7 +268,7 @@ static int tps65910_rtc_probe(struct platform_device *pdev)
} }
ret = devm_request_threaded_irq(&pdev->dev, irq, NULL, ret = devm_request_threaded_irq(&pdev->dev, irq, NULL,
tps65910_rtc_interrupt, IRQF_TRIGGER_LOW | IRQF_EARLY_RESUME, tps65910_rtc_interrupt, IRQF_TRIGGER_LOW,
dev_name(&pdev->dev), &pdev->dev); dev_name(&pdev->dev), &pdev->dev);
if (ret < 0) { if (ret < 0) {
dev_err(&pdev->dev, "IRQ is not free.\n"); dev_err(&pdev->dev, "IRQ is not free.\n");
......
...@@ -287,7 +287,7 @@ static int tps80031_rtc_probe(struct platform_device *pdev) ...@@ -287,7 +287,7 @@ static int tps80031_rtc_probe(struct platform_device *pdev)
ret = devm_request_threaded_irq(&pdev->dev, rtc->irq, NULL, ret = devm_request_threaded_irq(&pdev->dev, rtc->irq, NULL,
tps80031_rtc_irq, tps80031_rtc_irq,
IRQF_ONESHOT | IRQF_EARLY_RESUME, IRQF_ONESHOT,
dev_name(&pdev->dev), rtc); dev_name(&pdev->dev), rtc);
if (ret < 0) { if (ret < 0) {
dev_err(&pdev->dev, "request IRQ:%d failed, err = %d\n", dev_err(&pdev->dev, "request IRQ:%d failed, err = %d\n",
......
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