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Commit 1ca3b45e authored by Thierry Reding's avatar Thierry Reding
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ARM: tegra: Fixup pinmux node names 

Pinmux node names should have a pinmux- prefix and not use underscores.
Fix up some cases that didn't follow those rules.
Signed-off-by: default avatarThierry Reding <treding@nvidia.com>
parent 06888f8b
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Showing with 30 additions and 30 deletions
arch/arm/boot/dts/tegra114-asus-tf701t.dts
View file @ 1ca3b45e
......@@ -80,7 +80,7 @@ panel_secondary: panel@0 {
};
pinmux@70000868 {
asus_pad_ec_default: asus-pad-ec-default {
asus_pad_ec_default: pinmux-asus-pad-ec-default {
ec-interrupt {
nvidia,pins = "kb_col5_pq5";
nvidia,function = "kbc";
......@@ -98,7 +98,7 @@ ec-request {
};
};
backlight_default: backlight-default {
backlight_default: pinmux-backlight-default {
backlight-enable {
nvidia,pins = "gmi_ad10_ph2";
nvidia,function = "gmi";
......@@ -108,7 +108,7 @@ backlight-enable {
};
};
codec_default: codec-default {
codec_default: pinmux-codec-default {
ldo1-en {
nvidia,pins = "sdmmc1_wp_n_pv3";
nvidia,function = "sdmmc1";
......@@ -127,7 +127,7 @@ interrupt {
};
};
gpio_keys_default: gpio-keys-default {
gpio_keys_default: pinmux-gpio-keys-default {
power {
nvidia,pins = "kb_col0_pq0";
nvidia,function = "kbc";
......@@ -146,7 +146,7 @@ volume {
};
};
gpio_hall_sensor_default: gpio-hall-sensor-default {
gpio_hall_sensor_default: pinmux-gpio-hall-sensor-default {
ulpi_data4_po5 {
nvidia,pins = "ulpi_data4_po5";
nvidia,function = "spi2";
......@@ -156,7 +156,7 @@ ulpi_data4_po5 {
};
};
hp_det_default: hp-det-default {
hp_det_default: pinmux-hp-det-default {
gmi_iordy_pi5 {
nvidia,pins = "kb_row7_pr7";
nvidia,function = "rsvd2";
......@@ -166,7 +166,7 @@ gmi_iordy_pi5 {
};
};
imu_default: imu-default {
imu_default: pinmux-imu-default {
kb_row3_pr3 {
nvidia,pins = "kb_row3_pr3";
nvidia,function = "rsvd3";
......@@ -176,7 +176,7 @@ kb_row3_pr3 {
};
};
pwm_default: pwm-default {
pwm_default: pinmux-pwm-default {
gmi_ad9_ph1 {
nvidia,pins = "gmi_ad9_ph1";
nvidia,function = "pwm1";
......@@ -187,7 +187,7 @@ gmi_ad9_ph1 {
};
/* XXX make this something more sensible */
pwm_sleep: pwm-sleep {
pwm_sleep: pinmux-pwm-sleep {
gmi_ad9_ph1 {
nvidia,pins = "gmi_ad9_ph1";
nvidia,function = "pwm1";
......@@ -197,7 +197,7 @@ gmi_ad9_ph1 {
};
};
sdmmc3_default: sdmmc3-default {
sdmmc3_default: pinmux-sdmmc3-default {
sdmmc3_clk_pa6 {
nvidia,pins = "sdmmc3_clk_pa6";
nvidia,function = "sdmmc3";
......@@ -233,7 +233,7 @@ drive_sdio3 {
};
};
sdmmc3_vdd_default: sdmmc3-vdd-default {
sdmmc3_vdd_default: pinmux-sdmmc3-vdd-default {
gmi_clk_pk1 {
nvidia,pins = "gmi_clk_pk1";
nvidia,function = "gmi";
......@@ -243,7 +243,7 @@ gmi_clk_pk1 {
};
};
vdd_lcd_default: vdd-lcd-default {
vdd_lcd_default: pinmux-vdd-lcd-default {
sdmmc4_clk_pcc4 {
nvidia,pins = "sdmmc4_clk_pcc4";
nvidia,function = "sdmmc4";
......
arch/arm/boot/dts/tegra124-nyan-big.dts
View file @ 1ca3b45e
......@@ -39,7 +39,7 @@ pinmux@70000868 {
pinctrl-names = "default";
pinctrl-0 = <&pinmux_default>;
pinmux_default: common {
pinmux_default: pinmux {
clk_32k_out_pa0 {
nvidia,pins = "clk_32k_out_pa0";
nvidia,pull = <TEGRA_PIN_PULL_NONE>;
......
arch/arm/boot/dts/tegra124-nyan-blaze.dts
View file @ 1ca3b45e
......@@ -37,7 +37,7 @@ pinmux@70000868 {
pinctrl-names = "default";
pinctrl-0 = <&pinmux_default>;
pinmux_default: common {
pinmux_default: pinmux {
clk_32k_out_pa0 {
nvidia,pins = "clk_32k_out_pa0";
nvidia,pull = <TEGRA_PIN_PULL_NONE>;
......
arch/arm/boot/dts/tegra124-venice2.dts
View file @ 1ca3b45e
......@@ -70,7 +70,7 @@ pinmux: pinmux@70000868 {
pinctrl-names = "boot";
pinctrl-0 = <&pinmux_boot>;
pinmux_boot: common {
pinmux_boot: pinmux {
dap_mclk1_pw4 {
nvidia,pins = "dap_mclk1_pw4";
nvidia,function = "extperiph1";
......
arch/arm/boot/dts/tegra20-acer-a500-picasso.dts
View file @ 1ca3b45e
......@@ -342,7 +342,7 @@ drive_dbg {
};
};
state_i2cmux_ddc: pinmux_i2cmux_ddc {
state_i2cmux_ddc: pinmux-i2cmux-ddc {
ddc {
nvidia,pins = "ddc";
nvidia,function = "i2c2";
......@@ -353,7 +353,7 @@ pta {
};
};
state_i2cmux_pta: pinmux_i2cmux_pta {
state_i2cmux_pta: pinmux-i2cmux-pta {
ddc {
nvidia,pins = "ddc";
nvidia,function = "rsvd4";
......@@ -364,7 +364,7 @@ pta {
};
};
state_i2cmux_idle: pinmux_i2cmux_idle {
state_i2cmux_idle: pinmux-i2cmux-idle {
ddc {
nvidia,pins = "ddc";
nvidia,function = "rsvd4";
......
arch/arm/boot/dts/tegra20-asus-tf101.dts
View file @ 1ca3b45e
......@@ -399,7 +399,7 @@ drive_csus {
};
};
state_i2cmux_ddc: pinmux_i2cmux_ddc {
state_i2cmux_ddc: pinmux-i2cmux-ddc {
ddc {
nvidia,pins = "ddc";
nvidia,function = "i2c2";
......@@ -411,7 +411,7 @@ pta {
};
};
state_i2cmux_pta: pinmux_i2cmux_pta {
state_i2cmux_pta: pinmux-i2cmux-pta {
ddc {
nvidia,pins = "ddc";
nvidia,function = "rsvd4";
......@@ -423,7 +423,7 @@ pta {
};
};
state_i2cmux_idle: pinmux_i2cmux_idle {
state_i2cmux_idle: pinmux-i2cmux-idle {
ddc {
nvidia,pins = "ddc";
nvidia,function = "rsvd4";
......
arch/arm/boot/dts/tegra20-seaboard.dts
View file @ 1ca3b45e
......@@ -285,7 +285,7 @@ drive_sdio1 {
};
};
state_i2cmux_ddc: pinmux_i2cmux_ddc {
state_i2cmux_ddc: pinmux-i2cmux-ddc {
ddc {
nvidia,pins = "ddc";
nvidia,function = "i2c2";
......@@ -296,7 +296,7 @@ pta {
};
};
state_i2cmux_pta: pinmux_i2cmux_pta {
state_i2cmux_pta: pinmux-i2cmux-pta {
ddc {
nvidia,pins = "ddc";
nvidia,function = "rsvd4";
......@@ -307,7 +307,7 @@ pta {
};
};
state_i2cmux_idle: pinmux_i2cmux_idle {
state_i2cmux_idle: pinmux-i2cmux-idle {
ddc {
nvidia,pins = "ddc";
nvidia,function = "rsvd4";
......
arch/arm/boot/dts/tegra20-tamonten.dtsi
View file @ 1ca3b45e
......@@ -249,7 +249,7 @@ conf_ld17_0 {
};
};
state_i2cmux_ddc: pinmux_i2cmux_ddc {
state_i2cmux_ddc: pinmux-i2cmux-ddc {
ddc {
nvidia,pins = "ddc";
nvidia,function = "i2c2";
......@@ -260,7 +260,7 @@ pta {
};
};
state_i2cmux_pta: pinmux_i2cmux_pta {
state_i2cmux_pta: pinmux-i2cmux-pta {
ddc {
nvidia,pins = "ddc";
nvidia,function = "rsvd4";
......@@ -271,7 +271,7 @@ pta {
};
};
state_i2cmux_idle: pinmux_i2cmux_idle {
state_i2cmux_idle: pinmux-i2cmux-idle {
ddc {
nvidia,pins = "ddc";
nvidia,function = "rsvd4";
......
arch/arm/boot/dts/tegra20-ventana.dts
View file @ 1ca3b45e
......@@ -284,7 +284,7 @@ drive_sdio1 {
};
};
state_i2cmux_ddc: pinmux_i2cmux_ddc {
state_i2cmux_ddc: pinmux-i2cmux-ddc {
ddc {
nvidia,pins = "ddc";
nvidia,function = "i2c2";
......@@ -295,7 +295,7 @@ pta {
};
};
state_i2cmux_pta: pinmux_i2cmux_pta {
state_i2cmux_pta: pinmux-i2cmux-pta {
ddc {
nvidia,pins = "ddc";
nvidia,function = "rsvd4";
......@@ -306,7 +306,7 @@ pta {
};
};
state_i2cmux_idle: pinmux_i2cmux_idle {
state_i2cmux_idle: pinmux-i2cmux-idle {
ddc {
nvidia,pins = "ddc";
nvidia,function = "rsvd4";
......
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