Commit 531d2644 authored by Linus Torvalds's avatar Linus Torvalds

Merge tag 'devicetree-for-6.2' of git://git.kernel.org/pub/scm/linux/kernel/git/robh/linux

Pull devicetree updates from Rob Herring:
 "DT Bindings:

   - Various LED binding conversions and clean-ups. Convert the
     ir-spi-led, pwm-ir-tx, and gpio-ir-tx LED bindings to schemas.
     Consistently reference LED common.yaml or multi-led schemas and
     disallow undefined properties.

   - Convert IDT 89HPESx, pwm-clock, st,stmipid02, Xilinx PCIe hosts,
     and fsl,imx-fb bindings to schema

   - Add ata-generic, Broadcom u-boot environment, and dynamic MTD
     sub-partitions bindings.

   - Make all SPI based displays reference spi-peripheral-props.yaml

   - Fix some schema property regex's which should be fixed strings or
     were missing start/end anchors

   - Remove 'status' in examples, again...

  DT Core:

   - Fix a possible NULL dereference in overlay functions

   - Fix kexec reading 32-bit "linux,initrd-{start,end}" values (which
     never worked)

   - Add of_address_count() helper to count number of 'reg' entries

   - Support .dtso extension for DT overlay source files. Rename staging
     and unittest overlay files.

   - Update dtc to upstream v1.6.1-63-g55778a03df61"

* tag 'devicetree-for-6.2' of git://git.kernel.org/pub/scm/linux/kernel/git/robh/linux: (42 commits)
  dt-bindings: leds: Add missing references to common LED schema
  dt-bindings: leds: intel,lgm: Add missing 'led-gpios' property
  of: overlay: fix null pointer dereferencing in find_dup_cset_node_entry() and find_dup_cset_prop()
  dt-bindings: lcdif: Fix constraints for imx8mp
  media: dt-bindings: atmel,isc: Drop unneeded unevaluatedProperties
  dt-bindings: Drop Jee Heng Sia
  dt-bindings: thermal: cooling-devices: Add missing cache related properties
  dt-bindings: leds: irled: ir-spi-led: convert to DT schema
  dt-bindings: leds: irled: pwm-ir-tx: convert to DT schema
  dt-bindings: leds: irled: gpio-ir-tx: convert to DT schema
  dt-bindings: leds: mt6360: rework to match multi-led
  dt-bindings: leds: lp55xx: rework to match multi-led
  dt-bindings: leds: lp55xx: switch to preferred 'gpios' suffix
  dt-bindings: leds: lp55xx: allow label
  dt-bindings: leds: use unevaluatedProperties for common.yaml
  dt-bindings: thermal: tsens: Add SM6115 compatible
  of/kexec: Fix reading 32-bit "linux,initrd-{start,end}" values
  dt-bindings: display: Convert fsl,imx-fb.txt to dt-schema
  dt-bindings: Add missing start and/or end of line regex anchors
  dt-bindings: qcom,pdc: Add missing compatibles
  ...
parents 4d03390b 580f9896
...@@ -47,5 +47,4 @@ examples: ...@@ -47,5 +47,4 @@ examples:
compatible = "nvidia,tegra234-ccplex-cluster"; compatible = "nvidia,tegra234-ccplex-cluster";
reg = <0x0e000000 0x5ffff>; reg = <0x0e000000 0x5ffff>;
nvidia,bpmp = <&bpmp>; nvidia,bpmp = <&bpmp>;
status = "okay";
}; };
...@@ -123,6 +123,33 @@ properties: ...@@ -123,6 +123,33 @@ properties:
some PLLs, clocks and then brings up CPU0 for resuming the some PLLs, clocks and then brings up CPU0 for resuming the
system. system.
core-supply:
description:
Phandle to voltage regulator connected to the SoC Core power rail.
core-domain:
type: object
description: |
The vast majority of hardware blocks of Tegra SoC belong to a
Core power domain, which has a dedicated voltage rail that powers
the blocks.
properties:
operating-points-v2:
description:
Should contain level, voltages and opp-supported-hw property.
The supported-hw is a bitfield indicating SoC speedo or process
ID mask.
"#power-domain-cells":
const: 0
required:
- operating-points-v2
- "#power-domain-cells"
additionalProperties: false
i2c-thermtrip: i2c-thermtrip:
type: object type: object
description: description:
...@@ -300,33 +327,6 @@ patternProperties: ...@@ -300,33 +327,6 @@ patternProperties:
additionalProperties: false additionalProperties: false
core-domain:
type: object
description: |
The vast majority of hardware blocks of Tegra SoC belong to a
Core power domain, which has a dedicated voltage rail that powers
the blocks.
properties:
operating-points-v2:
description:
Should contain level, voltages and opp-supported-hw property.
The supported-hw is a bitfield indicating SoC speedo or process
ID mask.
"#power-domain-cells":
const: 0
required:
- operating-points-v2
- "#power-domain-cells"
additionalProperties: false
core-supply:
description:
Phandle to voltage regulator connected to the SoC Core power rail.
required: required:
- compatible - compatible
- reg - reg
......
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
%YAML 1.2
---
$id: http://devicetree.org/schemas/ata/ata-generic.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
title: Generic Parallel ATA Controller
maintainers:
- Linus Walleij <linus.walleij@linaro.org>
description:
Generic Parallel ATA controllers supporting PIO modes only.
properties:
compatible:
items:
- enum:
- arm,vexpress-cf
- fsl,mpc8349emitx-pata
- const: ata-generic
reg:
items:
- description: Command interface registers
- description: Control interface registers
reg-shift:
enum: [ 1, 2 ]
interrupts:
maxItems: 1
ata-generic,use16bit:
type: boolean
description: Use 16-bit accesses instead of 32-bit for data transfers
pio-mode:
description: Maximum ATA PIO transfer mode
$ref: /schemas/types.yaml#/definitions/uint32
maximum: 6
default: 0
required:
- compatible
- reg
additionalProperties: false
examples:
- |
compact-flash@1a000 {
compatible = "arm,vexpress-cf", "ata-generic";
reg = <0x1a000 0x100>,
<0x1a100 0xf00>;
reg-shift = <2>;
};
...
Binding for an external clock signal driven by a PWM pin.
This binding uses the common clock binding[1] and the common PWM binding[2].
[1] Documentation/devicetree/bindings/clock/clock-bindings.txt
[2] Documentation/devicetree/bindings/pwm/pwm.txt
Required properties:
- compatible : shall be "pwm-clock".
- #clock-cells : from common clock binding; shall be set to 0.
- pwms : from common PWM binding; this determines the clock frequency
via the period given in the PWM specifier.
Optional properties:
- clock-output-names : From common clock binding.
- clock-frequency : Exact output frequency, in case the PWM period
is not exact but was rounded to nanoseconds.
Example:
clock {
compatible = "pwm-clock";
#clock-cells = <0>;
clock-frequency = <25000000>;
clock-output-names = "mipi_mclk";
pwms = <&pwm2 0 40>; /* 1 / 40 ns = 25 MHz */
};
# SPDX-License-Identifier: GPL-2.0
%YAML 1.2
---
$id: http://devicetree.org/schemas/clock/pwm-clock.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
title: An external clock signal driven by a PWM pin.
maintainers:
- Philipp Zabel <p.zabel@pengutronix.de>
properties:
compatible:
const: pwm-clock
'#clock-cells':
const: 0
clock-frequency:
description: Exact output frequency, in case the PWM period is not exact
but was rounded to nanoseconds.
clock-output-names:
maxItems: 1
pwms:
maxItems: 1
required:
- compatible
- '#clock-cells'
- pwms
additionalProperties: false
examples:
- |
clock {
compatible = "pwm-clock";
#clock-cells = <0>;
clock-frequency = <25000000>;
clock-output-names = "mipi_mclk";
pwms = <&pwm2 0 40>; /* 1 / 40 ns = 25 MHz */
};
...
...@@ -38,7 +38,7 @@ properties: ...@@ -38,7 +38,7 @@ properties:
type: object type: object
patternProperties: patternProperties:
'cpu@[0-9a-f]+': '^cpu@[0-9a-f]+$':
type: object type: object
properties: properties:
......
...@@ -52,6 +52,9 @@ properties: ...@@ -52,6 +52,9 @@ properties:
interrupts: interrupts:
maxItems: 1 maxItems: 1
power-domains:
maxItems: 1
port: port:
$ref: /schemas/graph.yaml#/properties/port $ref: /schemas/graph.yaml#/properties/port
description: The LCDIF output port description: The LCDIF output port
...@@ -81,7 +84,31 @@ allOf: ...@@ -81,7 +84,31 @@ allOf:
maxItems: 3 maxItems: 3
required: required:
- clock-names - clock-names
else: - if:
properties:
compatible:
contains:
const: fsl,imx8mp-lcdif
then:
properties:
clocks:
minItems: 3
maxItems: 3
clock-names:
minItems: 3
maxItems: 3
required:
- clock-names
- power-domains
- if:
not:
properties:
compatible:
contains:
enum:
- fsl,imx6sx-lcdif
- fsl,imx8mp-lcdif
then:
properties: properties:
clocks: clocks:
maxItems: 1 maxItems: 1
......
Freescale imx21 Framebuffer
This framebuffer driver supports devices imx1, imx21, imx25, and imx27.
Required properties:
- compatible : "fsl,<chip>-fb", chip should be imx1 or imx21
- reg : Should contain 1 register ranges(address and length)
- interrupts : One interrupt of the fb dev
Required nodes:
- display: Phandle to a display node as described in
Documentation/devicetree/bindings/display/panel/display-timing.txt
Additional, the display node has to define properties:
- bits-per-pixel: Bits per pixel
- fsl,pcr: LCDC PCR value
A display node may optionally define
- fsl,aus-mode: boolean to enable AUS mode (only for imx21)
Optional properties:
- lcd-supply: Regulator for LCD supply voltage.
- fsl,dmacr: DMA Control Register value. This is optional. By default, the
register is not modified as recommended by the datasheet.
- fsl,lpccr: Contrast Control Register value. This property provides the
default value for the contrast control register.
If that property is omitted, the register is zeroed.
- fsl,lscr1: LCDC Sharp Configuration Register value.
Example:
imxfb: fb@10021000 {
compatible = "fsl,imx21-fb";
interrupts = <61>;
reg = <0x10021000 0x1000>;
display = <&display0>;
};
...
display0: display0 {
model = "Primeview-PD050VL1";
bits-per-pixel = <16>;
fsl,pcr = <0xf0c88080>; /* non-standard but required */
display-timings {
native-mode = <&timing_disp0>;
timing_disp0: 640x480 {
hactive = <640>;
vactive = <480>;
hback-porch = <112>;
hfront-porch = <36>;
hsync-len = <32>;
vback-porch = <33>;
vfront-porch = <33>;
vsync-len = <2>;
clock-frequency = <25000000>;
};
};
};
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
%YAML 1.2
---
$id: http://devicetree.org/schemas/display/imx/fsl,imx-lcdc.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
title: Freescale i.MX LCD Controller, found on i.MX1, i.MX21, i.MX25 and i.MX27
maintainers:
- Sascha Hauer <s.hauer@pengutronix.de>
- Pengutronix Kernel Team <kernel@pengutronix.de>
properties:
compatible:
oneOf:
- enum:
- fsl,imx1-fb
- fsl,imx21-fb
- items:
- enum:
- fsl,imx25-fb
- fsl,imx27-fb
- const: fsl,imx21-fb
clocks:
maxItems: 3
clock-names:
items:
- const: ipg
- const: ahb
- const: per
display:
$ref: /schemas/types.yaml#/definitions/phandle
interrupts:
maxItems: 1
reg:
maxItems: 1
lcd-supply:
description:
Regulator for LCD supply voltage.
fsl,dmacr:
$ref: /schemas/types.yaml#/definitions/uint32
description:
Override value for DMA Control Register
fsl,lpccr:
$ref: /schemas/types.yaml#/definitions/uint32
description:
Contrast Control Register value.
fsl,lscr1:
$ref: /schemas/types.yaml#/definitions/uint32
description:
LCDC Sharp Configuration Register value.
required:
- compatible
- clocks
- clock-names
- display
- interrupts
- reg
additionalProperties: false
examples:
- |
imxfb: fb@10021000 {
compatible = "fsl,imx21-fb";
interrupts = <61>;
reg = <0x10021000 0x1000>;
display = <&display0>;
clocks = <&clks 103>, <&clks 49>, <&clks 66>;
clock-names = "ipg", "ahb", "per";
};
display0: display0 {
model = "Primeview-PD050VL1";
bits-per-pixel = <16>;
fsl,pcr = <0xf0c88080>; /* non-standard but required */
display-timings {
native-mode = <&timing_disp0>;
timing_disp0: timing0 {
hactive = <640>;
vactive = <480>;
hback-porch = <112>;
hfront-porch = <36>;
hsync-len = <32>;
vback-porch = <33>;
vfront-porch = <33>;
vsync-len = <2>;
clock-frequency = <25000000>;
};
};
};
...@@ -15,6 +15,7 @@ description: ...@@ -15,6 +15,7 @@ description:
allOf: allOf:
- $ref: panel-common.yaml# - $ref: panel-common.yaml#
- $ref: /schemas/spi/spi-peripheral-props.yaml#
properties: properties:
compatible: compatible:
...@@ -41,7 +42,7 @@ required: ...@@ -41,7 +42,7 @@ required:
- dc-gpios - dc-gpios
- reset-gpios - reset-gpios
additionalProperties: false unevaluatedProperties: false
examples: examples:
- | - |
......
...@@ -16,6 +16,7 @@ description: | ...@@ -16,6 +16,7 @@ description: |
allOf: allOf:
- $ref: panel-common.yaml# - $ref: panel-common.yaml#
- $ref: /schemas/spi/spi-peripheral-props.yaml#
properties: properties:
compatible: compatible:
......
...@@ -15,6 +15,7 @@ maintainers: ...@@ -15,6 +15,7 @@ maintainers:
allOf: allOf:
- $ref: panel-common.yaml# - $ref: panel-common.yaml#
- $ref: /schemas/spi/spi-peripheral-props.yaml#
properties: properties:
compatible: compatible:
...@@ -34,7 +35,7 @@ required: ...@@ -34,7 +35,7 @@ required:
- reset-gpios - reset-gpios
- port - port
additionalProperties: false unevaluatedProperties: false
examples: examples:
- | - |
......
...@@ -9,14 +9,13 @@ title: Samsung LMS380KF01 display panel ...@@ -9,14 +9,13 @@ title: Samsung LMS380KF01 display panel
description: The LMS380KF01 is a 480x800 DPI display panel from Samsung Mobile description: The LMS380KF01 is a 480x800 DPI display panel from Samsung Mobile
Displays (SMD) utilizing the WideChips WS2401 display controller. It can be Displays (SMD) utilizing the WideChips WS2401 display controller. It can be
used with internal or external backlight control. used with internal or external backlight control.
The panel must obey the rules for a SPI slave device as specified in
spi/spi-controller.yaml
maintainers: maintainers:
- Linus Walleij <linus.walleij@linaro.org> - Linus Walleij <linus.walleij@linaro.org>
allOf: allOf:
- $ref: panel-common.yaml# - $ref: panel-common.yaml#
- $ref: /schemas/spi/spi-peripheral-props.yaml#
properties: properties:
compatible: compatible:
...@@ -59,7 +58,7 @@ required: ...@@ -59,7 +58,7 @@ required:
- spi-cpol - spi-cpol
- port - port
additionalProperties: false unevaluatedProperties: false
examples: examples:
- | - |
......
...@@ -14,6 +14,7 @@ maintainers: ...@@ -14,6 +14,7 @@ maintainers:
allOf: allOf:
- $ref: panel-common.yaml# - $ref: panel-common.yaml#
- $ref: /schemas/spi/spi-peripheral-props.yaml#
properties: properties:
compatible: compatible:
...@@ -51,7 +52,7 @@ required: ...@@ -51,7 +52,7 @@ required:
- spi-cpol - spi-cpol
- port - port
additionalProperties: false unevaluatedProperties: false
examples: examples:
- | - |
......
...@@ -7,14 +7,14 @@ $schema: http://devicetree.org/meta-schemas/core.yaml# ...@@ -7,14 +7,14 @@ $schema: http://devicetree.org/meta-schemas/core.yaml#
title: Samsung S6D27A1 display panel title: Samsung S6D27A1 display panel
description: The S6D27A1 is a 480x800 DPI display panel from Samsung Mobile description: The S6D27A1 is a 480x800 DPI display panel from Samsung Mobile
Displays (SMD). The panel must obey the rules for a SPI slave device Displays (SMD).
as specified in spi/spi-controller.yaml
maintainers: maintainers:
- Markuss Broks <markuss.broks@gmail.com> - Markuss Broks <markuss.broks@gmail.com>
allOf: allOf:
- $ref: panel-common.yaml# - $ref: panel-common.yaml#
- $ref: /schemas/spi/spi-peripheral-props.yaml#
properties: properties:
compatible: compatible:
......
...@@ -41,6 +41,7 @@ description: |+ ...@@ -41,6 +41,7 @@ description: |+
allOf: allOf:
- $ref: panel-common.yaml# - $ref: panel-common.yaml#
- $ref: /schemas/spi/spi-peripheral-props.yaml#
properties: properties:
compatible: compatible:
......
...@@ -128,7 +128,6 @@ examples: ...@@ -128,7 +128,6 @@ examples:
resets = <&tegra_car 181>; resets = <&tegra_car 181>;
reset-names = "dpaux"; reset-names = "dpaux";
power-domains = <&pd_sor>; power-domains = <&pd_sor>;
status = "disabled";
state_dpaux_aux: pinmux-aux { state_dpaux_aux: pinmux-aux {
groups = "dpaux-io"; groups = "dpaux-io";
......
...@@ -138,7 +138,6 @@ examples: ...@@ -138,7 +138,6 @@ examples:
<&bpmp TEGRA186_CLK_NVDISPLAY_DSC>, <&bpmp TEGRA186_CLK_NVDISPLAY_DSC>,
<&bpmp TEGRA186_CLK_NVDISPLAYHUB>; <&bpmp TEGRA186_CLK_NVDISPLAYHUB>;
clock-names = "disp", "dsc", "hub"; clock-names = "disp", "dsc", "hub";
status = "disabled";
power-domains = <&bpmp TEGRA186_POWER_DOMAIN_DISP>; power-domains = <&bpmp TEGRA186_POWER_DOMAIN_DISP>;
...@@ -227,7 +226,6 @@ examples: ...@@ -227,7 +226,6 @@ examples:
clocks = <&bpmp TEGRA194_CLK_NVDISPLAY_DISP>, clocks = <&bpmp TEGRA194_CLK_NVDISPLAY_DISP>,
<&bpmp TEGRA194_CLK_NVDISPLAYHUB>; <&bpmp TEGRA194_CLK_NVDISPLAYHUB>;
clock-names = "disp", "hub"; clock-names = "disp", "hub";
status = "disabled";
power-domains = <&bpmp TEGRA194_POWER_DOMAIN_DISP>; power-domains = <&bpmp TEGRA194_POWER_DOMAIN_DISP>;
......
...@@ -8,7 +8,6 @@ title: Synopsys DesignWare AXI DMA Controller ...@@ -8,7 +8,6 @@ title: Synopsys DesignWare AXI DMA Controller
maintainers: maintainers:
- Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com> - Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com>
- Jee Heng Sia <jee.heng.sia@intel.com>
description: description:
Synopsys DesignWare AXI DMA Controller DT Binding Synopsys DesignWare AXI DMA Controller DT Binding
......
...@@ -61,7 +61,7 @@ patternProperties: ...@@ -61,7 +61,7 @@ patternProperties:
$ref: /schemas/types.yaml#/definitions/uint32 $ref: /schemas/types.yaml#/definitions/uint32
enum: [0, 1] enum: [0, 1]
"adi,pin(5|10)-function": "^adi,pin(5|10)-function$":
description: | description: |
Configures the function for pin 5 on the adi,adt7473 and adi,adt7475. Or Configures the function for pin 5 on the adi,adt7473 and adi,adt7475. Or
pin 10 on the adi,adt7476 and adi,adt7490. pin 10 on the adi,adt7476 and adi,adt7490.
...@@ -70,7 +70,7 @@ patternProperties: ...@@ -70,7 +70,7 @@ patternProperties:
- pwm2 - pwm2
- smbalert# - smbalert#
"adi,pin(9|14)-function": "^adi,pin(9|14)-function$":
description: | description: |
Configures the function for pin 9 on the adi,adt7473 and adi,adt7475. Or Configures the function for pin 9 on the adi,adt7473 and adi,adt7475. Or
pin 14 on the adi,adt7476 and adi,adt7490 pin 14 on the adi,adt7476 and adi,adt7490
......
...@@ -114,7 +114,6 @@ examples: ...@@ -114,7 +114,6 @@ examples:
#size-cells = <0>; #size-cells = <0>;
cs-gpios = <&gpio 17 GPIO_ACTIVE_LOW>; cs-gpios = <&gpio 17 GPIO_ACTIVE_LOW>;
status = "okay";
ad74413r@0 { ad74413r@0 {
compatible = "adi,ad74413r"; compatible = "adi,ad74413r";
......
...@@ -90,7 +90,6 @@ properties: ...@@ -90,7 +90,6 @@ properties:
maximum: 5 maximum: 5
cpus: cpus:
$ref: /schemas/types.yaml#/definitions/phandle-array
description: description:
Should be a list of phandles to CPU nodes (as described in Should be a list of phandles to CPU nodes (as described in
Documentation/devicetree/bindings/arm/cpus.yaml). Documentation/devicetree/bindings/arm/cpus.yaml).
......
...@@ -28,11 +28,15 @@ properties: ...@@ -28,11 +28,15 @@ properties:
- enum: - enum:
- qcom,sc7180-pdc - qcom,sc7180-pdc
- qcom,sc7280-pdc - qcom,sc7280-pdc
- qcom,sc8280xp-pdc
- qcom,sdm845-pdc - qcom,sdm845-pdc
- qcom,sdx55-pdc
- qcom,sdx65-pdc
- qcom,sm6350-pdc - qcom,sm6350-pdc
- qcom,sm8150-pdc - qcom,sm8150-pdc
- qcom,sm8250-pdc - qcom,sm8250-pdc
- qcom,sm8350-pdc - qcom,sm8350-pdc
- qcom,sm8450-pdc
- const: qcom,pdc - const: qcom,pdc
reg: reg:
......
...@@ -29,6 +29,7 @@ properties: ...@@ -29,6 +29,7 @@ properties:
- renesas,ipmmu-r8a7793 # R-Car M2-N - renesas,ipmmu-r8a7793 # R-Car M2-N
- renesas,ipmmu-r8a7794 # R-Car E2 - renesas,ipmmu-r8a7794 # R-Car E2
- const: renesas,ipmmu-vmsa # R-Mobile APE6 or R-Car Gen2 or RZ/G1 - const: renesas,ipmmu-vmsa # R-Mobile APE6 or R-Car Gen2 or RZ/G1
- items: - items:
- enum: - enum:
- renesas,ipmmu-r8a774a1 # RZ/G2M - renesas,ipmmu-r8a774a1 # RZ/G2M
...@@ -43,10 +44,11 @@ properties: ...@@ -43,10 +44,11 @@ properties:
- renesas,ipmmu-r8a77980 # R-Car V3H - renesas,ipmmu-r8a77980 # R-Car V3H
- renesas,ipmmu-r8a77990 # R-Car E3 - renesas,ipmmu-r8a77990 # R-Car E3
- renesas,ipmmu-r8a77995 # R-Car D3 - renesas,ipmmu-r8a77995 # R-Car D3
- renesas,ipmmu-r8a779a0 # R-Car V3U
- items: - items:
- enum: - enum:
- renesas,ipmmu-r8a779f0 # R-Car S4-8 - renesas,ipmmu-r8a779a0 # R-Car V3U
- renesas,ipmmu-r8a779f0 # R-Car S4-8
- const: renesas,rcar-gen4-ipmmu-vmsa # R-Car Gen4 - const: renesas,rcar-gen4-ipmmu-vmsa # R-Car Gen4
reg: reg:
......
Device tree bindings for IR LED connected through gpio pin which is used as
remote controller transmitter.
Required properties:
- compatible: should be "gpio-ir-tx".
- gpios : Should specify the IR LED GPIO, see "gpios property" in
Documentation/devicetree/bindings/gpio/gpio.txt. Active low LEDs
should be indicated using flags in the GPIO specifier.
Example:
irled@0 {
compatible = "gpio-ir-tx";
gpios = <&gpio1 2 GPIO_ACTIVE_HIGH>;
};
# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
%YAML 1.2
---
$id: http://devicetree.org/schemas/leds/irled/gpio-ir-tx.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
title: IR LED connected through GPIO pin
maintainers:
- Sean Young <sean@mess.org>
description:
IR LED connected through GPIO pin which is used as remote controller
transmitter.
properties:
compatible:
const: gpio-ir-tx
gpios:
maxItems: 1
required:
- compatible
- gpios
additionalProperties: false
examples:
- |
#include <dt-bindings/gpio/gpio.h>
irled {
compatible = "gpio-ir-tx";
gpios = <&gpio1 2 GPIO_ACTIVE_HIGH>;
};
# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
%YAML 1.2
---
$id: http://devicetree.org/schemas/leds/irled/ir-spi-led.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
title: IR LED connected through SPI bus
maintainers:
- Sean Young <sean@mess.org>
description:
IR LED switch is connected to the MOSI line of the SPI device and the data
is delivered through that.
allOf:
- $ref: /schemas/spi/spi-peripheral-props.yaml#
properties:
compatible:
const: ir-spi-led
reg:
maxItems: 1
duty-cycle:
$ref: /schemas/types.yaml#/definitions/uint8
enum: [50, 60, 70, 75, 80, 90]
description:
Percentage of one period in which the signal is active.
led-active-low:
type: boolean
description:
Output is negated with a NOT gate.
power-supply: true
required:
- compatible
- reg
unevaluatedProperties: false
examples:
- |
spi {
#address-cells = <1>;
#size-cells = <0>;
irled@0 {
compatible = "ir-spi-led";
reg = <0x0>;
duty-cycle = /bits/ 8 <60>;
led-active-low;
power-supply = <&irda_regulator>;
spi-max-frequency = <5000000>;
};
};
Device tree bindings for IR LED connected through pwm pin which is used as
remote controller transmitter.
Required properties:
- compatible: should be "pwm-ir-tx".
- pwms : PWM property to point to the PWM device (phandle)/port (id)
and to specify the period time to be used: <&phandle id period_ns>;
Example:
irled {
compatible = "pwm-ir-tx";
pwms = <&pwm0 0 10000000>;
};
# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
%YAML 1.2
---
$id: http://devicetree.org/schemas/leds/irled/pwm-ir-tx.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
title: IR LED connected through PWM pin
maintainers:
- Sean Young <sean@mess.org>
description:
IR LED connected through PWM pin which is used as remote controller
transmitter.
properties:
compatible:
const: pwm-ir-tx
pwms:
maxItems: 1
required:
- compatible
- pwms
additionalProperties: false
examples:
- |
irled {
compatible = "pwm-ir-tx";
pwms = <&pwm0 0 10000000>;
};
Device tree bindings for IR LED connected through SPI bus which is used as
remote controller.
The IR LED switch is connected to the MOSI line of the SPI device and the data
are delivered thourgh that.
Required properties:
- compatible: should be "ir-spi-led".
Optional properties:
- duty-cycle: 8 bit value that represents the percentage of one period
in which the signal is active. It can be 50, 60, 70, 75, 80 or 90.
- led-active-low: boolean value that specifies whether the output is
negated with a NOT gate.
- power-supply: specifies the power source. It can either be a regulator
or a gpio which enables a regulator, i.e. a regulator-fixed as
described in
Documentation/devicetree/bindings/regulator/fixed-regulator.yaml
Example:
irled@0 {
compatible = "ir-spi-led";
reg = <0x0>;
spi-max-frequency = <5000000>;
power-supply = <&vdd_led>;
led-active-low;
duty-cycle = /bits/ 8 <60>;
};
...@@ -57,6 +57,7 @@ patternProperties: ...@@ -57,6 +57,7 @@ patternProperties:
"^led@[1-9]$": "^led@[1-9]$":
type: object type: object
$ref: common.yaml# $ref: common.yaml#
unevaluatedProperties: false
properties: properties:
reg: reg:
......
...@@ -33,6 +33,7 @@ patternProperties: ...@@ -33,6 +33,7 @@ patternProperties:
"^led@[0-2]$": "^led@[0-2]$":
type: object type: object
$ref: common.yaml# $ref: common.yaml#
unevaluatedProperties: false
properties: properties:
reg: reg:
......
...@@ -23,8 +23,8 @@ patternProperties: ...@@ -23,8 +23,8 @@ patternProperties:
# node name to at least catch some child nodes. # node name to at least catch some child nodes.
"(^led-[0-9a-f]$|led)": "(^led-[0-9a-f]$|led)":
type: object type: object
$ref: common.yaml# $ref: common.yaml#
unevaluatedProperties: false
properties: properties:
gpios: gpios:
......
...@@ -56,7 +56,8 @@ properties: ...@@ -56,7 +56,8 @@ properties:
patternProperties: patternProperties:
"^led@[0-2]$": "^led@[0-2]$":
type: object $ref: common.yaml#
unevaluatedProperties: false
properties: properties:
reg: reg:
...@@ -64,6 +65,9 @@ properties: ...@@ -64,6 +65,9 @@ properties:
minimum: 0 minimum: 0
maximum: 2 maximum: 2
led-gpios:
maxItems: 1
intel,sso-hw-trigger: intel,sso-hw-trigger:
type: boolean type: boolean
description: This property indicates Hardware driven/control LED. description: This property indicates Hardware driven/control LED.
...@@ -118,14 +122,14 @@ examples: ...@@ -118,14 +122,14 @@ examples:
reg = <0>; reg = <0>;
function = "gphy"; function = "gphy";
color = <LED_COLOR_ID_GREEN>; color = <LED_COLOR_ID_GREEN>;
led-gpio = <&ssogpio 0 0>; led-gpios = <&ssogpio 0 0>;
}; };
led@2 { led@2 {
reg = <2>; reg = <2>;
function = LED_FUNCTION_POWER; function = LED_FUNCTION_POWER;
color = <LED_COLOR_ID_GREEN>; color = <LED_COLOR_ID_GREEN>;
led-gpio = <&ssogpio 23 0>; led-gpios = <&ssogpio 23 0>;
}; };
}; };
}; };
...@@ -77,6 +77,14 @@ patternProperties: ...@@ -77,6 +77,14 @@ patternProperties:
"^led@[0-9a-f]+$": "^led@[0-9a-f]+$":
type: object type: object
$ref: common.yaml# $ref: common.yaml#
unevaluatedProperties: false
properties:
reg:
maxItems: 1
required:
- reg
required: required:
- compatible - compatible
......
...@@ -43,11 +43,13 @@ properties: ...@@ -43,11 +43,13 @@ properties:
- 1 # internal - 1 # internal
- 2 # external - 2 # external
enable-gpio: enable-gpios:
maxItems: 1 maxItems: 1
description: | description: |
GPIO attached to the chip's enable pin GPIO attached to the chip's enable pin
label: true
pwr-sel: pwr-sel:
$ref: /schemas/types.yaml#/definitions/uint8 $ref: /schemas/types.yaml#/definitions/uint8
description: | description: |
...@@ -65,9 +67,50 @@ properties: ...@@ -65,9 +67,50 @@ properties:
const: 0 const: 0
patternProperties: patternProperties:
"(^led@[0-9a-f]$|led)": '^multi-led@[0-8]$':
type: object
$ref: leds-class-multicolor.yaml#
unevaluatedProperties: false
properties:
reg:
maximum: 8
'#address-cells':
const: 1
'#size-cells':
const: 0
patternProperties:
"^led@[0-8]$":
type: object
$ref: common.yaml#
unevaluatedProperties: false
properties:
led-cur:
$ref: /schemas/types.yaml#/definitions/uint8
description: |
Current setting at each LED channel (mA x10, 0 if LED is not connected)
minimum: 0
maximum: 255
max-cur:
$ref: /schemas/types.yaml#/definitions/uint8
description: Maximun current at each LED channel.
reg:
maximum: 8
required:
- reg
"^led@[0-8]$":
type: object type: object
$ref: common.yaml# $ref: common.yaml#
unevaluatedProperties: false
properties: properties:
led-cur: led-cur:
$ref: /schemas/types.yaml#/definitions/uint8 $ref: /schemas/types.yaml#/definitions/uint8
......
...@@ -30,9 +30,8 @@ properties: ...@@ -30,9 +30,8 @@ properties:
patternProperties: patternProperties:
"^led@[0-2]$": "^led@[0-2]$":
type: object $ref: common.yaml#
description: | unevaluatedProperties: false
Properties for a single LED.
properties: properties:
reg: reg:
...@@ -41,10 +40,6 @@ patternProperties: ...@@ -41,10 +40,6 @@ patternProperties:
minimum: 0 minimum: 0
maximum: 2 maximum: 2
label: true
linux,default-trigger: true
required: required:
- compatible - compatible
- "#address-cells" - "#address-cells"
......
...@@ -26,11 +26,10 @@ properties: ...@@ -26,11 +26,10 @@ properties:
const: 0 const: 0
patternProperties: patternProperties:
"^(multi-)?led@[0-5]$": "^multi-led@[0-5]$":
type: object type: object
$ref: common.yaml# $ref: leds-class-multicolor.yaml#
description: unevaluatedProperties: false
Properties for a single LED.
properties: properties:
reg: reg:
...@@ -43,6 +42,42 @@ patternProperties: ...@@ -43,6 +42,42 @@ patternProperties:
- 4 # LED output FLASH1 - 4 # LED output FLASH1
- 5 # LED output FLASH2 - 5 # LED output FLASH2
"#address-cells":
const: 1
"#size-cells":
const: 0
patternProperties:
"^led@[0-2]$":
type: object
$ref: common.yaml#
unevaluatedProperties: false
properties:
reg:
enum: [0, 1, 2]
required:
- reg
- color
required:
- reg
- "#address-cells"
- "#size-cells"
"^led@[0-5]$":
type: object
$ref: common.yaml#
unevaluatedProperties: false
description:
Properties for a single LED.
properties:
reg:
enum: [0, 1, 2, 3, 4, 5]
required: required:
- compatible - compatible
- "#address-cells" - "#address-cells"
......
...@@ -20,8 +20,8 @@ properties: ...@@ -20,8 +20,8 @@ properties:
patternProperties: patternProperties:
"^led(-[0-9a-f]+)?$": "^led(-[0-9a-f]+)?$":
type: object type: object
$ref: common.yaml# $ref: common.yaml#
unevaluatedProperties: false
properties: properties:
pwms: pwms:
......
...@@ -72,14 +72,24 @@ properties: ...@@ -72,14 +72,24 @@ properties:
"^led@[0-9a-f]$": "^led@[0-9a-f]$":
type: object type: object
$ref: common.yaml# $ref: common.yaml#
unevaluatedProperties: false
properties:
reg:
maxItems: 1
required:
- reg
patternProperties: patternProperties:
"^led@[0-9a-f]$": "^led@[0-9a-f]$":
type: object type: object
$ref: common.yaml# $ref: common.yaml#
unevaluatedProperties: false
properties: properties:
reg: true reg:
maxItems: 1
required: required:
- reg - reg
......
...@@ -27,6 +27,7 @@ properties: ...@@ -27,6 +27,7 @@ properties:
led: led:
type: object type: object
$ref: common.yaml# $ref: common.yaml#
unevaluatedProperties: false
required: required:
- compatible - compatible
......
...@@ -18,7 +18,9 @@ description: | ...@@ -18,7 +18,9 @@ description: |
properties: properties:
compatible: compatible:
const: sgmicro,sgm3140 enum:
- ocs,ocp8110
- sgmicro,sgm3140
enable-gpios: enable-gpios:
maxItems: 1 maxItems: 1
...@@ -34,6 +36,7 @@ properties: ...@@ -34,6 +36,7 @@ properties:
led: led:
type: object type: object
$ref: common.yaml# $ref: common.yaml#
unevaluatedProperties: false
required: required:
- compatible - compatible
......
...@@ -26,26 +26,16 @@ properties: ...@@ -26,26 +26,16 @@ properties:
patternProperties: patternProperties:
"^led-[1-2]$": "^led-[1-2]$":
type: object $ref: common.yaml#
description: unevaluatedProperties: false
Properties for a single LED.
properties: properties:
#allOf:
#- $ref: "common.yaml#"
rohm,led-compatible: rohm,led-compatible:
description: LED identification string description: LED identification string
$ref: "/schemas/types.yaml#/definitions/string" $ref: "/schemas/types.yaml#/definitions/string"
enum: enum:
- bd71828-ambled - bd71828-ambled
- bd71828-grnled - bd71828-grnled
function:
description:
Purpose of LED as defined in dt-bindings/leds/common.h
$ref: "/schemas/types.yaml#/definitions/string"
color:
description:
LED colour as defined in dt-bindings/leds/common.h
$ref: "/schemas/types.yaml#/definitions/uint32"
required: required:
- compatible - compatible
......
...@@ -38,8 +38,8 @@ properties: ...@@ -38,8 +38,8 @@ properties:
patternProperties: patternProperties:
"^led@[0-6]$": "^led@[0-6]$":
type: object type: object
$ref: common.yaml# $ref: common.yaml#
unevaluatedProperties: false
properties: properties:
reg: reg:
......
...@@ -45,7 +45,7 @@ properties: ...@@ -45,7 +45,7 @@ properties:
port: port:
$ref: /schemas/graph.yaml#/$defs/port-base $ref: /schemas/graph.yaml#/$defs/port-base
unevaluatedProperties: false additionalProperties: false
description: description:
Input port node, single endpoint describing the input pad. Input port node, single endpoint describing the input pad.
...@@ -77,8 +77,6 @@ properties: ...@@ -77,8 +77,6 @@ properties:
additionalProperties: false additionalProperties: false
additionalProperties: false
required: required:
- compatible - compatible
- reg - reg
......
STMicroelectronics MIPID02 CSI-2 to PARALLEL bridge
MIPID02 has two CSI-2 input ports, only one of those ports can be active at a
time. Active port input stream will be de-serialized and its content outputted
through PARALLEL output port.
CSI-2 first input port is a dual lane 800Mbps per lane whereas CSI-2 second
input port is a single lane 800Mbps. Both ports support clock and data lane
polarity swap. First port also supports data lane swap.
PARALLEL output port has a maximum width of 12 bits.
Supported formats are RAW6, RAW7, RAW8, RAW10, RAW12, RGB565, RGB888, RGB444,
YUV420 8-bit, YUV422 8-bit and YUV420 10-bit.
Required Properties:
- compatible: shall be "st,st-mipid02"
- clocks: reference to the xclk input clock.
- clock-names: shall be "xclk".
- VDDE-supply: sensor digital IO supply. Must be 1.8 volts.
- VDDIN-supply: sensor internal regulator supply. Must be 1.8 volts.
Optional Properties:
- reset-gpios: reference to the GPIO connected to the xsdn pin, if any.
This is an active low signal to the mipid02.
Required subnodes:
- ports: A ports node with one port child node per device input and output
port, in accordance with the video interface bindings defined in
Documentation/devicetree/bindings/media/video-interfaces.txt. The
port nodes are numbered as follows:
Port Description
-----------------------------
0 CSI-2 first input port
1 CSI-2 second input port
2 PARALLEL output
Endpoint node required property for CSI-2 connection is:
- data-lanes: shall be <1> for Port 1. for Port 0 dual-lane operation shall be
<1 2> or <2 1>. For Port 0 single-lane operation shall be <1> or <2>.
Endpoint node optional property for CSI-2 connection is:
- lane-polarities: any lane can be inverted or not.
Endpoint node required property for PARALLEL connection is:
- bus-width: shall be set to <6>, <7>, <8>, <10> or <12>.
Endpoint node optional properties for PARALLEL connection are:
- hsync-active: active state of the HSYNC signal, 0/1 for LOW/HIGH respectively.
LOW being the default.
- vsync-active: active state of the VSYNC signal, 0/1 for LOW/HIGH respectively.
LOW being the default.
Example:
mipid02: csi2rx@14 {
compatible = "st,st-mipid02";
reg = <0x14>;
status = "okay";
clocks = <&clk_ext_camera_12>;
clock-names = "xclk";
VDDE-supply = <&vdd>;
VDDIN-supply = <&vdd>;
ports {
#address-cells = <1>;
#size-cells = <0>;
port@0 {
reg = <0>;
ep0: endpoint {
data-lanes = <1 2>;
remote-endpoint = <&mipi_csi2_in>;
};
};
port@2 {
reg = <2>;
ep2: endpoint {
bus-width = <8>;
hsync-active = <0>;
vsync-active = <0>;
remote-endpoint = <&parallel_out>;
};
};
};
};
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
%YAML 1.2
---
$id: http://devicetree.org/schemas/media/i2c/st,st-mipid02.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
title: STMicroelectronics MIPID02 CSI-2 to PARALLEL bridge
maintainers:
- Benjamin Mugnier <benjamin.mugnier@foss.st.com>
- Sylvain Petinot <sylvain.petinot@foss.st.com>
description:
MIPID02 has two CSI-2 input ports, only one of those ports can be
active at a time. Active port input stream will be de-serialized
and its content outputted through PARALLEL output port.
CSI-2 first input port is a dual lane 800Mbps per lane whereas CSI-2
second input port is a single lane 800Mbps. Both ports support clock
and data lane polarity swap. First port also supports data lane swap.
PARALLEL output port has a maximum width of 12 bits.
Supported formats are RAW6, RAW7, RAW8, RAW10, RAW12, RGB565, RGB888,
RGB444, YUV420 8-bit, YUV422 8-bit and YUV420 10-bit.
properties:
compatible:
const: st,st-mipid02
reg:
maxItems: 1
clocks:
maxItems: 1
clock-names:
const: xclk
VDDE-supply:
description:
Sensor digital IO supply. Must be 1.8 volts.
VDDIN-supply:
description:
Sensor internal regulator supply. Must be 1.8 volts.
reset-gpios:
description:
Reference to the GPIO connected to the xsdn pin, if any.
This is an active low signal to the mipid02.
ports:
$ref: /schemas/graph.yaml#/properties/ports
properties:
port@0:
$ref: /schemas/graph.yaml#/$defs/port-base
unevaluatedProperties: false
description: CSI-2 first input port
properties:
endpoint:
$ref: /schemas/media/video-interfaces.yaml#
unevaluatedProperties: false
properties:
data-lanes:
description:
Single-lane operation shall be <1> or <2> .
Dual-lane operation shall be <1 2> or <2 1> .
minItems: 1
maxItems: 2
lane-polarities:
description:
Any lane can be inverted or not.
minItems: 1
maxItems: 2
required:
- data-lanes
port@1:
$ref: /schemas/graph.yaml#/$defs/port-base
unevaluatedProperties: false
description: CSI-2 second input port
properties:
endpoint:
$ref: /schemas/media/video-interfaces.yaml#
unevaluatedProperties: false
properties:
data-lanes:
description:
Single-lane operation shall be <1> or <2> .
maxItems: 1
lane-polarities:
description:
Any lane can be inverted or not.
maxItems: 1
required:
- data-lanes
port@2:
$ref: /schemas/graph.yaml#/$defs/port-base
unevaluatedProperties: false
description: Output port
properties:
endpoint:
$ref: /schemas/media/video-interfaces.yaml#
unevaluatedProperties: false
properties:
bus-width:
enum: [6, 7, 8, 10, 12]
required:
- bus-width
anyOf:
- required:
- port@0
- required:
- port@1
required:
- port@2
additionalProperties: false
required:
- compatible
- reg
- clocks
- clock-names
- VDDE-supply
- VDDIN-supply
- ports
examples:
- |
i2c {
#address-cells = <1>;
#size-cells = <0>;
mipid02: csi2rx@14 {
compatible = "st,st-mipid02";
reg = <0x14>;
status = "okay";
clocks = <&clk_ext_camera_12>;
clock-names = "xclk";
VDDE-supply = <&vdd>;
VDDIN-supply = <&vdd>;
ports {
#address-cells = <1>;
#size-cells = <0>;
port@0 {
reg = <0>;
ep0: endpoint {
data-lanes = <1 2>;
remote-endpoint = <&mipi_csi2_in>;
};
};
port@2 {
reg = <2>;
ep2: endpoint {
bus-width = <8>;
hsync-active = <0>;
vsync-active = <0>;
remote-endpoint = <&parallel_out>;
};
};
};
};
};
...
# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
%YAML 1.2
---
$id: http://devicetree.org/schemas/misc/idt,89hpesx.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
title: EEPROM / CSR SMBus-slave interface of IDT 89HPESx devices
maintainers:
- Serge Semin <fancer.lancer@gmail.com>
select:
properties:
compatible:
contains:
pattern: '^idt,89hpes'
required:
- compatible
properties:
compatible:
oneOf:
- pattern: '^idt,89hpes(8nt2|12nt3|12n3a?|24n3a?|(12|24)t3g2|4t4g2|10t4g2|[56]t5|8t5a?)$'
- pattern: '^idt,89hpes(6t6g2|16t7|(24t6|32t8|48t12|16t4a?)(g2)?)$'
- pattern: '^idt,89hpes(24nt6a|32nt8[ab]|12nt12|16nt16|24nt24|32nt24[ab])g2$'
- pattern: '^idt,89hpes((32h8|48h12a?|22h16|34h16|64h16a?)(g2)?|16h16)$'
reg:
maxItems: 1
'#address-cells':
const: 1
'#size-cells':
const: 0
patternProperties:
'^eeprom@':
$ref: /schemas/eeprom/at24.yaml#
unevaluatedProperties: false
properties:
compatible:
description: Only a subset of devices are supported
pattern: ',24c(32|64|128|256|512)$'
required:
- compatible
- reg
additionalProperties: false
examples:
- |
i2c {
#address-cells = <1>;
#size-cells = <0>;
idt@74 {
compatible = "idt,89hpes32nt8ag2";
reg = <0x74>;
#address-cells = <1>;
#size-cells = <0>;
eeprom@50 {
compatible = "atmel,24c64";
reg = <0x50>;
read-only;
};
};
};
...
EEPROM / CSR SMBus-slave interface of IDT 89HPESx devices
Required properties:
- compatible : should be "<manufacturer>,<type>"
Basically there is only one manufacturer: idt, but some
compatible devices may be produced in future. Following devices
are supported: 89hpes8nt2, 89hpes12nt3, 89hpes24nt6ag2,
89hpes32nt8ag2, 89hpes32nt8bg2, 89hpes12nt12g2, 89hpes16nt16g2,
89hpes24nt24g2, 89hpes32nt24ag2, 89hpes32nt24bg2;
89hpes12n3, 89hpes12n3a, 89hpes24n3, 89hpes24n3a;
89hpes32h8, 89hpes32h8g2, 89hpes48h12, 89hpes48h12g2,
89hpes48h12ag2, 89hpes16h16, 89hpes22h16, 89hpes22h16g2,
89hpes34h16, 89hpes34h16g2, 89hpes64h16, 89hpes64h16g2,
89hpes64h16ag2;
89hpes12t3g2, 89hpes24t3g2, 89hpes16t4, 89hpes4t4g2,
89hpes10t4g2, 89hpes16t4g2, 89hpes16t4ag2, 89hpes5t5,
89hpes6t5, 89hpes8t5, 89hpes8t5a, 89hpes24t6, 89hpes6t6g2,
89hpes24t6g2, 89hpes16t7, 89hpes32t8, 89hpes32t8g2,
89hpes48t12, 89hpes48t12g2.
- reg : I2C address of the IDT 89HPESx device.
Optionally there can be EEPROM-compatible subnode:
- compatible: There are five EEPROM devices supported: 24c32, 24c64, 24c128,
24c256 and 24c512 differed by size.
- reg: Custom address of EEPROM device (If not specified IDT 89HPESx
(optional) device will try to communicate with EEPROM sited by default
address - 0x50)
- read-only : Parameterless property disables writes to the EEPROM
(optional)
Example:
idt@60 {
compatible = "idt,89hpes32nt8ag2";
reg = <0x74>;
#address-cells = <1>;
#size-cells = <0>;
eeprom@50 {
compatible = "onsemi,24c64";
reg = <0x50>;
read-only;
};
};
...@@ -27,6 +27,10 @@ properties: ...@@ -27,6 +27,10 @@ properties:
Broadcom stores environment variables inside a U-Boot partition. They Broadcom stores environment variables inside a U-Boot partition. They
can be identified by a custom header with magic value. can be identified by a custom header with magic value.
patternProperties:
"^partition-.*$":
$ref: partition.yaml#
unevaluatedProperties: false unevaluatedProperties: false
examples: examples:
...@@ -40,6 +44,9 @@ examples: ...@@ -40,6 +44,9 @@ examples:
compatible = "brcm,u-boot"; compatible = "brcm,u-boot";
reg = <0x0 0x100000>; reg = <0x0 0x100000>;
label = "u-boot"; label = "u-boot";
partition-u-boot-env {
};
}; };
partition@100000 { partition@100000 {
......
...@@ -203,7 +203,6 @@ examples: ...@@ -203,7 +203,6 @@ examples:
power-domains = <&zynqmp_firmware PD_ETH_1>; power-domains = <&zynqmp_firmware PD_ETH_1>;
resets = <&zynqmp_reset ZYNQMP_RESET_GEM1>; resets = <&zynqmp_reset ZYNQMP_RESET_GEM1>;
reset-names = "gem1_rst"; reset-names = "gem1_rst";
status = "okay";
phy-mode = "sgmii"; phy-mode = "sgmii";
phys = <&psgtr 1 PHY_TYPE_SGMII 1 1>; phys = <&psgtr 1 PHY_TYPE_SGMII 1 1>;
fixed-link { fixed-link {
......
...@@ -92,5 +92,4 @@ examples: ...@@ -92,5 +92,4 @@ examples:
<&clk IMX8MP_CLK_ENET_QOS>; <&clk IMX8MP_CLK_ENET_QOS>;
clock-names = "stmmaceth", "pclk", "ptp_ref", "tx"; clock-names = "stmmaceth", "pclk", "ptp_ref", "tx";
phy-mode = "rgmii"; phy-mode = "rgmii";
status = "disabled";
}; };
...@@ -38,6 +38,8 @@ properties: ...@@ -38,6 +38,8 @@ properties:
const: u-boot,env-redundant-bool const: u-boot,env-redundant-bool
- description: Two redundant blocks with active having higher counter - description: Two redundant blocks with active having higher counter
const: u-boot,env-redundant-count const: u-boot,env-redundant-count
- description: Broadcom's variant with custom header
const: brcm,env
reg: reg:
maxItems: 1 maxItems: 1
...@@ -73,3 +75,22 @@ examples: ...@@ -73,3 +75,22 @@ examples:
}; };
}; };
}; };
- |
partitions {
compatible = "fixed-partitions";
#address-cells = <1>;
#size-cells = <1>;
partition@0 {
reg = <0x0 0x100000>;
compatible = "brcm,u-boot";
label = "u-boot";
partition-u-boot-env {
compatible = "brcm,env";
ethaddr {
};
};
};
};
...@@ -41,7 +41,7 @@ required: ...@@ -41,7 +41,7 @@ required:
- nvmem-cells - nvmem-cells
patternProperties: patternProperties:
"opp-[0-9]+": "^opp-[0-9]+$":
type: object type: object
properties: properties:
...@@ -49,7 +49,7 @@ patternProperties: ...@@ -49,7 +49,7 @@ patternProperties:
clock-latency-ns: true clock-latency-ns: true
patternProperties: patternProperties:
"opp-microvolt-.*": true "^opp-microvolt-speed[0-9]$": true
required: required:
- opp-hz - opp-hz
......
...@@ -31,7 +31,7 @@ properties: ...@@ -31,7 +31,7 @@ properties:
maxItems: 2 maxItems: 2
patternProperties: patternProperties:
'pcie@[0-2],0': '^pcie@[0-2],0$':
type: object type: object
$ref: /schemas/pci/pci-bus.yaml# $ref: /schemas/pci/pci-bus.yaml#
......
...@@ -65,7 +65,7 @@ properties: ...@@ -65,7 +65,7 @@ properties:
maxItems: 1 maxItems: 1
patternProperties: patternProperties:
'usb@[0-1],0': '^usb@[0-1],0$':
type: object type: object
description: description:
......
* Xilinx NWL PCIe Root Port Bridge DT description
Required properties:
- compatible: Should contain "xlnx,nwl-pcie-2.11"
- #address-cells: Address representation for root ports, set to <3>
- #size-cells: Size representation for root ports, set to <2>
- #interrupt-cells: specifies the number of cells needed to encode an
interrupt source. The value must be 1.
- reg: Should contain Bridge, PCIe Controller registers location,
configuration space, and length
- reg-names: Must include the following entries:
"breg": bridge registers
"pcireg": PCIe controller registers
"cfg": configuration space region
- device_type: must be "pci"
- interrupts: Should contain NWL PCIe interrupt
- interrupt-names: Must include the following entries:
"msi1, msi0": interrupt asserted when an MSI is received
"intx": interrupt asserted when a legacy interrupt is received
"misc": interrupt asserted when miscellaneous interrupt is received
- interrupt-map-mask and interrupt-map: standard PCI properties to define the
mapping of the PCI interface to interrupt numbers.
- ranges: ranges for the PCI memory regions (I/O space region is not
supported by hardware)
Please refer to the standard PCI bus binding document for a more
detailed explanation
- msi-controller: indicates that this is MSI controller node
- msi-parent: MSI parent of the root complex itself
- legacy-interrupt-controller: Interrupt controller device node for Legacy
interrupts
- interrupt-controller: identifies the node as an interrupt controller
- #interrupt-cells: should be set to 1
- #address-cells: specifies the number of cells needed to encode an
address. The value must be 0.
Optional properties:
- dma-coherent: present if DMA operations are coherent
- clocks: Input clock specifier. Refer to common clock bindings
Example:
++++++++
nwl_pcie: pcie@fd0e0000 {
#address-cells = <3>;
#size-cells = <2>;
compatible = "xlnx,nwl-pcie-2.11";
#interrupt-cells = <1>;
msi-controller;
device_type = "pci";
interrupt-parent = <&gic>;
interrupts = <0 114 4>, <0 115 4>, <0 116 4>, <0 117 4>, <0 118 4>;
interrupt-names = "msi0", "msi1", "intx", "dummy", "misc";
interrupt-map-mask = <0x0 0x0 0x0 0x7>;
interrupt-map = <0x0 0x0 0x0 0x1 &pcie_intc 0x1>,
<0x0 0x0 0x0 0x2 &pcie_intc 0x2>,
<0x0 0x0 0x0 0x3 &pcie_intc 0x3>,
<0x0 0x0 0x0 0x4 &pcie_intc 0x4>;
msi-parent = <&nwl_pcie>;
reg = <0x0 0xfd0e0000 0x0 0x1000>,
<0x0 0xfd480000 0x0 0x1000>,
<0x80 0x00000000 0x0 0x1000000>;
reg-names = "breg", "pcireg", "cfg";
ranges = <0x02000000 0x00000000 0xe0000000 0x00000000 0xe0000000 0x00000000 0x10000000 /* non-prefetchable memory */
0x43000000 0x00000006 0x00000000 0x00000006 0x00000000 0x00000002 0x00000000>;/* prefetchable memory */
pcie_intc: legacy-interrupt-controller {
interrupt-controller;
#address-cells = <0>;
#interrupt-cells = <1>;
};
};
* Xilinx AXI PCIe Root Port Bridge DT description
Required properties:
- #address-cells: Address representation for root ports, set to <3>
- #size-cells: Size representation for root ports, set to <2>
- #interrupt-cells: specifies the number of cells needed to encode an
interrupt source. The value must be 1.
- compatible: Should contain "xlnx,axi-pcie-host-1.00.a"
- reg: Should contain AXI PCIe registers location and length
- device_type: must be "pci"
- interrupts: Should contain AXI PCIe interrupt
- interrupt-map-mask,
interrupt-map: standard PCI properties to define the mapping of the
PCI interface to interrupt numbers.
- ranges: ranges for the PCI memory regions (I/O space region is not
supported by hardware)
Please refer to the standard PCI bus binding document for a more
detailed explanation
Optional properties for Zynq/Microblaze:
- bus-range: PCI bus numbers covered
Interrupt controller child node
+++++++++++++++++++++++++++++++
Required properties:
- interrupt-controller: identifies the node as an interrupt controller
- #address-cells: specifies the number of cells needed to encode an
address. The value must be 0.
- #interrupt-cells: specifies the number of cells needed to encode an
interrupt source. The value must be 1.
NOTE:
The core provides a single interrupt for both INTx/MSI messages. So,
created a interrupt controller node to support 'interrupt-map' DT
functionality. The driver will create an IRQ domain for this map, decode
the four INTx interrupts in ISR and route them to this domain.
Example:
++++++++
Zynq:
pci_express: axi-pcie@50000000 {
#address-cells = <3>;
#size-cells = <2>;
#interrupt-cells = <1>;
compatible = "xlnx,axi-pcie-host-1.00.a";
reg = < 0x50000000 0x1000000 >;
device_type = "pci";
interrupts = < 0 52 4 >;
interrupt-map-mask = <0 0 0 7>;
interrupt-map = <0 0 0 1 &pcie_intc 1>,
<0 0 0 2 &pcie_intc 2>,
<0 0 0 3 &pcie_intc 3>,
<0 0 0 4 &pcie_intc 4>;
ranges = < 0x02000000 0 0x60000000 0x60000000 0 0x10000000 >;
pcie_intc: interrupt-controller {
interrupt-controller;
#address-cells = <0>;
#interrupt-cells = <1>;
};
};
Microblaze:
pci_express: axi-pcie@10000000 {
#address-cells = <3>;
#size-cells = <2>;
#interrupt-cells = <1>;
compatible = "xlnx,axi-pcie-host-1.00.a";
reg = <0x10000000 0x4000000>;
device_type = "pci";
interrupt-parent = <&microblaze_0_intc>;
interrupts = <1 2>;
interrupt-map-mask = <0 0 0 7>;
interrupt-map = <0 0 0 1 &pcie_intc 1>,
<0 0 0 2 &pcie_intc 2>,
<0 0 0 3 &pcie_intc 3>,
<0 0 0 4 &pcie_intc 4>;
ranges = <0x02000000 0x00000000 0x80000000 0x80000000 0x00000000 0x10000000>;
pcie_intc: interrupt-controller {
interrupt-controller;
#address-cells = <0>;
#interrupt-cells = <1>;
};
};
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
%YAML 1.2
---
$id: http://devicetree.org/schemas/pci/xlnx,axi-pcie-host.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
title: Xilinx AXI PCIe Root Port Bridge
maintainers:
- Thippeswamy Havalige <thippeswamy.havalige@amd.com>
allOf:
- $ref: /schemas/pci/pci-bus.yaml#
properties:
compatible:
const: xlnx,axi-pcie-host-1.00.a
reg:
maxItems: 1
interrupts:
maxItems: 1
ranges:
items:
- description: |
ranges for the PCI memory regions (I/O space region is not
supported by hardware)
"#interrupt-cells":
const: 1
interrupt-controller:
description: identifies the node as an interrupt controller
type: object
properties:
interrupt-controller: true
"#address-cells":
const: 0
"#interrupt-cells":
const: 1
required:
- interrupt-controller
- "#address-cells"
- "#interrupt-cells"
additionalProperties: false
required:
- compatible
- reg
- ranges
- interrupts
- interrupt-map
- "#interrupt-cells"
- interrupt-controller
unevaluatedProperties: false
examples:
- |
#include <dt-bindings/interrupt-controller/arm-gic.h>
#include <dt-bindings/interrupt-controller/irq.h>
pcie@50000000 {
compatible = "xlnx,axi-pcie-host-1.00.a";
reg = <0x50000000 0x1000000>;
#address-cells = <3>;
#size-cells = <2>;
#interrupt-cells = <1>;
device_type = "pci";
interrupts = <GIC_SPI 52 IRQ_TYPE_LEVEL_HIGH>;
interrupt-map-mask = <0 0 0 7>;
interrupt-map = <0 0 0 1 &pcie_intc 1>,
<0 0 0 2 &pcie_intc 2>,
<0 0 0 3 &pcie_intc 3>,
<0 0 0 4 &pcie_intc 4>;
ranges = <0x02000000 0 0x60000000 0x60000000 0 0x10000000>;
pcie_intc: interrupt-controller {
interrupt-controller;
#address-cells = <0>;
#interrupt-cells = <1>;
};
};
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
%YAML 1.2
---
$id: http://devicetree.org/schemas/pci/xlnx,nwl-pcie.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
title: Xilinx NWL PCIe Root Port Bridge
maintainers:
- Thippeswamy Havalige <thippeswamy.havalige@amd.com>
allOf:
- $ref: /schemas/pci/pci-bus.yaml#
- $ref: /schemas/interrupt-controller/msi-controller.yaml#
properties:
compatible:
const: xlnx,nwl-pcie-2.11
reg:
items:
- description: PCIe bridge registers location.
- description: PCIe Controller registers location.
- description: PCIe Configuration space region.
reg-names:
items:
- const: breg
- const: pcireg
- const: cfg
interrupts:
items:
- description: interrupt asserted when miscellaneous interrupt is received
- description: unused interrupt(dummy)
- description: interrupt asserted when a legacy interrupt is received
- description: msi1 interrupt asserted when an MSI is received
- description: msi0 interrupt asserted when an MSI is received
interrupt-names:
items:
- const: misc
- const: dummy
- const: intx
- const: msi1
- const: msi0
interrupt-map-mask:
items:
- const: 0
- const: 0
- const: 0
- const: 7
"#interrupt-cells":
const: 1
msi-parent:
description: MSI controller the device is capable of using.
interrupt-map:
maxItems: 4
power-domains:
maxItems: 1
iommus:
maxItems: 1
dma-coherent:
description: optional, only needed if DMA operations are coherent.
clocks:
maxItems: 1
description: optional, input clock specifier.
legacy-interrupt-controller:
description: Interrupt controller node for handling legacy PCI interrupts.
type: object
properties:
"#address-cells":
const: 0
"#interrupt-cells":
const: 1
"interrupt-controller": true
required:
- "#address-cells"
- "#interrupt-cells"
- interrupt-controller
additionalProperties: false
required:
- compatible
- reg
- reg-names
- interrupts
- "#interrupt-cells"
- interrupt-map
- interrupt-map-mask
- msi-controller
- power-domains
unevaluatedProperties: false
examples:
- |
#include <dt-bindings/interrupt-controller/arm-gic.h>
#include <dt-bindings/interrupt-controller/irq.h>
#include <dt-bindings/power/xlnx-zynqmp-power.h>
soc {
#address-cells = <2>;
#size-cells = <2>;
nwl_pcie: pcie@fd0e0000 {
compatible = "xlnx,nwl-pcie-2.11";
reg = <0x0 0xfd0e0000 0x0 0x1000>,
<0x0 0xfd480000 0x0 0x1000>,
<0x80 0x00000000 0x0 0x1000000>;
reg-names = "breg", "pcireg", "cfg";
ranges = <0x02000000 0x0 0xe0000000 0x0 0xe0000000 0x0 0x10000000>,
<0x43000000 0x00000006 0x0 0x00000006 0x0 0x00000002 0x0>;
#address-cells = <3>;
#size-cells = <2>;
#interrupt-cells = <1>;
msi-controller;
device_type = "pci";
interrupt-parent = <&gic>;
interrupts = <GIC_SPI 118 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 116 IRQ_TYPE_EDGE_RISING>,
<GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 115 IRQ_TYPE_EDGE_RISING>,
<GIC_SPI 114 IRQ_TYPE_LEVEL_HIGH>;
interrupt-names = "misc", "dummy", "intx", "msi1", "msi0";
interrupt-map-mask = <0x0 0x0 0x0 0x7>;
interrupt-map = <0x0 0x0 0x0 0x1 &pcie_intc 0x1>,
<0x0 0x0 0x0 0x2 &pcie_intc 0x2>,
<0x0 0x0 0x0 0x3 &pcie_intc 0x3>,
<0x0 0x0 0x0 0x4 &pcie_intc 0x4>;
msi-parent = <&nwl_pcie>;
power-domains = <&zynqmp_firmware PD_PCIE>;
iommus = <&smmu 0x4d0>;
pcie_intc: legacy-interrupt-controller {
interrupt-controller;
#address-cells = <0>;
#interrupt-cells = <1>;
};
};
};
...@@ -32,11 +32,8 @@ properties: ...@@ -32,11 +32,8 @@ properties:
- description: nCLUSTERPMUIRQ interrupt - description: nCLUSTERPMUIRQ interrupt
cpus: cpus:
$ref: /schemas/types.yaml#/definitions/phandle-array
minItems: 1 minItems: 1
maxItems: 12 maxItems: 12
items:
maxItems: 1
description: List of phandles for the CPUs connected to this DSU instance. description: List of phandles for the CPUs connected to this DSU instance.
required: required:
......
...@@ -36,11 +36,10 @@ additionalProperties: false ...@@ -36,11 +36,10 @@ additionalProperties: false
examples: examples:
- | - |
mmc_phy@80440800 { mmc_phy@80440800 {
#phy-cells = <0x0>; #phy-cells = <0x0>;
compatible = "intel,thunderbay-emmc-phy"; compatible = "intel,thunderbay-emmc-phy";
status = "okay"; reg = <0x80440800 0x100>;
reg = <0x80440800 0x100>; clocks = <&emmc>;
clocks = <&emmc>; clock-names = "emmcclk";
clock-names = "emmcclk"; };
};
...@@ -34,10 +34,8 @@ properties: ...@@ -34,10 +34,8 @@ properties:
maxItems: 1 maxItems: 1
cpus: cpus:
$ref: /schemas/types.yaml#/definitions/phandle-array minItems: 1
items: maxItems: 4
minItems: 1
maxItems: 4
description: | description: |
Array of phandles pointing to CPU cores, which should match the order of Array of phandles pointing to CPU cores, which should match the order of
CPU cores used by the WUPCR and PSTR registers in the Advanced Power CPU cores used by the WUPCR and PSTR registers in the Advanced Power
......
...@@ -24,7 +24,7 @@ properties: ...@@ -24,7 +24,7 @@ properties:
type: object type: object
patternProperties: patternProperties:
"regulator-.+": "^regulator-.+$":
$ref: "regulator.yaml#" $ref: "regulator.yaml#"
unevaluatedProperties: false unevaluatedProperties: false
......
...@@ -77,7 +77,7 @@ patternProperties: ...@@ -77,7 +77,7 @@ patternProperties:
regulator-initial-mode: false regulator-initial-mode: false
patternProperties: patternProperties:
regulator-state-(standby|mem|disk): "^regulator-state-(standby|mem|disk)$":
type: object type: object
additionalProperties: true additionalProperties: true
properties: properties:
......
...@@ -231,7 +231,7 @@ patternProperties: ...@@ -231,7 +231,7 @@ patternProperties:
".*-supply$": ".*-supply$":
description: Input supply phandle(s) for this node description: Input supply phandle(s) for this node
regulator-state-(standby|mem|disk): "^regulator-state-(standby|mem|disk)$":
type: object type: object
description: description:
sub-nodes for regulator state in Standby, Suspend-to-RAM, and sub-nodes for regulator state in Standby, Suspend-to-RAM, and
......
...@@ -21,7 +21,7 @@ description: | ...@@ -21,7 +21,7 @@ description: |
regulator-voutl1, regulator-vouts1 regulator-voutl1, regulator-vouts1
patternProperties: patternProperties:
"regulator-.+": "^regulator-.+$":
type: object type: object
description: description:
Properties for single regulator. Properties for single regulator.
......
...@@ -51,13 +51,6 @@ properties: ...@@ -51,13 +51,6 @@ properties:
where the board has a button wired to the pin and triggers where the board has a button wired to the pin and triggers
an interrupt on pressing it. an interrupt on pressing it.
patternProperties:
"^buck[1-3]-supply$":
description: Input supply phandle of one regulator.
"^ldo[1-4]-supply$":
description: Input supply phandle of one regulator.
regulators: regulators:
type: object type: object
description: | description: |
...@@ -82,6 +75,13 @@ patternProperties: ...@@ -82,6 +75,13 @@ patternProperties:
additionalProperties: false additionalProperties: false
patternProperties:
"^buck[1-3]-supply$":
description: Input supply phandle of one regulator.
"^ldo[1-4]-supply$":
description: Input supply phandle of one regulator.
required: required:
- compatible - compatible
- reg - reg
......
...@@ -8,7 +8,8 @@ $schema: http://devicetree.org/meta-schemas/core.yaml# ...@@ -8,7 +8,8 @@ $schema: http://devicetree.org/meta-schemas/core.yaml#
title: Intel KeemBay I2S title: Intel KeemBay I2S
maintainers: maintainers:
- Sia, Jee Heng <jee.heng.sia@intel.com> - Daniele Alessandrelli <daniele.alessandrelli@intel.com>
- Paul J. Murphy <paul.j.murphy@intel.com>
description: | description: |
Intel KeemBay I2S Intel KeemBay I2S
......
...@@ -115,7 +115,7 @@ properties: ...@@ -115,7 +115,7 @@ properties:
ports: ports:
$ref: /schemas/graph.yaml#/properties/ports $ref: /schemas/graph.yaml#/properties/ports
patternProperties: patternProperties:
port(@[0-9a-f]+)?: '^port(@[0-9a-f]+)?$':
$ref: audio-graph-port.yaml# $ref: audio-graph-port.yaml#
unevaluatedProperties: false unevaluatedProperties: false
......
...@@ -109,38 +109,6 @@ properties: ...@@ -109,38 +109,6 @@ properties:
maximum: 7 maximum: 7
default: [0, 0, 0, 0] default: [0, 0, 0, 0]
ti,asi-tx-drive:
type: boolean
description: |
When set the device will set the Tx ASI output to a Hi-Z state for unused
data cycles. Default is to drive the output low on unused ASI cycles.
patternProperties:
'^ti,gpo-config-[1-4]$':
$ref: /schemas/types.yaml#/definitions/uint32-array
description: |
Defines the configuration and output driver for the general purpose
output pins (GPO). These values are pairs, the first value is for the
configuration type and the second value is for the output drive type.
The array is defined as <GPO_CFG GPO_DRV>
GPO output configuration can be one of the following:
0 - (default) disabled
1 - GPOX is configured as a general-purpose output (GPO)
2 - GPOX is configured as a device interrupt output (IRQ)
3 - GPOX is configured as a secondary ASI output (SDOUT2)
4 - GPOX is configured as a PDM clock output (PDMCLK)
GPO output drive configuration for the GPO pins can be one of the following:
0d - (default) Hi-Z output
1d - Drive active low and active high
2d - Drive active low and weak high
3d - Drive active low and Hi-Z
4d - Drive weak low and active high
5d - Drive Hi-Z and active high
ti,gpio-config: ti,gpio-config:
description: | description: |
Defines the configuration and output drive for the General Purpose Defines the configuration and output drive for the General Purpose
...@@ -183,6 +151,38 @@ patternProperties: ...@@ -183,6 +151,38 @@ patternProperties:
maximum: 15 maximum: 15
default: [2, 2] default: [2, 2]
ti,asi-tx-drive:
type: boolean
description: |
When set the device will set the Tx ASI output to a Hi-Z state for unused
data cycles. Default is to drive the output low on unused ASI cycles.
patternProperties:
'^ti,gpo-config-[1-4]$':
$ref: /schemas/types.yaml#/definitions/uint32-array
description: |
Defines the configuration and output driver for the general purpose
output pins (GPO). These values are pairs, the first value is for the
configuration type and the second value is for the output drive type.
The array is defined as <GPO_CFG GPO_DRV>
GPO output configuration can be one of the following:
0 - (default) disabled
1 - GPOX is configured as a general-purpose output (GPO)
2 - GPOX is configured as a device interrupt output (IRQ)
3 - GPOX is configured as a secondary ASI output (SDOUT2)
4 - GPOX is configured as a PDM clock output (PDMCLK)
GPO output drive configuration for the GPO pins can be one of the following:
0d - (default) Hi-Z output
1d - Drive active low and active high
2d - Drive active low and weak high
3d - Drive active low and Hi-Z
4d - Drive weak low and active high
5d - Drive Hi-Z and active high
required: required:
- compatible - compatible
- reg - reg
......
...@@ -48,7 +48,7 @@ properties: ...@@ -48,7 +48,7 @@ properties:
- const: tx - const: tx
patternProperties: patternProperties:
"@[0-9a-f]+": "@[0-9a-f]+$":
type: object type: object
properties: properties:
......
...@@ -37,7 +37,7 @@ properties: ...@@ -37,7 +37,7 @@ properties:
cpus: cpus:
description: description:
phandle of the first cpu in the LMh cluster phandle of the first cpu in the LMh cluster
$ref: /schemas/types.yaml#/definitions/phandle maxItems: 1
qcom,lmh-temp-arm-millicelsius: qcom,lmh-temp-arm-millicelsius:
description: description:
......
...@@ -53,6 +53,7 @@ properties: ...@@ -53,6 +53,7 @@ properties:
- qcom,sc8280xp-tsens - qcom,sc8280xp-tsens
- qcom,sdm630-tsens - qcom,sdm630-tsens
- qcom,sdm845-tsens - qcom,sdm845-tsens
- qcom,sm6115-tsens
- qcom,sm6350-tsens - qcom,sm6350-tsens
- qcom,sm8150-tsens - qcom,sm8150-tsens
- qcom,sm8250-tsens - qcom,sm8250-tsens
......
...@@ -76,9 +76,13 @@ examples: ...@@ -76,9 +76,13 @@ examples:
next-level-cache = <&L2_0>; next-level-cache = <&L2_0>;
L2_0: l2-cache { L2_0: l2-cache {
compatible = "cache"; compatible = "cache";
cache-unified;
cache-level = <2>;
next-level-cache = <&L3_0>; next-level-cache = <&L3_0>;
L3_0: l3-cache { L3_0: l3-cache {
compatible = "cache"; compatible = "cache";
cache-unified;
cache-level = <3>;
}; };
}; };
}; };
......
...@@ -48,99 +48,105 @@ additionalProperties: false ...@@ -48,99 +48,105 @@ additionalProperties: false
examples: examples:
- | - |
#include <dt-bindings/thermal/thermal.h> /{
#include <dt-bindings/thermal/thermal.h>
// Example: Combining idle cooling device on big CPUs with cpufreq cooling device compatible = "foo";
cpus { model = "foo";
#address-cells = <1>;
#size-cells = <1>;
// Example: Combining idle cooling device on big CPUs with cpufreq cooling device
cpus {
#address-cells = <2>; #address-cells = <2>;
#size-cells = <0>; #size-cells = <0>;
/* ... */ /* ... */
cpu_b0: cpu@100 { cpu_b0: cpu@100 {
device_type = "cpu"; device_type = "cpu";
compatible = "arm,cortex-a72"; compatible = "arm,cortex-a72";
reg = <0x0 0x100>; reg = <0x0 0x100>;
enable-method = "psci"; enable-method = "psci";
capacity-dmips-mhz = <1024>; capacity-dmips-mhz = <1024>;
dynamic-power-coefficient = <436>; dynamic-power-coefficient = <436>;
#cooling-cells = <2>; /* min followed by max */ #cooling-cells = <2>; /* min followed by max */
cpu-idle-states = <&CPU_SLEEP>, <&CLUSTER_SLEEP>; cpu-idle-states = <&CPU_SLEEP>, <&CLUSTER_SLEEP>;
thermal-idle { cpu_b0_therm: thermal-idle {
#cooling-cells = <2>; #cooling-cells = <2>;
duration-us = <10000>; duration-us = <10000>;
exit-latency-us = <500>; exit-latency-us = <500>;
}; };
};
cpu_b1: cpu@101 {
device_type = "cpu";
compatible = "arm,cortex-a72";
reg = <0x0 0x101>;
enable-method = "psci";
capacity-dmips-mhz = <1024>;
dynamic-power-coefficient = <436>;
#cooling-cells = <2>; /* min followed by max */
cpu-idle-states = <&CPU_SLEEP>, <&CLUSTER_SLEEP>;
cpu_b1_therm: thermal-idle {
#cooling-cells = <2>;
duration-us = <10000>;
exit-latency-us = <500>;
}; };
};
cpu_b1: cpu@101 { /* ... */
device_type = "cpu";
compatible = "arm,cortex-a72";
reg = <0x0 0x101>;
enable-method = "psci";
capacity-dmips-mhz = <1024>;
dynamic-power-coefficient = <436>;
#cooling-cells = <2>; /* min followed by max */
cpu-idle-states = <&CPU_SLEEP>, <&CLUSTER_SLEEP>;
thermal-idle {
#cooling-cells = <2>;
duration-us = <10000>;
exit-latency-us = <500>;
};
};
/* ... */
}; };
/* ... */ /* ... */
thermal_zones { thermal_zones {
cpu_thermal: cpu { cpu_thermal: cpu {
polling-delay-passive = <100>; polling-delay-passive = <100>;
polling-delay = <1000>; polling-delay = <1000>;
/* ... */ /* ... */
trips { trips {
cpu_alert0: cpu_alert0 { cpu_alert0: cpu_alert0 {
temperature = <65000>; temperature = <65000>;
hysteresis = <2000>; hysteresis = <2000>;
type = "passive"; type = "passive";
}; };
cpu_alert1: cpu_alert1 { cpu_alert1: cpu_alert1 {
temperature = <70000>; temperature = <70000>;
hysteresis = <2000>; hysteresis = <2000>;
type = "passive"; type = "passive";
}; };
cpu_alert2: cpu_alert2 { cpu_alert2: cpu_alert2 {
temperature = <75000>; temperature = <75000>;
hysteresis = <2000>; hysteresis = <2000>;
type = "passive"; type = "passive";
}; };
cpu_crit: cpu_crit { cpu_crit: cpu_crit {
temperature = <95000>; temperature = <95000>;
hysteresis = <2000>; hysteresis = <2000>;
type = "critical"; type = "critical";
}; };
}; };
cooling-maps { cooling-maps {
map0 { map0 {
trip = <&cpu_alert1>; trip = <&cpu_alert1>;
cooling-device = <&{/cpus/cpu@100/thermal-idle} 0 15 >, cooling-device = <&cpu_b0_therm 0 15 >,
<&{/cpus/cpu@101/thermal-idle} 0 15>; <&cpu_b1_therm 0 15>;
}; };
map1 { map1 {
trip = <&cpu_alert2>; trip = <&cpu_alert2>;
cooling-device = cooling-device = <&cpu_b0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
<&cpu_b0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, <&cpu_b1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
<&cpu_b1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>; };
};
}; };
}; };
};
}; };
...@@ -49,6 +49,8 @@ properties: ...@@ -49,6 +49,8 @@ properties:
reg: reg:
maxItems: 1 maxItems: 1
dma-coherent: true
required: required:
- compatible - compatible
- clocks - clocks
......
...@@ -8796,6 +8796,7 @@ GPIO IR Transmitter ...@@ -8796,6 +8796,7 @@ GPIO IR Transmitter
M: Sean Young <sean@mess.org> M: Sean Young <sean@mess.org>
L: linux-media@vger.kernel.org L: linux-media@vger.kernel.org
S: Maintained S: Maintained
F: Documentation/devicetree/bindings/leds/irled/gpio-ir-tx.yaml
F: drivers/media/rc/gpio-ir-tx.c F: drivers/media/rc/gpio-ir-tx.c
GPIO MOCKUP DRIVER GPIO MOCKUP DRIVER
...@@ -16847,6 +16848,7 @@ PWM IR Transmitter ...@@ -16847,6 +16848,7 @@ PWM IR Transmitter
M: Sean Young <sean@mess.org> M: Sean Young <sean@mess.org>
L: linux-media@vger.kernel.org L: linux-media@vger.kernel.org
S: Maintained S: Maintained
F: Documentation/devicetree/bindings/leds/irled/pwm-ir-tx.yaml
F: drivers/media/rc/pwm-ir-tx.c F: drivers/media/rc/pwm-ir-tx.c
PWM SUBSYSTEM PWM SUBSYSTEM
...@@ -19617,7 +19619,7 @@ M: Sylvain Petinot <sylvain.petinot@foss.st.com> ...@@ -19617,7 +19619,7 @@ M: Sylvain Petinot <sylvain.petinot@foss.st.com>
L: linux-media@vger.kernel.org L: linux-media@vger.kernel.org
S: Maintained S: Maintained
T: git git://linuxtv.org/media_tree.git T: git git://linuxtv.org/media_tree.git
F: Documentation/devicetree/bindings/media/i2c/st,st-mipid02.txt F: Documentation/devicetree/bindings/media/i2c/st,st-mipid02.yaml
F: drivers/media/i2c/st-mipid02.c F: drivers/media/i2c/st-mipid02.c
ST STM32 I2C/SMBUS DRIVER ST STM32 I2C/SMBUS DRIVER
......
...@@ -281,7 +281,7 @@ void *of_kexec_alloc_and_setup_fdt(const struct kimage *image, ...@@ -281,7 +281,7 @@ void *of_kexec_alloc_and_setup_fdt(const struct kimage *image,
const char *cmdline, size_t extra_fdt_size) const char *cmdline, size_t extra_fdt_size)
{ {
void *fdt; void *fdt;
int ret, chosen_node; int ret, chosen_node, len;
const void *prop; const void *prop;
size_t fdt_size; size_t fdt_size;
...@@ -324,19 +324,19 @@ void *of_kexec_alloc_and_setup_fdt(const struct kimage *image, ...@@ -324,19 +324,19 @@ void *of_kexec_alloc_and_setup_fdt(const struct kimage *image,
goto out; goto out;
/* Did we boot using an initrd? */ /* Did we boot using an initrd? */
prop = fdt_getprop(fdt, chosen_node, "linux,initrd-start", NULL); prop = fdt_getprop(fdt, chosen_node, "linux,initrd-start", &len);
if (prop) { if (prop) {
u64 tmp_start, tmp_end, tmp_size; u64 tmp_start, tmp_end, tmp_size;
tmp_start = fdt64_to_cpu(*((const fdt64_t *) prop)); tmp_start = of_read_number(prop, len / 4);
prop = fdt_getprop(fdt, chosen_node, "linux,initrd-end", NULL); prop = fdt_getprop(fdt, chosen_node, "linux,initrd-end", &len);
if (!prop) { if (!prop) {
ret = -EINVAL; ret = -EINVAL;
goto out; goto out;
} }
tmp_end = fdt64_to_cpu(*((const fdt64_t *) prop)); tmp_end = of_read_number(prop, len / 4);
/* /*
* kexec reserves exact initrd size, while firmware may * kexec reserves exact initrd size, while firmware may
......
...@@ -545,7 +545,7 @@ static int find_dup_cset_node_entry(struct overlay_changeset *ovcs, ...@@ -545,7 +545,7 @@ static int find_dup_cset_node_entry(struct overlay_changeset *ovcs,
fn_1 = kasprintf(GFP_KERNEL, "%pOF", ce_1->np); fn_1 = kasprintf(GFP_KERNEL, "%pOF", ce_1->np);
fn_2 = kasprintf(GFP_KERNEL, "%pOF", ce_2->np); fn_2 = kasprintf(GFP_KERNEL, "%pOF", ce_2->np);
node_path_match = !strcmp(fn_1, fn_2); node_path_match = !fn_1 || !fn_2 || !strcmp(fn_1, fn_2);
kfree(fn_1); kfree(fn_1);
kfree(fn_2); kfree(fn_2);
if (node_path_match) { if (node_path_match) {
...@@ -580,7 +580,7 @@ static int find_dup_cset_prop(struct overlay_changeset *ovcs, ...@@ -580,7 +580,7 @@ static int find_dup_cset_prop(struct overlay_changeset *ovcs,
fn_1 = kasprintf(GFP_KERNEL, "%pOF", ce_1->np); fn_1 = kasprintf(GFP_KERNEL, "%pOF", ce_1->np);
fn_2 = kasprintf(GFP_KERNEL, "%pOF", ce_2->np); fn_2 = kasprintf(GFP_KERNEL, "%pOF", ce_2->np);
node_path_match = !strcmp(fn_1, fn_2); node_path_match = !fn_1 || !fn_2 || !strcmp(fn_1, fn_2);
kfree(fn_1); kfree(fn_1);
kfree(fn_2); kfree(fn_2);
if (node_path_match && if (node_path_match &&
......
...@@ -115,15 +115,14 @@ struct platform_device *of_device_alloc(struct device_node *np, ...@@ -115,15 +115,14 @@ struct platform_device *of_device_alloc(struct device_node *np,
{ {
struct platform_device *dev; struct platform_device *dev;
int rc, i, num_reg = 0; int rc, i, num_reg = 0;
struct resource *res, temp_res; struct resource *res;
dev = platform_device_alloc("", PLATFORM_DEVID_NONE); dev = platform_device_alloc("", PLATFORM_DEVID_NONE);
if (!dev) if (!dev)
return NULL; return NULL;
/* count the io resources */ /* count the io resources */
while (of_address_to_resource(np, num_reg, &temp_res) == 0) num_reg = of_address_count(np);
num_reg++;
/* Populate the resource table */ /* Populate the resource table */
if (num_reg) { if (num_reg) {
......
...@@ -2508,8 +2508,7 @@ static struct platform_driver unittest_i2c_bus_driver = { ...@@ -2508,8 +2508,7 @@ static struct platform_driver unittest_i2c_bus_driver = {
}, },
}; };
static int unittest_i2c_dev_probe(struct i2c_client *client, static int unittest_i2c_dev_probe(struct i2c_client *client)
const struct i2c_device_id *id)
{ {
struct device *dev = &client->dev; struct device *dev = &client->dev;
struct device_node *np = client->dev.of_node; struct device_node *np = client->dev.of_node;
...@@ -2541,7 +2540,7 @@ static struct i2c_driver unittest_i2c_dev_driver = { ...@@ -2541,7 +2540,7 @@ static struct i2c_driver unittest_i2c_dev_driver = {
.driver = { .driver = {
.name = "unittest-i2c-dev", .name = "unittest-i2c-dev",
}, },
.probe = unittest_i2c_dev_probe, .probe_new = unittest_i2c_dev_probe,
.remove = unittest_i2c_dev_remove, .remove = unittest_i2c_dev_remove,
.id_table = unittest_i2c_dev_id, .id_table = unittest_i2c_dev_id,
}; };
...@@ -2553,8 +2552,7 @@ static int unittest_i2c_mux_select_chan(struct i2c_mux_core *muxc, u32 chan) ...@@ -2553,8 +2552,7 @@ static int unittest_i2c_mux_select_chan(struct i2c_mux_core *muxc, u32 chan)
return 0; return 0;
} }
static int unittest_i2c_mux_probe(struct i2c_client *client, static int unittest_i2c_mux_probe(struct i2c_client *client)
const struct i2c_device_id *id)
{ {
int i, nchans; int i, nchans;
struct device *dev = &client->dev; struct device *dev = &client->dev;
...@@ -2619,7 +2617,7 @@ static struct i2c_driver unittest_i2c_mux_driver = { ...@@ -2619,7 +2617,7 @@ static struct i2c_driver unittest_i2c_mux_driver = {
.driver = { .driver = {
.name = "unittest-i2c-mux", .name = "unittest-i2c-mux",
}, },
.probe = unittest_i2c_mux_probe, .probe_new = unittest_i2c_mux_probe,
.remove = unittest_i2c_mux_remove, .remove = unittest_i2c_mux_remove,
.id_table = unittest_i2c_mux_id, .id_table = unittest_i2c_mux_id,
}; };
......
...@@ -1549,9 +1549,9 @@ enum of_overlay_notify_action { ...@@ -1549,9 +1549,9 @@ enum of_overlay_notify_action {
OF_OVERLAY_POST_REMOVE, OF_OVERLAY_POST_REMOVE,
}; };
static inline char *of_overlay_action_name(enum of_overlay_notify_action action) static inline const char *of_overlay_action_name(enum of_overlay_notify_action action)
{ {
static char *of_overlay_action_name[] = { static const char *const of_overlay_action_name[] = {
"init", "init",
"pre-apply", "pre-apply",
"post-apply", "post-apply",
......
...@@ -154,4 +154,15 @@ static inline const __be32 *of_get_pci_address(struct device_node *dev, int bar_ ...@@ -154,4 +154,15 @@ static inline const __be32 *of_get_pci_address(struct device_node *dev, int bar_
return __of_get_address(dev, -1, bar_no, size, flags); return __of_get_address(dev, -1, bar_no, size, flags);
} }
static inline int of_address_count(struct device_node *np)
{
struct resource res;
int count = 0;
while (of_address_to_resource(np, count, &res) == 0)
count++;
return count;
}
#endif /* __OF_ADDRESS_H */ #endif /* __OF_ADDRESS_H */
...@@ -334,7 +334,8 @@ quiet_cmd_gzip = GZIP $@ ...@@ -334,7 +334,8 @@ quiet_cmd_gzip = GZIP $@
# DTC # DTC
# --------------------------------------------------------------------------- # ---------------------------------------------------------------------------
DTC ?= $(objtree)/scripts/dtc/dtc DTC ?= $(objtree)/scripts/dtc/dtc
DTC_FLAGS += -Wno-interrupt_provider DTC_FLAGS += -Wno-interrupt_provider \
-Wno-unique_unit_address
# Disable noisy checks by default # Disable noisy checks by default
ifeq ($(findstring 1,$(KBUILD_EXTRA_WARN)),) ifeq ($(findstring 1,$(KBUILD_EXTRA_WARN)),)
...@@ -342,14 +343,17 @@ DTC_FLAGS += -Wno-unit_address_vs_reg \ ...@@ -342,14 +343,17 @@ DTC_FLAGS += -Wno-unit_address_vs_reg \
-Wno-avoid_unnecessary_addr_size \ -Wno-avoid_unnecessary_addr_size \
-Wno-alias_paths \ -Wno-alias_paths \
-Wno-graph_child_address \ -Wno-graph_child_address \
-Wno-simple_bus_reg \ -Wno-simple_bus_reg
-Wno-unique_unit_address else
DTC_FLAGS += \
-Wunique_unit_address_if_enabled
endif endif
ifneq ($(findstring 2,$(KBUILD_EXTRA_WARN)),) ifneq ($(findstring 2,$(KBUILD_EXTRA_WARN)),)
DTC_FLAGS += -Wnode_name_chars_strict \ DTC_FLAGS += -Wnode_name_chars_strict \
-Wproperty_name_chars_strict \ -Wproperty_name_chars_strict \
-Winterrupt_provider -Winterrupt_provider \
-Wunique_unit_address
endif endif
DTC_FLAGS += $(DTC_FLAGS_$(basetarget)) DTC_FLAGS += $(DTC_FLAGS_$(basetarget))
......
...@@ -1382,10 +1382,10 @@ struct provider { ...@@ -1382,10 +1382,10 @@ struct provider {
}; };
static void check_property_phandle_args(struct check *c, static void check_property_phandle_args(struct check *c,
struct dt_info *dti, struct dt_info *dti,
struct node *node, struct node *node,
struct property *prop, struct property *prop,
const struct provider *provider) const struct provider *provider)
{ {
struct node *root = dti->dt; struct node *root = dti->dt;
unsigned int cell, cellsize = 0; unsigned int cell, cellsize = 0;
...@@ -1401,6 +1401,7 @@ static void check_property_phandle_args(struct check *c, ...@@ -1401,6 +1401,7 @@ static void check_property_phandle_args(struct check *c,
struct node *provider_node; struct node *provider_node;
struct property *cellprop; struct property *cellprop;
cell_t phandle; cell_t phandle;
unsigned int expected;
phandle = propval_cell_n(prop, cell); phandle = propval_cell_n(prop, cell);
/* /*
...@@ -1450,10 +1451,12 @@ static void check_property_phandle_args(struct check *c, ...@@ -1450,10 +1451,12 @@ static void check_property_phandle_args(struct check *c,
break; break;
} }
if (prop->val.len < ((cell + cellsize + 1) * sizeof(cell_t))) { expected = (cell + cellsize + 1) * sizeof(cell_t);
if ((expected <= cell) || prop->val.len < expected) {
FAIL_PROP(c, dti, node, prop, FAIL_PROP(c, dti, node, prop,
"property size (%d) too small for cell size %d", "property size (%d) too small for cell size %u",
prop->val.len, cellsize); prop->val.len, cellsize);
break;
} }
} }
} }
......
...@@ -200,7 +200,7 @@ static void PRINTF(1, 2) lexical_error(const char *fmt, ...); ...@@ -200,7 +200,7 @@ static void PRINTF(1, 2) lexical_error(const char *fmt, ...);
return DT_LABEL_REF; return DT_LABEL_REF;
} }
<*>"&{/"{PATHCHAR}*\} { /* new-style path reference */ <*>"&{"{PATHCHAR}*\} { /* new-style path reference */
yytext[yyleng-1] = '\0'; yytext[yyleng-1] = '\0';
DPRINT("Ref: %s\n", yytext+2); DPRINT("Ref: %s\n", yytext+2);
yylval.labelref = xstrdup(yytext+2); yylval.labelref = xstrdup(yytext+2);
......
...@@ -23,6 +23,12 @@ extern void yyerror(char const *s); ...@@ -23,6 +23,12 @@ extern void yyerror(char const *s);
extern struct dt_info *parser_output; extern struct dt_info *parser_output;
extern bool treesource_error; extern bool treesource_error;
static bool is_ref_relative(const char *ref)
{
return ref[0] != '/' && strchr(&ref[1], '/');
}
%} %}
%union { %union {
...@@ -169,6 +175,8 @@ devicetree: ...@@ -169,6 +175,8 @@ devicetree:
*/ */
if (!($<flags>-1 & DTSF_PLUGIN)) if (!($<flags>-1 & DTSF_PLUGIN))
ERROR(&@2, "Label or path %s not found", $1); ERROR(&@2, "Label or path %s not found", $1);
else if (is_ref_relative($1))
ERROR(&@2, "Label-relative reference %s not supported in plugin", $1);
$$ = add_orphan_node( $$ = add_orphan_node(
name_node(build_node(NULL, NULL, NULL), name_node(build_node(NULL, NULL, NULL),
""), ""),
...@@ -178,6 +186,9 @@ devicetree: ...@@ -178,6 +186,9 @@ devicetree:
{ {
struct node *target = get_node_by_ref($1, $3); struct node *target = get_node_by_ref($1, $3);
if (($<flags>-1 & DTSF_PLUGIN) && is_ref_relative($3))
ERROR(&@2, "Label-relative reference %s not supported in plugin", $3);
if (target) { if (target) {
add_label(&target->labels, $2); add_label(&target->labels, $2);
merge_nodes(target, $4); merge_nodes(target, $4);
...@@ -193,6 +204,8 @@ devicetree: ...@@ -193,6 +204,8 @@ devicetree:
* so $-1 is what we want (plugindecl) * so $-1 is what we want (plugindecl)
*/ */
if ($<flags>-1 & DTSF_PLUGIN) { if ($<flags>-1 & DTSF_PLUGIN) {
if (is_ref_relative($2))
ERROR(&@2, "Label-relative reference %s not supported in plugin", $2);
add_orphan_node($1, $3, $2); add_orphan_node($1, $3, $2);
} else { } else {
struct node *target = get_node_by_ref($1, $2); struct node *target = get_node_by_ref($1, $2);
......
...@@ -106,7 +106,6 @@ int fdt_check_header(const void *fdt) ...@@ -106,7 +106,6 @@ int fdt_check_header(const void *fdt)
} }
hdrsize = fdt_header_size(fdt); hdrsize = fdt_header_size(fdt);
if (!can_assume(VALID_DTB)) { if (!can_assume(VALID_DTB)) {
if ((fdt_totalsize(fdt) < hdrsize) if ((fdt_totalsize(fdt) < hdrsize)
|| (fdt_totalsize(fdt) > INT_MAX)) || (fdt_totalsize(fdt) > INT_MAX))
return -FDT_ERR_TRUNCATED; return -FDT_ERR_TRUNCATED;
...@@ -115,9 +114,7 @@ int fdt_check_header(const void *fdt) ...@@ -115,9 +114,7 @@ int fdt_check_header(const void *fdt)
if (!check_off_(hdrsize, fdt_totalsize(fdt), if (!check_off_(hdrsize, fdt_totalsize(fdt),
fdt_off_mem_rsvmap(fdt))) fdt_off_mem_rsvmap(fdt)))
return -FDT_ERR_TRUNCATED; return -FDT_ERR_TRUNCATED;
}
if (!can_assume(VALID_DTB)) {
/* Bounds check structure block */ /* Bounds check structure block */
if (!can_assume(LATEST) && fdt_version(fdt) < 17) { if (!can_assume(LATEST) && fdt_version(fdt) < 17) {
if (!check_off_(hdrsize, fdt_totalsize(fdt), if (!check_off_(hdrsize, fdt_totalsize(fdt),
...@@ -165,7 +162,7 @@ const void *fdt_offset_ptr(const void *fdt, int offset, unsigned int len) ...@@ -165,7 +162,7 @@ const void *fdt_offset_ptr(const void *fdt, int offset, unsigned int len)
uint32_t fdt_next_tag(const void *fdt, int startoffset, int *nextoffset) uint32_t fdt_next_tag(const void *fdt, int startoffset, int *nextoffset)
{ {
const fdt32_t *tagp, *lenp; const fdt32_t *tagp, *lenp;
uint32_t tag; uint32_t tag, len, sum;
int offset = startoffset; int offset = startoffset;
const char *p; const char *p;
...@@ -191,12 +188,19 @@ uint32_t fdt_next_tag(const void *fdt, int startoffset, int *nextoffset) ...@@ -191,12 +188,19 @@ uint32_t fdt_next_tag(const void *fdt, int startoffset, int *nextoffset)
lenp = fdt_offset_ptr(fdt, offset, sizeof(*lenp)); lenp = fdt_offset_ptr(fdt, offset, sizeof(*lenp));
if (!can_assume(VALID_DTB) && !lenp) if (!can_assume(VALID_DTB) && !lenp)
return FDT_END; /* premature end */ return FDT_END; /* premature end */
len = fdt32_to_cpu(*lenp);
sum = len + offset;
if (!can_assume(VALID_DTB) &&
(INT_MAX <= sum || sum < (uint32_t) offset))
return FDT_END; /* premature end */
/* skip-name offset, length and value */ /* skip-name offset, length and value */
offset += sizeof(struct fdt_property) - FDT_TAGSIZE offset += sizeof(struct fdt_property) - FDT_TAGSIZE + len;
+ fdt32_to_cpu(*lenp);
if (!can_assume(LATEST) && if (!can_assume(LATEST) &&
fdt_version(fdt) < 0x10 && fdt32_to_cpu(*lenp) >= 8 && fdt_version(fdt) < 0x10 && len >= 8 &&
((offset - fdt32_to_cpu(*lenp)) % 8) != 0) ((offset - len) % 8) != 0)
offset += 4; offset += 4;
break; break;
......
...@@ -35,14 +35,14 @@ struct fdt_reserve_entry { ...@@ -35,14 +35,14 @@ struct fdt_reserve_entry {
struct fdt_node_header { struct fdt_node_header {
fdt32_t tag; fdt32_t tag;
char name[]; char name[0];
}; };
struct fdt_property { struct fdt_property {
fdt32_t tag; fdt32_t tag;
fdt32_t len; fdt32_t len;
fdt32_t nameoff; fdt32_t nameoff;
char data[]; char data[0];
}; };
#endif /* !__ASSEMBLY */ #endif /* !__ASSEMBLY */
......
...@@ -73,7 +73,7 @@ int fdt_appendprop_addrrange(void *fdt, int parent, int nodeoffset, ...@@ -73,7 +73,7 @@ int fdt_appendprop_addrrange(void *fdt, int parent, int nodeoffset,
/* check validity of address */ /* check validity of address */
prop = data; prop = data;
if (addr_cells == 1) { if (addr_cells == 1) {
if ((addr > UINT32_MAX) || ((UINT32_MAX + 1 - addr) < size)) if ((addr > UINT32_MAX) || (((uint64_t) UINT32_MAX + 1 - addr) < size))
return -FDT_ERR_BADVALUE; return -FDT_ERR_BADVALUE;
fdt32_st(prop, (uint32_t)addr); fdt32_st(prop, (uint32_t)addr);
......
...@@ -40,37 +40,22 @@ static uint32_t overlay_get_target_phandle(const void *fdto, int fragment) ...@@ -40,37 +40,22 @@ static uint32_t overlay_get_target_phandle(const void *fdto, int fragment)
return fdt32_to_cpu(*val); return fdt32_to_cpu(*val);
} }
/** int fdt_overlay_target_offset(const void *fdt, const void *fdto,
* overlay_get_target - retrieves the offset of a fragment's target int fragment_offset, char const **pathp)
* @fdt: Base device tree blob
* @fdto: Device tree overlay blob
* @fragment: node offset of the fragment in the overlay
* @pathp: pointer which receives the path of the target (or NULL)
*
* overlay_get_target() retrieves the target offset in the base
* device tree of a fragment, no matter how the actual targeting is
* done (through a phandle or a path)
*
* returns:
* the targeted node offset in the base device tree
* Negative error code on error
*/
static int overlay_get_target(const void *fdt, const void *fdto,
int fragment, char const **pathp)
{ {
uint32_t phandle; uint32_t phandle;
const char *path = NULL; const char *path = NULL;
int path_len = 0, ret; int path_len = 0, ret;
/* Try first to do a phandle based lookup */ /* Try first to do a phandle based lookup */
phandle = overlay_get_target_phandle(fdto, fragment); phandle = overlay_get_target_phandle(fdto, fragment_offset);
if (phandle == (uint32_t)-1) if (phandle == (uint32_t)-1)
return -FDT_ERR_BADPHANDLE; return -FDT_ERR_BADPHANDLE;
/* no phandle, try path */ /* no phandle, try path */
if (!phandle) { if (!phandle) {
/* And then a path based lookup */ /* And then a path based lookup */
path = fdt_getprop(fdto, fragment, "target-path", &path_len); path = fdt_getprop(fdto, fragment_offset, "target-path", &path_len);
if (path) if (path)
ret = fdt_path_offset(fdt, path); ret = fdt_path_offset(fdt, path);
else else
...@@ -636,7 +621,7 @@ static int overlay_merge(void *fdt, void *fdto) ...@@ -636,7 +621,7 @@ static int overlay_merge(void *fdt, void *fdto)
if (overlay < 0) if (overlay < 0)
return overlay; return overlay;
target = overlay_get_target(fdt, fdto, fragment, NULL); target = fdt_overlay_target_offset(fdt, fdto, fragment, NULL);
if (target < 0) if (target < 0)
return target; return target;
...@@ -779,7 +764,7 @@ static int overlay_symbol_update(void *fdt, void *fdto) ...@@ -779,7 +764,7 @@ static int overlay_symbol_update(void *fdt, void *fdto)
return -FDT_ERR_BADOVERLAY; return -FDT_ERR_BADOVERLAY;
/* get the target of the fragment */ /* get the target of the fragment */
ret = overlay_get_target(fdt, fdto, fragment, &target_path); ret = fdt_overlay_target_offset(fdt, fdto, fragment, &target_path);
if (ret < 0) if (ret < 0)
return ret; return ret;
target = ret; target = ret;
...@@ -801,7 +786,7 @@ static int overlay_symbol_update(void *fdt, void *fdto) ...@@ -801,7 +786,7 @@ static int overlay_symbol_update(void *fdt, void *fdto)
if (!target_path) { if (!target_path) {
/* again in case setprop_placeholder changed it */ /* again in case setprop_placeholder changed it */
ret = overlay_get_target(fdt, fdto, fragment, &target_path); ret = fdt_overlay_target_offset(fdt, fdto, fragment, &target_path);
if (ret < 0) if (ret < 0)
return ret; return ret;
target = ret; target = ret;
......
...@@ -481,12 +481,12 @@ const void *fdt_getprop_by_offset(const void *fdt, int offset, ...@@ -481,12 +481,12 @@ const void *fdt_getprop_by_offset(const void *fdt, int offset,
if (!can_assume(VALID_INPUT)) { if (!can_assume(VALID_INPUT)) {
name = fdt_get_string(fdt, fdt32_ld_(&prop->nameoff), name = fdt_get_string(fdt, fdt32_ld_(&prop->nameoff),
&namelen); &namelen);
*namep = name;
if (!name) { if (!name) {
if (lenp) if (lenp)
*lenp = namelen; *lenp = namelen;
return NULL; return NULL;
} }
*namep = name;
} else { } else {
*namep = fdt_string(fdt, fdt32_ld_(&prop->nameoff)); *namep = fdt_string(fdt, fdt32_ld_(&prop->nameoff));
} }
......
...@@ -660,6 +660,13 @@ int fdt_next_property_offset(const void *fdt, int offset); ...@@ -660,6 +660,13 @@ int fdt_next_property_offset(const void *fdt, int offset);
const struct fdt_property *fdt_get_property_by_offset(const void *fdt, const struct fdt_property *fdt_get_property_by_offset(const void *fdt,
int offset, int offset,
int *lenp); int *lenp);
static inline struct fdt_property *fdt_get_property_by_offset_w(void *fdt,
int offset,
int *lenp)
{
return (struct fdt_property *)(uintptr_t)
fdt_get_property_by_offset(fdt, offset, lenp);
}
/** /**
* fdt_get_property_namelen - find a property based on substring * fdt_get_property_namelen - find a property based on substring
...@@ -2116,6 +2123,24 @@ int fdt_del_node(void *fdt, int nodeoffset); ...@@ -2116,6 +2123,24 @@ int fdt_del_node(void *fdt, int nodeoffset);
*/ */
int fdt_overlay_apply(void *fdt, void *fdto); int fdt_overlay_apply(void *fdt, void *fdto);
/**
* fdt_overlay_target_offset - retrieves the offset of a fragment's target
* @fdt: Base device tree blob
* @fdto: Device tree overlay blob
* @fragment_offset: node offset of the fragment in the overlay
* @pathp: pointer which receives the path of the target (or NULL)
*
* fdt_overlay_target_offset() retrieves the target offset in the base
* device tree of a fragment, no matter how the actual targeting is
* done (through a phandle or a path)
*
* returns:
* the targeted node offset in the base device tree
* Negative error code on error
*/
int fdt_overlay_target_offset(const void *fdt, const void *fdto,
int fragment_offset, char const **pathp);
/**********************************************************************/ /**********************************************************************/
/* Debugging / informational functions */ /* Debugging / informational functions */
/**********************************************************************/ /**********************************************************************/
......
...@@ -581,12 +581,39 @@ struct node *get_node_by_phandle(struct node *tree, cell_t phandle) ...@@ -581,12 +581,39 @@ struct node *get_node_by_phandle(struct node *tree, cell_t phandle)
struct node *get_node_by_ref(struct node *tree, const char *ref) struct node *get_node_by_ref(struct node *tree, const char *ref)
{ {
struct node *target = tree;
const char *label = NULL, *path = NULL;
if (streq(ref, "/")) if (streq(ref, "/"))
return tree; return tree;
else if (ref[0] == '/')
return get_node_by_path(tree, ref); if (ref[0] == '/')
path = ref;
else else
return get_node_by_label(tree, ref); label = ref;
if (label) {
const char *slash = strchr(label, '/');
char *buf = NULL;
if (slash) {
buf = xstrndup(label, slash - label);
label = buf;
path = slash + 1;
}
target = get_node_by_label(tree, label);
free(buf);
if (!target)
return NULL;
}
if (path)
target = get_node_by_path(target, path);
return target;
} }
cell_t get_node_phandle(struct node *root, struct node *node) cell_t get_node_phandle(struct node *root, struct node *node)
...@@ -892,6 +919,12 @@ static void add_fixup_entry(struct dt_info *dti, struct node *fn, ...@@ -892,6 +919,12 @@ static void add_fixup_entry(struct dt_info *dti, struct node *fn,
/* m->ref can only be a REF_PHANDLE, but check anyway */ /* m->ref can only be a REF_PHANDLE, but check anyway */
assert(m->type == REF_PHANDLE); assert(m->type == REF_PHANDLE);
/* The format only permits fixups for references to label, not
* references to path */
if (strchr(m->ref, '/'))
die("Can't generate fixup for reference to path &{%s}\n",
m->ref);
/* there shouldn't be any ':' in the arguments */ /* there shouldn't be any ':' in the arguments */
if (strchr(node->fullpath, ':') || strchr(prop->name, ':')) if (strchr(node->fullpath, ':') || strchr(prop->name, ':'))
die("arguments should not contain ':'\n"); die("arguments should not contain ':'\n");
......
...@@ -33,6 +33,17 @@ char *xstrdup(const char *s) ...@@ -33,6 +33,17 @@ char *xstrdup(const char *s)
return d; return d;
} }
char *xstrndup(const char *s, size_t n)
{
size_t len = strnlen(s, n) + 1;
char *d = xmalloc(len);
memcpy(d, s, len - 1);
d[len - 1] = '\0';
return d;
}
int xavsprintf_append(char **strp, const char *fmt, va_list ap) int xavsprintf_append(char **strp, const char *fmt, va_list ap)
{ {
int n, size = 0; /* start with 128 bytes */ int n, size = 0; /* start with 128 bytes */
...@@ -353,11 +364,11 @@ int utilfdt_decode_type(const char *fmt, int *type, int *size) ...@@ -353,11 +364,11 @@ int utilfdt_decode_type(const char *fmt, int *type, int *size)
} }
/* we should now have a type */ /* we should now have a type */
if ((*fmt == '\0') || !strchr("iuxs", *fmt)) if ((*fmt == '\0') || !strchr("iuxsr", *fmt))
return -1; return -1;
/* convert qualifier (bhL) to byte size */ /* convert qualifier (bhL) to byte size */
if (*fmt != 's') if (*fmt != 's' && *fmt != 'r')
*size = qualifier == 'b' ? 1 : *size = qualifier == 'b' ? 1 :
qualifier == 'h' ? 2 : qualifier == 'h' ? 2 :
qualifier == 'l' ? 4 : -1; qualifier == 'l' ? 4 : -1;
......
...@@ -61,6 +61,7 @@ static inline void *xrealloc(void *p, size_t len) ...@@ -61,6 +61,7 @@ static inline void *xrealloc(void *p, size_t len)
} }
extern char *xstrdup(const char *s); extern char *xstrdup(const char *s);
extern char *xstrndup(const char *s, size_t len);
extern int PRINTF(2, 3) xasprintf(char **strp, const char *fmt, ...); extern int PRINTF(2, 3) xasprintf(char **strp, const char *fmt, ...);
extern int PRINTF(2, 3) xasprintf_append(char **strp, const char *fmt, ...); extern int PRINTF(2, 3) xasprintf_append(char **strp, const char *fmt, ...);
...@@ -143,6 +144,7 @@ int utilfdt_write_err(const char *filename, const void *blob); ...@@ -143,6 +144,7 @@ int utilfdt_write_err(const char *filename, const void *blob);
* i signed integer * i signed integer
* u unsigned integer * u unsigned integer
* x hex * x hex
* r raw
* *
* TODO: Implement ll modifier (8 bytes) * TODO: Implement ll modifier (8 bytes)
* TODO: Implement o type (octal) * TODO: Implement o type (octal)
...@@ -160,7 +162,7 @@ int utilfdt_decode_type(const char *fmt, int *type, int *size); ...@@ -160,7 +162,7 @@ int utilfdt_decode_type(const char *fmt, int *type, int *size);
*/ */
#define USAGE_TYPE_MSG \ #define USAGE_TYPE_MSG \
"<type>\ts=string, i=int, u=unsigned, x=hex\n" \ "<type>\ts=string, i=int, u=unsigned, x=hex, r=raw\n" \
"\tOptional modifier prefix:\n" \ "\tOptional modifier prefix:\n" \
"\t\thh or b=byte, h=2 byte, l=4 byte (default)"; "\t\thh or b=byte, h=2 byte, l=4 byte (default)";
......
#define DTC_VERSION "DTC 1.6.1-g0a3a9d34" #define DTC_VERSION "DTC 1.6.1-g55778a03"
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