Commit 54fe3ffe authored by Linus Torvalds's avatar Linus Torvalds

Merge tag 'arm-soc-fixes-v5.11-3' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc

Pull ARM SoC fixes from Arnd Bergmann:
 "The code fixes in this round are all for the Texas Instruments OMAP
  platform, addressing several regressions related to the ti-sysc
  interconnect changes that was merged in linux-5.11 and one recently
  introduced RCU usage warning.

  Tero Kristo updates his maintainer file entries as he is changing to a
  new employer.

  The other changes are for devicetree files across eight different
  platforms:

  TI OMAP:
   - multiple gpio related one-line fixes

  Allwinner/sunxi:
   - ARM: dts: sun7i: a20: bananapro: Fix ethernet phy-mode
   - soc: sunxi: mbus: Remove DE2 display engine compatibles

  NXP lpc32xx:
   - ARM: dts: lpc32xx: Revert set default clock rate of HCLK PLL

  STMicroelectronics stm32
   - multiple minor fixes for DHCOM/DHCOR boards

  NXP Layerscape:
   - Fix DCFG address range on LS1046A SoC

  Amlogic meson:
   - fix reboot issue on odroid C4
   - revert an ethernet change that caused a regression
   - meson-g12: Set FL-adj property value

  Rockchip:
   - multiple minor fixes on 64-bit rockchip machines

  Qualcomm:
   - Regression fixes for Lenovo Yoga touchpad and for interconnect
     configuration
   - Boot fixes for 'LPASS' clock configuration on two machines"

* tag 'arm-soc-fixes-v5.11-3' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc: (31 commits)
  ARM: dts: lpc32xx: Revert set default clock rate of HCLK PLL
  ARM: dts: sun7i: a20: bananapro: Fix ethernet phy-mode
  arm64: dts: ls1046a: fix dcfg address range
  soc: sunxi: mbus: Remove DE2 display engine compatibles
  arm64: dts: meson: switch TFLASH_VDD_EN pin to open drain on Odroid-C4
  Revert "arm64: dts: amlogic: add missing ethernet reset ID"
  arm64: dts: rockchip: Disable display for NanoPi R2S
  ARM: dts: omap4-droid4: Fix lost keypad slide interrupts for droid4
  arm64: dts: rockchip: remove interrupt-names property from rk3399 vdec node
  drivers: bus: simple-pm-bus: Fix compatibility with simple-bus for auxdata
  ARM: OMAP2+: Fix booting for am335x after moving to simple-pm-bus
  ARM: OMAP2+: Fix suspcious RCU usage splats for omap_enter_idle_coupled
  ARM: dts: stm32: Fix GPIO hog flags on DHCOM DRC02
  ARM: dts: stm32: Fix GPIO hog flags on DHCOM PicoITX
  ARM: dts: stm32: Fix GPIO hog names on DHCOM
  ARM: dts: stm32: Disable optional TSC2004 on DRC02 board
  ARM: dts: stm32: Disable WP on DHCOM uSD slot
  ARM: dts: stm32: Connect card-detect signal on DHCOM
  ARM: dts: stm32: Fix polarity of the DH DRC02 uSD card detect
  arm64: dts: qcom: sdm845: Reserve LPASS clocks in gcc
  ...
parents 40615974 459630a3
...@@ -2616,8 +2616,8 @@ S: Maintained ...@@ -2616,8 +2616,8 @@ S: Maintained
F: drivers/power/reset/keystone-reset.c F: drivers/power/reset/keystone-reset.c
ARM/TEXAS INSTRUMENTS K3 ARCHITECTURE ARM/TEXAS INSTRUMENTS K3 ARCHITECTURE
M: Tero Kristo <t-kristo@ti.com>
M: Nishanth Menon <nm@ti.com> M: Nishanth Menon <nm@ti.com>
M: Tero Kristo <kristo@kernel.org>
L: linux-arm-kernel@lists.infradead.org (moderated for non-subscribers) L: linux-arm-kernel@lists.infradead.org (moderated for non-subscribers)
S: Supported S: Supported
F: Documentation/devicetree/bindings/arm/ti/k3.yaml F: Documentation/devicetree/bindings/arm/ti/k3.yaml
...@@ -6474,9 +6474,9 @@ S: Maintained ...@@ -6474,9 +6474,9 @@ S: Maintained
F: drivers/edac/skx_*.[ch] F: drivers/edac/skx_*.[ch]
EDAC-TI EDAC-TI
M: Tero Kristo <t-kristo@ti.com> M: Tero Kristo <kristo@kernel.org>
L: linux-edac@vger.kernel.org L: linux-edac@vger.kernel.org
S: Maintained S: Odd Fixes
F: drivers/edac/ti_edac.c F: drivers/edac/ti_edac.c
EDIROL UA-101/UA-1000 DRIVER EDIROL UA-101/UA-1000 DRIVER
...@@ -17572,7 +17572,7 @@ F: include/linux/dma/k3-psil.h ...@@ -17572,7 +17572,7 @@ F: include/linux/dma/k3-psil.h
TEXAS INSTRUMENTS' SYSTEM CONTROL INTERFACE (TISCI) PROTOCOL DRIVER TEXAS INSTRUMENTS' SYSTEM CONTROL INTERFACE (TISCI) PROTOCOL DRIVER
M: Nishanth Menon <nm@ti.com> M: Nishanth Menon <nm@ti.com>
M: Tero Kristo <t-kristo@ti.com> M: Tero Kristo <kristo@kernel.org>
M: Santosh Shilimkar <ssantosh@kernel.org> M: Santosh Shilimkar <ssantosh@kernel.org>
L: linux-arm-kernel@lists.infradead.org L: linux-arm-kernel@lists.infradead.org
S: Maintained S: Maintained
...@@ -17716,9 +17716,9 @@ S: Maintained ...@@ -17716,9 +17716,9 @@ S: Maintained
F: drivers/clk/clk-cdce706.c F: drivers/clk/clk-cdce706.c
TI CLOCK DRIVER TI CLOCK DRIVER
M: Tero Kristo <t-kristo@ti.com> M: Tero Kristo <kristo@kernel.org>
L: linux-omap@vger.kernel.org L: linux-omap@vger.kernel.org
S: Maintained S: Odd Fixes
F: drivers/clk/ti/ F: drivers/clk/ti/
F: include/linux/clk/ti.h F: include/linux/clk/ti.h
......
...@@ -326,9 +326,6 @@ clk: clock-controller@0 { ...@@ -326,9 +326,6 @@ clk: clock-controller@0 {
clocks = <&xtal_32k>, <&xtal>; clocks = <&xtal_32k>, <&xtal>;
clock-names = "xtal_32k", "xtal"; clock-names = "xtal_32k", "xtal";
assigned-clocks = <&clk LPC32XX_CLK_HCLK_PLL>;
assigned-clock-rates = <208000000>;
}; };
}; };
......
...@@ -114,7 +114,7 @@ spi_lcd: spi_lcd { ...@@ -114,7 +114,7 @@ spi_lcd: spi_lcd {
gpio-sck = <&gpio1 12 GPIO_ACTIVE_HIGH>; gpio-sck = <&gpio1 12 GPIO_ACTIVE_HIGH>;
gpio-miso = <&gpio1 18 GPIO_ACTIVE_HIGH>; gpio-miso = <&gpio1 18 GPIO_ACTIVE_HIGH>;
gpio-mosi = <&gpio1 20 GPIO_ACTIVE_HIGH>; gpio-mosi = <&gpio1 20 GPIO_ACTIVE_HIGH>;
cs-gpios = <&gpio1 19 GPIO_ACTIVE_HIGH>; cs-gpios = <&gpio1 19 GPIO_ACTIVE_LOW>;
num-chipselects = <1>; num-chipselects = <1>;
/* lcd panel */ /* lcd panel */
...@@ -124,7 +124,6 @@ lcd: td028ttec1@0 { ...@@ -124,7 +124,6 @@ lcd: td028ttec1@0 {
spi-max-frequency = <100000>; spi-max-frequency = <100000>;
spi-cpol; spi-cpol;
spi-cpha; spi-cpha;
spi-cs-high;
backlight= <&backlight>; backlight= <&backlight>;
label = "lcd"; label = "lcd";
......
...@@ -16,8 +16,13 @@ volume_down { ...@@ -16,8 +16,13 @@ volume_down {
debounce-interval = <10>; debounce-interval = <10>;
}; };
/*
* We use pad 0x4a100116 abe_dmic_din3.gpio_122 as the irq instead
* of the gpio interrupt to avoid lost events in deeper idle states.
*/
slider { slider {
label = "Keypad Slide"; label = "Keypad Slide";
interrupts-extended = <&omap4_pmx_core 0xd6>;
gpios = <&gpio4 26 GPIO_ACTIVE_HIGH>; /* gpio122 */ gpios = <&gpio4 26 GPIO_ACTIVE_HIGH>; /* gpio122 */
linux,input-type = <EV_SW>; linux,input-type = <EV_SW>;
linux,code = <SW_KEYPAD_SLIDE>; linux,code = <SW_KEYPAD_SLIDE>;
......
...@@ -33,9 +33,9 @@ &gpiob { ...@@ -33,9 +33,9 @@ &gpiob {
* during TX anyway and that it only controls drive enable DE * during TX anyway and that it only controls drive enable DE
* line. Hence, the RX is always enabled here. * line. Hence, the RX is always enabled here.
*/ */
rs485-rx-en { rs485-rx-en-hog {
gpio-hog; gpio-hog;
gpios = <8 GPIO_ACTIVE_HIGH>; gpios = <8 0>;
output-low; output-low;
line-name = "rs485-rx-en"; line-name = "rs485-rx-en";
}; };
...@@ -61,9 +61,9 @@ &gpioi { ...@@ -61,9 +61,9 @@ &gpioi {
* order to reset the Hub when USB bus is powered down, but * order to reset the Hub when USB bus is powered down, but
* so far there is no such functionality. * so far there is no such functionality.
*/ */
usb-hub { usb-hub-hog {
gpio-hog; gpio-hog;
gpios = <2 GPIO_ACTIVE_HIGH>; gpios = <2 0>;
output-high; output-high;
line-name = "usb-hub-reset"; line-name = "usb-hub-reset";
}; };
...@@ -87,6 +87,12 @@ eeprom@50 { ...@@ -87,6 +87,12 @@ eeprom@50 {
}; };
}; };
&i2c4 {
touchscreen@49 {
status = "disabled";
};
};
&i2c5 { /* TP7/TP8 */ &i2c5 { /* TP7/TP8 */
pinctrl-names = "default"; pinctrl-names = "default";
pinctrl-0 = <&i2c5_pins_a>; pinctrl-0 = <&i2c5_pins_a>;
...@@ -104,7 +110,7 @@ &sdmmc3 { ...@@ -104,7 +110,7 @@ &sdmmc3 {
* are used for on-board microSD slot instead. * are used for on-board microSD slot instead.
*/ */
/delete-property/broken-cd; /delete-property/broken-cd;
cd-gpios = <&gpioi 10 (GPIO_ACTIVE_LOW | GPIO_PULL_UP)>; cd-gpios = <&gpioi 10 GPIO_ACTIVE_HIGH>;
disable-wp; disable-wp;
}; };
......
...@@ -43,9 +43,9 @@ &gpioa { ...@@ -43,9 +43,9 @@ &gpioa {
* in order to turn on port power when USB bus is powered up, but so * in order to turn on port power when USB bus is powered up, but so
* far there is no such functionality. * far there is no such functionality.
*/ */
usb-port-power { usb-port-power-hog {
gpio-hog; gpio-hog;
gpios = <13 GPIO_ACTIVE_LOW>; gpios = <13 0>;
output-low; output-low;
line-name = "usb-port-power"; line-name = "usb-port-power";
}; };
......
...@@ -390,7 +390,8 @@ &sdmmc1 { ...@@ -390,7 +390,8 @@ &sdmmc1 {
pinctrl-0 = <&sdmmc1_b4_pins_a &sdmmc1_dir_pins_a>; pinctrl-0 = <&sdmmc1_b4_pins_a &sdmmc1_dir_pins_a>;
pinctrl-1 = <&sdmmc1_b4_od_pins_a &sdmmc1_dir_pins_a>; pinctrl-1 = <&sdmmc1_b4_od_pins_a &sdmmc1_dir_pins_a>;
pinctrl-2 = <&sdmmc1_b4_sleep_pins_a &sdmmc1_dir_sleep_pins_a>; pinctrl-2 = <&sdmmc1_b4_sleep_pins_a &sdmmc1_dir_sleep_pins_a>;
broken-cd; cd-gpios = <&gpiog 1 (GPIO_ACTIVE_LOW | GPIO_PULL_UP)>;
disable-wp;
st,sig-dir; st,sig-dir;
st,neg-edge; st,neg-edge;
st,use-ckin; st,use-ckin;
......
...@@ -110,7 +110,7 @@ &gmac { ...@@ -110,7 +110,7 @@ &gmac {
pinctrl-names = "default"; pinctrl-names = "default";
pinctrl-0 = <&gmac_rgmii_pins>; pinctrl-0 = <&gmac_rgmii_pins>;
phy-handle = <&phy1>; phy-handle = <&phy1>;
phy-mode = "rgmii"; phy-mode = "rgmii-id";
phy-supply = <&reg_gmac_3v3>; phy-supply = <&reg_gmac_3v3>;
status = "okay"; status = "okay";
}; };
......
...@@ -203,6 +203,8 @@ static int osk_tps_setup(struct i2c_client *client, void *context) ...@@ -203,6 +203,8 @@ static int osk_tps_setup(struct i2c_client *client, void *context)
*/ */
gpio_request(OSK_TPS_GPIO_USB_PWR_EN, "n_vbus_en"); gpio_request(OSK_TPS_GPIO_USB_PWR_EN, "n_vbus_en");
gpio_direction_output(OSK_TPS_GPIO_USB_PWR_EN, 1); gpio_direction_output(OSK_TPS_GPIO_USB_PWR_EN, 1);
/* Free the GPIO again as the driver will request it */
gpio_free(OSK_TPS_GPIO_USB_PWR_EN);
/* Set GPIO 2 high so LED D3 is off by default */ /* Set GPIO 2 high so LED D3 is off by default */
tps65010_set_gpio_out_value(GPIO2, HIGH); tps65010_set_gpio_out_value(GPIO2, HIGH);
......
...@@ -17,11 +17,10 @@ config ARCH_OMAP3 ...@@ -17,11 +17,10 @@ config ARCH_OMAP3
bool "TI OMAP3" bool "TI OMAP3"
depends on ARCH_MULTI_V7 depends on ARCH_MULTI_V7
select ARCH_OMAP2PLUS select ARCH_OMAP2PLUS
select ARM_CPU_SUSPEND if PM select ARM_CPU_SUSPEND
select OMAP_HWMOD select OMAP_HWMOD
select OMAP_INTERCONNECT select OMAP_INTERCONNECT
select PM_OPP if PM select PM_OPP
select PM if CPU_IDLE
select SOC_HAS_OMAP2_SDRC select SOC_HAS_OMAP2_SDRC
select ARM_ERRATA_430973 select ARM_ERRATA_430973
...@@ -30,7 +29,7 @@ config ARCH_OMAP4 ...@@ -30,7 +29,7 @@ config ARCH_OMAP4
depends on ARCH_MULTI_V7 depends on ARCH_MULTI_V7
select ARCH_OMAP2PLUS select ARCH_OMAP2PLUS
select ARCH_NEEDS_CPU_IDLE_COUPLED if SMP select ARCH_NEEDS_CPU_IDLE_COUPLED if SMP
select ARM_CPU_SUSPEND if PM select ARM_CPU_SUSPEND
select ARM_ERRATA_720789 select ARM_ERRATA_720789
select ARM_GIC select ARM_GIC
select HAVE_ARM_SCU if SMP select HAVE_ARM_SCU if SMP
...@@ -40,7 +39,7 @@ config ARCH_OMAP4 ...@@ -40,7 +39,7 @@ config ARCH_OMAP4
select OMAP_INTERCONNECT_BARRIER select OMAP_INTERCONNECT_BARRIER
select PL310_ERRATA_588369 if CACHE_L2X0 select PL310_ERRATA_588369 if CACHE_L2X0
select PL310_ERRATA_727915 if CACHE_L2X0 select PL310_ERRATA_727915 if CACHE_L2X0
select PM_OPP if PM select PM_OPP
select PM if CPU_IDLE select PM if CPU_IDLE
select ARM_ERRATA_754322 select ARM_ERRATA_754322
select ARM_ERRATA_775420 select ARM_ERRATA_775420
...@@ -50,7 +49,7 @@ config SOC_OMAP5 ...@@ -50,7 +49,7 @@ config SOC_OMAP5
bool "TI OMAP5" bool "TI OMAP5"
depends on ARCH_MULTI_V7 depends on ARCH_MULTI_V7
select ARCH_OMAP2PLUS select ARCH_OMAP2PLUS
select ARM_CPU_SUSPEND if PM select ARM_CPU_SUSPEND
select ARM_GIC select ARM_GIC
select HAVE_ARM_SCU if SMP select HAVE_ARM_SCU if SMP
select HAVE_ARM_ARCH_TIMER select HAVE_ARM_ARCH_TIMER
...@@ -58,14 +57,14 @@ config SOC_OMAP5 ...@@ -58,14 +57,14 @@ config SOC_OMAP5
select OMAP_HWMOD select OMAP_HWMOD
select OMAP_INTERCONNECT select OMAP_INTERCONNECT
select OMAP_INTERCONNECT_BARRIER select OMAP_INTERCONNECT_BARRIER
select PM_OPP if PM select PM_OPP
select ZONE_DMA if ARM_LPAE select ZONE_DMA if ARM_LPAE
config SOC_AM33XX config SOC_AM33XX
bool "TI AM33XX" bool "TI AM33XX"
depends on ARCH_MULTI_V7 depends on ARCH_MULTI_V7
select ARCH_OMAP2PLUS select ARCH_OMAP2PLUS
select ARM_CPU_SUSPEND if PM select ARM_CPU_SUSPEND
config SOC_AM43XX config SOC_AM43XX
bool "TI AM43x" bool "TI AM43x"
...@@ -79,13 +78,13 @@ config SOC_AM43XX ...@@ -79,13 +78,13 @@ config SOC_AM43XX
select ARM_ERRATA_754322 select ARM_ERRATA_754322
select ARM_ERRATA_775420 select ARM_ERRATA_775420
select OMAP_INTERCONNECT select OMAP_INTERCONNECT
select ARM_CPU_SUSPEND if PM select ARM_CPU_SUSPEND
config SOC_DRA7XX config SOC_DRA7XX
bool "TI DRA7XX" bool "TI DRA7XX"
depends on ARCH_MULTI_V7 depends on ARCH_MULTI_V7
select ARCH_OMAP2PLUS select ARCH_OMAP2PLUS
select ARM_CPU_SUSPEND if PM select ARM_CPU_SUSPEND
select ARM_GIC select ARM_GIC
select HAVE_ARM_SCU if SMP select HAVE_ARM_SCU if SMP
select HAVE_ARM_ARCH_TIMER select HAVE_ARM_ARCH_TIMER
...@@ -94,7 +93,7 @@ config SOC_DRA7XX ...@@ -94,7 +93,7 @@ config SOC_DRA7XX
select OMAP_HWMOD select OMAP_HWMOD
select OMAP_INTERCONNECT select OMAP_INTERCONNECT
select OMAP_INTERCONNECT_BARRIER select OMAP_INTERCONNECT_BARRIER
select PM_OPP if PM select PM_OPP
select ZONE_DMA if ARM_LPAE select ZONE_DMA if ARM_LPAE
select PINCTRL_TI_IODELAY if OF && PINCTRL select PINCTRL_TI_IODELAY if OF && PINCTRL
...@@ -112,9 +111,11 @@ config ARCH_OMAP2PLUS ...@@ -112,9 +111,11 @@ config ARCH_OMAP2PLUS
select OMAP_DM_TIMER select OMAP_DM_TIMER
select OMAP_GPMC select OMAP_GPMC
select PINCTRL select PINCTRL
select PM_GENERIC_DOMAINS if PM select PM
select PM_GENERIC_DOMAINS_OF if PM select PM_GENERIC_DOMAINS
select PM_GENERIC_DOMAINS_OF
select RESET_CONTROLLER select RESET_CONTROLLER
select SIMPLE_PM_BUS
select SOC_BUS select SOC_BUS
select TI_SYSC select TI_SYSC
select OMAP_IRQCHIP select OMAP_IRQCHIP
...@@ -140,7 +141,6 @@ config ARCH_OMAP2PLUS_TYPICAL ...@@ -140,7 +141,6 @@ config ARCH_OMAP2PLUS_TYPICAL
select I2C_OMAP select I2C_OMAP
select MENELAUS if ARCH_OMAP2 select MENELAUS if ARCH_OMAP2
select NEON if CPU_V7 select NEON if CPU_V7
select PM
select REGULATOR select REGULATOR
select REGULATOR_FIXED_VOLTAGE select REGULATOR_FIXED_VOLTAGE
select TWL4030_CORE if ARCH_OMAP3 || ARCH_OMAP4 select TWL4030_CORE if ARCH_OMAP3 || ARCH_OMAP4
......
...@@ -151,10 +151,10 @@ static int omap_enter_idle_coupled(struct cpuidle_device *dev, ...@@ -151,10 +151,10 @@ static int omap_enter_idle_coupled(struct cpuidle_device *dev,
(cx->mpu_logic_state == PWRDM_POWER_OFF); (cx->mpu_logic_state == PWRDM_POWER_OFF);
/* Enter broadcast mode for periodic timers */ /* Enter broadcast mode for periodic timers */
tick_broadcast_enable(); RCU_NONIDLE(tick_broadcast_enable());
/* Enter broadcast mode for one-shot timers */ /* Enter broadcast mode for one-shot timers */
tick_broadcast_enter(); RCU_NONIDLE(tick_broadcast_enter());
/* /*
* Call idle CPU PM enter notifier chain so that * Call idle CPU PM enter notifier chain so that
...@@ -166,7 +166,7 @@ static int omap_enter_idle_coupled(struct cpuidle_device *dev, ...@@ -166,7 +166,7 @@ static int omap_enter_idle_coupled(struct cpuidle_device *dev,
if (dev->cpu == 0) { if (dev->cpu == 0) {
pwrdm_set_logic_retst(mpu_pd, cx->mpu_logic_state); pwrdm_set_logic_retst(mpu_pd, cx->mpu_logic_state);
omap_set_pwrdm_state(mpu_pd, cx->mpu_state); RCU_NONIDLE(omap_set_pwrdm_state(mpu_pd, cx->mpu_state));
/* /*
* Call idle CPU cluster PM enter notifier chain * Call idle CPU cluster PM enter notifier chain
...@@ -178,7 +178,7 @@ static int omap_enter_idle_coupled(struct cpuidle_device *dev, ...@@ -178,7 +178,7 @@ static int omap_enter_idle_coupled(struct cpuidle_device *dev,
index = 0; index = 0;
cx = state_ptr + index; cx = state_ptr + index;
pwrdm_set_logic_retst(mpu_pd, cx->mpu_logic_state); pwrdm_set_logic_retst(mpu_pd, cx->mpu_logic_state);
omap_set_pwrdm_state(mpu_pd, cx->mpu_state); RCU_NONIDLE(omap_set_pwrdm_state(mpu_pd, cx->mpu_state));
mpuss_can_lose_context = 0; mpuss_can_lose_context = 0;
} }
} }
...@@ -194,9 +194,9 @@ static int omap_enter_idle_coupled(struct cpuidle_device *dev, ...@@ -194,9 +194,9 @@ static int omap_enter_idle_coupled(struct cpuidle_device *dev,
mpuss_can_lose_context) mpuss_can_lose_context)
gic_dist_disable(); gic_dist_disable();
clkdm_deny_idle(cpu_clkdm[1]); RCU_NONIDLE(clkdm_deny_idle(cpu_clkdm[1]));
omap_set_pwrdm_state(cpu_pd[1], PWRDM_POWER_ON); RCU_NONIDLE(omap_set_pwrdm_state(cpu_pd[1], PWRDM_POWER_ON));
clkdm_allow_idle(cpu_clkdm[1]); RCU_NONIDLE(clkdm_allow_idle(cpu_clkdm[1]));
if (IS_PM44XX_ERRATUM(PM_OMAP4_ROM_SMP_BOOT_ERRATUM_GICD) && if (IS_PM44XX_ERRATUM(PM_OMAP4_ROM_SMP_BOOT_ERRATUM_GICD) &&
mpuss_can_lose_context) { mpuss_can_lose_context) {
...@@ -222,7 +222,7 @@ static int omap_enter_idle_coupled(struct cpuidle_device *dev, ...@@ -222,7 +222,7 @@ static int omap_enter_idle_coupled(struct cpuidle_device *dev,
cpu_pm_exit(); cpu_pm_exit();
cpu_pm_out: cpu_pm_out:
tick_broadcast_exit(); RCU_NONIDLE(tick_broadcast_exit());
fail: fail:
cpuidle_coupled_parallel_barrier(dev, &abort_barrier); cpuidle_coupled_parallel_barrier(dev, &abort_barrier);
......
...@@ -522,6 +522,7 @@ static struct of_dev_auxdata omap_auxdata_lookup[] = { ...@@ -522,6 +522,7 @@ static struct of_dev_auxdata omap_auxdata_lookup[] = {
&dra7_ipu1_dsp_iommu_pdata), &dra7_ipu1_dsp_iommu_pdata),
#endif #endif
/* Common auxdata */ /* Common auxdata */
OF_DEV_AUXDATA("simple-pm-bus", 0, NULL, omap_auxdata_lookup),
OF_DEV_AUXDATA("ti,sysc", 0, NULL, &ti_sysc_pdata), OF_DEV_AUXDATA("ti,sysc", 0, NULL, &ti_sysc_pdata),
OF_DEV_AUXDATA("pinctrl-single", 0, NULL, &pcs_pdata), OF_DEV_AUXDATA("pinctrl-single", 0, NULL, &pcs_pdata),
OF_DEV_AUXDATA("ti,omap-prm-inst", 0, NULL, &ti_prm_pdata), OF_DEV_AUXDATA("ti,omap-prm-inst", 0, NULL, &ti_prm_pdata),
......
...@@ -280,8 +280,6 @@ ethmac: ethernet@ff3f0000 { ...@@ -280,8 +280,6 @@ ethmac: ethernet@ff3f0000 {
"timing-adjustment"; "timing-adjustment";
rx-fifo-depth = <4096>; rx-fifo-depth = <4096>;
tx-fifo-depth = <2048>; tx-fifo-depth = <2048>;
resets = <&reset RESET_ETHERNET>;
reset-names = "stmmaceth";
power-domains = <&pwrc PWRC_AXG_ETHERNET_MEM_ID>; power-domains = <&pwrc PWRC_AXG_ETHERNET_MEM_ID>;
status = "disabled"; status = "disabled";
}; };
......
...@@ -224,8 +224,6 @@ ethmac: ethernet@ff3f0000 { ...@@ -224,8 +224,6 @@ ethmac: ethernet@ff3f0000 {
"timing-adjustment"; "timing-adjustment";
rx-fifo-depth = <4096>; rx-fifo-depth = <4096>;
tx-fifo-depth = <2048>; tx-fifo-depth = <2048>;
resets = <&reset RESET_ETHERNET>;
reset-names = "stmmaceth";
status = "disabled"; status = "disabled";
mdio0: mdio { mdio0: mdio {
...@@ -2390,7 +2388,7 @@ dwc3: usb@ff500000 { ...@@ -2390,7 +2388,7 @@ dwc3: usb@ff500000 {
interrupts = <GIC_SPI 30 IRQ_TYPE_LEVEL_HIGH>; interrupts = <GIC_SPI 30 IRQ_TYPE_LEVEL_HIGH>;
dr_mode = "host"; dr_mode = "host";
snps,dis_u2_susphy_quirk; snps,dis_u2_susphy_quirk;
snps,quirk-frame-length-adjustment; snps,quirk-frame-length-adjustment = <0x20>;
snps,parkmode-disable-ss-quirk; snps,parkmode-disable-ss-quirk;
}; };
}; };
......
...@@ -13,7 +13,6 @@ ...@@ -13,7 +13,6 @@
#include <dt-bindings/interrupt-controller/irq.h> #include <dt-bindings/interrupt-controller/irq.h>
#include <dt-bindings/interrupt-controller/arm-gic.h> #include <dt-bindings/interrupt-controller/arm-gic.h>
#include <dt-bindings/power/meson-gxbb-power.h> #include <dt-bindings/power/meson-gxbb-power.h>
#include <dt-bindings/reset/amlogic,meson-gxbb-reset.h>
#include <dt-bindings/thermal/thermal.h> #include <dt-bindings/thermal/thermal.h>
/ { / {
...@@ -576,8 +575,6 @@ ethmac: ethernet@c9410000 { ...@@ -576,8 +575,6 @@ ethmac: ethernet@c9410000 {
interrupt-names = "macirq"; interrupt-names = "macirq";
rx-fifo-depth = <4096>; rx-fifo-depth = <4096>;
tx-fifo-depth = <2048>; tx-fifo-depth = <2048>;
resets = <&reset RESET_ETHERNET>;
reset-names = "stmmaceth";
power-domains = <&pwrc PWRC_GXBB_ETHERNET_MEM_ID>; power-domains = <&pwrc PWRC_GXBB_ETHERNET_MEM_ID>;
status = "disabled"; status = "disabled";
}; };
......
...@@ -52,7 +52,7 @@ tflash_vdd: regulator-tflash_vdd { ...@@ -52,7 +52,7 @@ tflash_vdd: regulator-tflash_vdd {
regulator-min-microvolt = <3300000>; regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>; regulator-max-microvolt = <3300000>;
gpio = <&gpio_ao GPIOAO_3 GPIO_ACTIVE_HIGH>; gpio = <&gpio_ao GPIOAO_3 GPIO_OPEN_DRAIN>;
enable-active-high; enable-active-high;
regulator-always-on; regulator-always-on;
}; };
......
...@@ -385,7 +385,7 @@ bportals: bman-portals@508000000 { ...@@ -385,7 +385,7 @@ bportals: bman-portals@508000000 {
dcfg: dcfg@1ee0000 { dcfg: dcfg@1ee0000 {
compatible = "fsl,ls1046a-dcfg", "syscon"; compatible = "fsl,ls1046a-dcfg", "syscon";
reg = <0x0 0x1ee0000 0x0 0x10000>; reg = <0x0 0x1ee0000 0x0 0x1000>;
big-endian; big-endian;
}; };
......
...@@ -415,7 +415,9 @@ &dsi0_phy { ...@@ -415,7 +415,9 @@ &dsi0_phy {
&gcc { &gcc {
protected-clocks = <GCC_QSPI_CORE_CLK>, protected-clocks = <GCC_QSPI_CORE_CLK>,
<GCC_QSPI_CORE_CLK_SRC>, <GCC_QSPI_CORE_CLK_SRC>,
<GCC_QSPI_CNOC_PERIPH_AHB_CLK>; <GCC_QSPI_CNOC_PERIPH_AHB_CLK>,
<GCC_LPASS_Q6_AXI_CLK>,
<GCC_LPASS_SWAY_CLK>;
}; };
&gpu { &gpu {
......
...@@ -302,7 +302,9 @@ &dsi0_phy { ...@@ -302,7 +302,9 @@ &dsi0_phy {
&gcc { &gcc {
protected-clocks = <GCC_QSPI_CORE_CLK>, protected-clocks = <GCC_QSPI_CORE_CLK>,
<GCC_QSPI_CORE_CLK_SRC>, <GCC_QSPI_CORE_CLK_SRC>,
<GCC_QSPI_CNOC_PERIPH_AHB_CLK>; <GCC_QSPI_CNOC_PERIPH_AHB_CLK>,
<GCC_LPASS_Q6_AXI_CLK>,
<GCC_LPASS_SWAY_CLK>;
}; };
&gpu { &gpu {
...@@ -320,6 +322,8 @@ &i2c1 { ...@@ -320,6 +322,8 @@ &i2c1 {
&i2c3 { &i2c3 {
status = "okay"; status = "okay";
clock-frequency = <400000>; clock-frequency = <400000>;
/* Overwrite pinctrl-0 from sdm845.dtsi */
pinctrl-0 = <&qup_i2c3_default &i2c3_hid_active>;
tsel: hid@15 { tsel: hid@15 {
compatible = "hid-over-i2c"; compatible = "hid-over-i2c";
...@@ -327,9 +331,6 @@ tsel: hid@15 { ...@@ -327,9 +331,6 @@ tsel: hid@15 {
hid-descr-addr = <0x1>; hid-descr-addr = <0x1>;
interrupts-extended = <&tlmm 37 IRQ_TYPE_LEVEL_HIGH>; interrupts-extended = <&tlmm 37 IRQ_TYPE_LEVEL_HIGH>;
pinctrl-names = "default";
pinctrl-0 = <&i2c3_hid_active>;
}; };
tsc2: hid@2c { tsc2: hid@2c {
...@@ -338,11 +339,6 @@ tsc2: hid@2c { ...@@ -338,11 +339,6 @@ tsc2: hid@2c {
hid-descr-addr = <0x20>; hid-descr-addr = <0x20>;
interrupts-extended = <&tlmm 37 IRQ_TYPE_LEVEL_HIGH>; interrupts-extended = <&tlmm 37 IRQ_TYPE_LEVEL_HIGH>;
pinctrl-names = "default";
pinctrl-0 = <&i2c3_hid_active>;
status = "disabled";
}; };
}; };
......
...@@ -1097,7 +1097,7 @@ vopl_out_lvds: endpoint@1 { ...@@ -1097,7 +1097,7 @@ vopl_out_lvds: endpoint@1 {
vopl_mmu: iommu@ff470f00 { vopl_mmu: iommu@ff470f00 {
compatible = "rockchip,iommu"; compatible = "rockchip,iommu";
reg = <0x0 0xff470f00 0x0 0x100>; reg = <0x0 0xff470f00 0x0 0x100>;
interrupts = <GIC_SPI 79 IRQ_TYPE_LEVEL_HIGH>; interrupts = <GIC_SPI 78 IRQ_TYPE_LEVEL_HIGH>;
interrupt-names = "vopl_mmu"; interrupt-names = "vopl_mmu";
clocks = <&cru ACLK_VOPL>, <&cru HCLK_VOPL>; clocks = <&cru ACLK_VOPL>, <&cru HCLK_VOPL>;
clock-names = "aclk", "iface"; clock-names = "aclk", "iface";
......
...@@ -114,6 +114,10 @@ &cpu3 { ...@@ -114,6 +114,10 @@ &cpu3 {
cpu-supply = <&vdd_arm>; cpu-supply = <&vdd_arm>;
}; };
&display_subsystem {
status = "disabled";
};
&gmac2io { &gmac2io {
assigned-clocks = <&cru SCLK_MAC2IO>, <&cru SCLK_MAC2IO_EXT>; assigned-clocks = <&cru SCLK_MAC2IO>, <&cru SCLK_MAC2IO_EXT>;
assigned-clock-parents = <&gmac_clk>, <&gmac_clk>; assigned-clock-parents = <&gmac_clk>, <&gmac_clk>;
......
...@@ -790,7 +790,6 @@ &pcie_phy { ...@@ -790,7 +790,6 @@ &pcie_phy {
&pcie0 { &pcie0 {
bus-scan-delay-ms = <1000>; bus-scan-delay-ms = <1000>;
ep-gpios = <&gpio2 RK_PD4 GPIO_ACTIVE_HIGH>; ep-gpios = <&gpio2 RK_PD4 GPIO_ACTIVE_HIGH>;
max-link-speed = <2>;
num-lanes = <4>; num-lanes = <4>;
pinctrl-names = "default"; pinctrl-names = "default";
pinctrl-0 = <&pcie_clkreqn_cpm>; pinctrl-0 = <&pcie_clkreqn_cpm>;
......
...@@ -234,6 +234,7 @@ pcie0: pcie@f8000000 { ...@@ -234,6 +234,7 @@ pcie0: pcie@f8000000 {
reg = <0x0 0xf8000000 0x0 0x2000000>, reg = <0x0 0xf8000000 0x0 0x2000000>,
<0x0 0xfd000000 0x0 0x1000000>; <0x0 0xfd000000 0x0 0x1000000>;
reg-names = "axi-base", "apb-base"; reg-names = "axi-base", "apb-base";
device_type = "pci";
#address-cells = <3>; #address-cells = <3>;
#size-cells = <2>; #size-cells = <2>;
#interrupt-cells = <1>; #interrupt-cells = <1>;
...@@ -252,7 +253,6 @@ pcie0: pcie@f8000000 { ...@@ -252,7 +253,6 @@ pcie0: pcie@f8000000 {
<0 0 0 2 &pcie0_intc 1>, <0 0 0 2 &pcie0_intc 1>,
<0 0 0 3 &pcie0_intc 2>, <0 0 0 3 &pcie0_intc 2>,
<0 0 0 4 &pcie0_intc 3>; <0 0 0 4 &pcie0_intc 3>;
linux,pci-domain = <0>;
max-link-speed = <1>; max-link-speed = <1>;
msi-map = <0x0 &its 0x0 0x1000>; msi-map = <0x0 &its 0x0 0x1000>;
phys = <&pcie_phy 0>, <&pcie_phy 1>, phys = <&pcie_phy 0>, <&pcie_phy 1>,
...@@ -1278,7 +1278,6 @@ vdec: video-codec@ff660000 { ...@@ -1278,7 +1278,6 @@ vdec: video-codec@ff660000 {
compatible = "rockchip,rk3399-vdec"; compatible = "rockchip,rk3399-vdec";
reg = <0x0 0xff660000 0x0 0x400>; reg = <0x0 0xff660000 0x0 0x400>;
interrupts = <GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH 0>; interrupts = <GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH 0>;
interrupt-names = "vdpu";
clocks = <&cru ACLK_VDU>, <&cru HCLK_VDU>, clocks = <&cru ACLK_VDU>, <&cru HCLK_VDU>,
<&cru SCLK_VDU_CA>, <&cru SCLK_VDU_CORE>; <&cru SCLK_VDU_CA>, <&cru SCLK_VDU_CORE>;
clock-names = "axi", "ahb", "cabac", "core"; clock-names = "axi", "ahb", "cabac", "core";
......
...@@ -1076,7 +1076,7 @@ CONFIG_INTERCONNECT=y ...@@ -1076,7 +1076,7 @@ CONFIG_INTERCONNECT=y
CONFIG_INTERCONNECT_QCOM=y CONFIG_INTERCONNECT_QCOM=y
CONFIG_INTERCONNECT_QCOM_MSM8916=m CONFIG_INTERCONNECT_QCOM_MSM8916=m
CONFIG_INTERCONNECT_QCOM_OSM_L3=m CONFIG_INTERCONNECT_QCOM_OSM_L3=m
CONFIG_INTERCONNECT_QCOM_SDM845=m CONFIG_INTERCONNECT_QCOM_SDM845=y
CONFIG_INTERCONNECT_QCOM_SM8150=m CONFIG_INTERCONNECT_QCOM_SM8150=m
CONFIG_INTERCONNECT_QCOM_SM8250=m CONFIG_INTERCONNECT_QCOM_SM8250=m
CONFIG_EXT2_FS=y CONFIG_EXT2_FS=y
......
...@@ -16,6 +16,7 @@ ...@@ -16,6 +16,7 @@
static int simple_pm_bus_probe(struct platform_device *pdev) static int simple_pm_bus_probe(struct platform_device *pdev)
{ {
const struct of_dev_auxdata *lookup = dev_get_platdata(&pdev->dev);
struct device_node *np = pdev->dev.of_node; struct device_node *np = pdev->dev.of_node;
dev_dbg(&pdev->dev, "%s\n", __func__); dev_dbg(&pdev->dev, "%s\n", __func__);
...@@ -23,7 +24,7 @@ static int simple_pm_bus_probe(struct platform_device *pdev) ...@@ -23,7 +24,7 @@ static int simple_pm_bus_probe(struct platform_device *pdev)
pm_runtime_enable(&pdev->dev); pm_runtime_enable(&pdev->dev);
if (np) if (np)
of_platform_populate(np, NULL, NULL, &pdev->dev); of_platform_populate(np, NULL, lookup, &pdev->dev);
return 0; return 0;
} }
......
...@@ -23,12 +23,7 @@ static const char * const sunxi_mbus_devices[] = { ...@@ -23,12 +23,7 @@ static const char * const sunxi_mbus_devices[] = {
"allwinner,sun7i-a20-display-engine", "allwinner,sun7i-a20-display-engine",
"allwinner,sun8i-a23-display-engine", "allwinner,sun8i-a23-display-engine",
"allwinner,sun8i-a33-display-engine", "allwinner,sun8i-a33-display-engine",
"allwinner,sun8i-a83t-display-engine",
"allwinner,sun8i-h3-display-engine",
"allwinner,sun8i-r40-display-engine",
"allwinner,sun8i-v3s-display-engine",
"allwinner,sun9i-a80-display-engine", "allwinner,sun9i-a80-display-engine",
"allwinner,sun50i-a64-display-engine",
/* /*
* And now we have the regular devices connected to the MBUS * And now we have the regular devices connected to the MBUS
......
...@@ -860,6 +860,7 @@ static int omap_prm_reset_init(struct platform_device *pdev, ...@@ -860,6 +860,7 @@ static int omap_prm_reset_init(struct platform_device *pdev,
const struct omap_rst_map *map; const struct omap_rst_map *map;
struct ti_prm_platform_data *pdata = dev_get_platdata(&pdev->dev); struct ti_prm_platform_data *pdata = dev_get_platdata(&pdev->dev);
char buf[32]; char buf[32];
u32 v;
/* /*
* Check if we have controllable resets. If either rstctrl is non-zero * Check if we have controllable resets. If either rstctrl is non-zero
...@@ -907,6 +908,16 @@ static int omap_prm_reset_init(struct platform_device *pdev, ...@@ -907,6 +908,16 @@ static int omap_prm_reset_init(struct platform_device *pdev,
map++; map++;
} }
/* Quirk handling to assert rst_map_012 bits on reset and avoid errors */
if (prm->data->rstmap == rst_map_012) {
v = readl_relaxed(reset->prm->base + reset->prm->data->rstctrl);
if ((v & reset->mask) != reset->mask) {
dev_dbg(&pdev->dev, "Asserting all resets: %08x\n", v);
writel_relaxed(reset->mask, reset->prm->base +
reset->prm->data->rstctrl);
}
}
return devm_reset_controller_register(&pdev->dev, &reset->rcdev); return devm_reset_controller_register(&pdev->dev, &reset->rcdev);
} }
......
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