Commit 8ea54100 authored by Mateusz Kulikowski's avatar Mateusz Kulikowski Committed by Greg Kroah-Hartman

staging: rtl8192e: Rename write_nic_dword

Use naming schema found in other rtlwifi devices.
Rename write_nic_dword to rtl92e_writel.
Signed-off-by: default avatarMateusz Kulikowski <mateusz.kulikowski@gmail.com>
Signed-off-by: default avatarGreg Kroah-Hartman <gregkh@linuxfoundation.org>
parent d8ae1967
...@@ -101,7 +101,7 @@ void rtl92e_set_reg(struct net_device *dev, u8 variable, u8 *val) ...@@ -101,7 +101,7 @@ void rtl92e_set_reg(struct net_device *dev, u8 variable, u8 *val)
switch (variable) { switch (variable) {
case HW_VAR_BSSID: case HW_VAR_BSSID:
write_nic_dword(dev, BSSIDR, ((u32 *)(val))[0]); rtl92e_writel(dev, BSSIDR, ((u32 *)(val))[0]);
write_nic_word(dev, BSSIDR+2, ((u16 *)(val+2))[0]); write_nic_word(dev, BSSIDR+2, ((u16 *)(val+2))[0]);
break; break;
...@@ -151,7 +151,7 @@ void rtl92e_set_reg(struct net_device *dev, u8 variable, u8 *val) ...@@ -151,7 +151,7 @@ void rtl92e_set_reg(struct net_device *dev, u8 variable, u8 *val)
else if (Type == false) else if (Type == false)
RegRCR &= (~RCR_CBSSID); RegRCR &= (~RCR_CBSSID);
write_nic_dword(dev, RCR, RegRCR); rtl92e_writel(dev, RCR, RegRCR);
priv->ReceiveConfig = RegRCR; priv->ReceiveConfig = RegRCR;
} }
...@@ -172,12 +172,12 @@ void rtl92e_set_reg(struct net_device *dev, u8 variable, u8 *val) ...@@ -172,12 +172,12 @@ void rtl92e_set_reg(struct net_device *dev, u8 variable, u8 *val)
regTmp = priv->basic_rate; regTmp = priv->basic_rate;
if (priv->short_preamble) if (priv->short_preamble)
regTmp |= BRSR_AckShortPmb; regTmp |= BRSR_AckShortPmb;
write_nic_dword(dev, RRSR, regTmp); rtl92e_writel(dev, RRSR, regTmp);
break; break;
} }
case HW_VAR_CPU_RST: case HW_VAR_CPU_RST:
write_nic_dword(dev, CPU_GEN, ((u32 *)(val))[0]); rtl92e_writel(dev, CPU_GEN, ((u32 *)(val))[0]);
break; break;
case HW_VAR_AC_PARAM: case HW_VAR_AC_PARAM:
...@@ -207,19 +207,19 @@ void rtl92e_set_reg(struct net_device *dev, u8 variable, u8 *val) ...@@ -207,19 +207,19 @@ void rtl92e_set_reg(struct net_device *dev, u8 variable, u8 *val)
__func__, eACI, u4bAcParam); __func__, eACI, u4bAcParam);
switch (eACI) { switch (eACI) {
case AC1_BK: case AC1_BK:
write_nic_dword(dev, EDCAPARA_BK, u4bAcParam); rtl92e_writel(dev, EDCAPARA_BK, u4bAcParam);
break; break;
case AC0_BE: case AC0_BE:
write_nic_dword(dev, EDCAPARA_BE, u4bAcParam); rtl92e_writel(dev, EDCAPARA_BE, u4bAcParam);
break; break;
case AC2_VI: case AC2_VI:
write_nic_dword(dev, EDCAPARA_VI, u4bAcParam); rtl92e_writel(dev, EDCAPARA_VI, u4bAcParam);
break; break;
case AC3_VO: case AC3_VO:
write_nic_dword(dev, EDCAPARA_VO, u4bAcParam); rtl92e_writel(dev, EDCAPARA_VO, u4bAcParam);
break; break;
default: default:
...@@ -690,12 +690,12 @@ static void rtl8192_hwconfig(struct net_device *dev) ...@@ -690,12 +690,12 @@ static void rtl8192_hwconfig(struct net_device *dev)
ratr_value = regRATR; ratr_value = regRATR;
if (priv->rf_type == RF_1T2R) if (priv->rf_type == RF_1T2R)
ratr_value &= ~(RATE_ALL_OFDM_2SS); ratr_value &= ~(RATE_ALL_OFDM_2SS);
write_nic_dword(dev, RATR0, ratr_value); rtl92e_writel(dev, RATR0, ratr_value);
rtl92e_writeb(dev, UFWP, 1); rtl92e_writeb(dev, UFWP, 1);
} }
regTmp = rtl92e_readb(dev, 0x313); regTmp = rtl92e_readb(dev, 0x313);
regRRSR = ((regTmp) << 24) | (regRRSR & 0x00ffffff); regRRSR = ((regTmp) << 24) | (regRRSR & 0x00ffffff);
write_nic_dword(dev, RRSR, regRRSR); rtl92e_writel(dev, RRSR, regRRSR);
write_nic_word(dev, RETRY_LIMIT, write_nic_word(dev, RETRY_LIMIT,
priv->ShortRetryLimit << RETRY_LIMIT_SHORT_SHIFT | priv->ShortRetryLimit << RETRY_LIMIT_SHORT_SHIFT |
...@@ -738,7 +738,7 @@ bool rtl92e_start_adapter(struct net_device *dev) ...@@ -738,7 +738,7 @@ bool rtl92e_start_adapter(struct net_device *dev)
netdev_err(dev, "%s(): undefined firmware state: %d.\n", netdev_err(dev, "%s(): undefined firmware state: %d.\n",
__func__, priv->pFirmware->firmware_status); __func__, priv->pFirmware->firmware_status);
write_nic_dword(dev, CPU_GEN, ulRegRead); rtl92e_writel(dev, CPU_GEN, ulRegRead);
ICVersion = rtl92e_readb(dev, IC_VERRSION); ICVersion = rtl92e_readb(dev, IC_VERRSION);
if (ICVersion >= 0x4) { if (ICVersion >= 0x4) {
...@@ -769,7 +769,7 @@ bool rtl92e_start_adapter(struct net_device *dev) ...@@ -769,7 +769,7 @@ bool rtl92e_start_adapter(struct net_device *dev)
netdev_err(dev, "%s: Invalid loopback mode setting.\n", netdev_err(dev, "%s: Invalid loopback mode setting.\n",
__func__); __func__);
write_nic_dword(dev, CPU_GEN, ulRegRead); rtl92e_writel(dev, CPU_GEN, ulRegRead);
udelay(500); udelay(500);
} }
...@@ -778,32 +778,32 @@ bool rtl92e_start_adapter(struct net_device *dev) ...@@ -778,32 +778,32 @@ bool rtl92e_start_adapter(struct net_device *dev)
rtl92e_writeb(dev, PCIF, ((MXDMA2_NoLimit<<MXDMA2_RX_SHIFT) | rtl92e_writeb(dev, PCIF, ((MXDMA2_NoLimit<<MXDMA2_RX_SHIFT) |
(MXDMA2_NoLimit<<MXDMA2_TX_SHIFT))); (MXDMA2_NoLimit<<MXDMA2_TX_SHIFT)));
write_nic_dword(dev, MAC0, ((u32 *)dev->dev_addr)[0]); rtl92e_writel(dev, MAC0, ((u32 *)dev->dev_addr)[0]);
write_nic_word(dev, MAC4, ((u16 *)(dev->dev_addr + 4))[0]); write_nic_word(dev, MAC4, ((u16 *)(dev->dev_addr + 4))[0]);
write_nic_dword(dev, RCR, priv->ReceiveConfig); rtl92e_writel(dev, RCR, priv->ReceiveConfig);
write_nic_dword(dev, RQPN1, NUM_OF_PAGE_IN_FW_QUEUE_BK << rtl92e_writel(dev, RQPN1, NUM_OF_PAGE_IN_FW_QUEUE_BK <<
RSVD_FW_QUEUE_PAGE_BK_SHIFT | RSVD_FW_QUEUE_PAGE_BK_SHIFT |
NUM_OF_PAGE_IN_FW_QUEUE_BE << NUM_OF_PAGE_IN_FW_QUEUE_BE <<
RSVD_FW_QUEUE_PAGE_BE_SHIFT | RSVD_FW_QUEUE_PAGE_BE_SHIFT |
NUM_OF_PAGE_IN_FW_QUEUE_VI << NUM_OF_PAGE_IN_FW_QUEUE_VI <<
RSVD_FW_QUEUE_PAGE_VI_SHIFT | RSVD_FW_QUEUE_PAGE_VI_SHIFT |
NUM_OF_PAGE_IN_FW_QUEUE_VO << NUM_OF_PAGE_IN_FW_QUEUE_VO <<
RSVD_FW_QUEUE_PAGE_VO_SHIFT); RSVD_FW_QUEUE_PAGE_VO_SHIFT);
write_nic_dword(dev, RQPN2, NUM_OF_PAGE_IN_FW_QUEUE_MGNT << rtl92e_writel(dev, RQPN2, NUM_OF_PAGE_IN_FW_QUEUE_MGNT <<
RSVD_FW_QUEUE_PAGE_MGNT_SHIFT); RSVD_FW_QUEUE_PAGE_MGNT_SHIFT);
write_nic_dword(dev, RQPN3, APPLIED_RESERVED_QUEUE_IN_FW | rtl92e_writel(dev, RQPN3, APPLIED_RESERVED_QUEUE_IN_FW |
NUM_OF_PAGE_IN_FW_QUEUE_BCN << NUM_OF_PAGE_IN_FW_QUEUE_BCN <<
RSVD_FW_QUEUE_PAGE_BCN_SHIFT| RSVD_FW_QUEUE_PAGE_BCN_SHIFT|
NUM_OF_PAGE_IN_FW_QUEUE_PUB << NUM_OF_PAGE_IN_FW_QUEUE_PUB <<
RSVD_FW_QUEUE_PAGE_PUB_SHIFT); RSVD_FW_QUEUE_PAGE_PUB_SHIFT);
rtl92e_tx_enable(dev); rtl92e_tx_enable(dev);
rtl92e_rx_enable(dev); rtl92e_rx_enable(dev);
ulRegRead = (0xFFF00000 & rtl92e_readl(dev, RRSR)) | ulRegRead = (0xFFF00000 & rtl92e_readl(dev, RRSR)) |
RATE_ALL_OFDM_AG | RATE_ALL_CCK; RATE_ALL_OFDM_AG | RATE_ALL_CCK;
write_nic_dword(dev, RRSR, ulRegRead); rtl92e_writel(dev, RRSR, ulRegRead);
write_nic_dword(dev, RATR0+4*7, (RATE_ALL_OFDM_AG | RATE_ALL_CCK)); rtl92e_writel(dev, RATR0+4*7, (RATE_ALL_OFDM_AG | RATE_ALL_CCK));
rtl92e_writeb(dev, ACK_TIMEOUT, 0x30); rtl92e_writeb(dev, ACK_TIMEOUT, 0x30);
...@@ -824,7 +824,7 @@ bool rtl92e_start_adapter(struct net_device *dev) ...@@ -824,7 +824,7 @@ bool rtl92e_start_adapter(struct net_device *dev)
int i; int i;
for (i = 0; i < QOS_QUEUE_NUM; i++) for (i = 0; i < QOS_QUEUE_NUM; i++)
write_nic_dword(dev, WDCAPARA_ADD[i], 0x005e4332); rtl92e_writel(dev, WDCAPARA_ADD[i], 0x005e4332);
} }
rtl92e_writeb(dev, 0xbe, 0xc0); rtl92e_writeb(dev, 0xbe, 0xc0);
...@@ -971,7 +971,7 @@ static void rtl8192_net_update(struct net_device *dev) ...@@ -971,7 +971,7 @@ static void rtl8192_net_update(struct net_device *dev)
rtl92e_config_rate(dev, &rate_config); rtl92e_config_rate(dev, &rate_config);
priv->dot11CurrentPreambleMode = PREAMBLE_AUTO; priv->dot11CurrentPreambleMode = PREAMBLE_AUTO;
priv->basic_rate = rate_config &= 0x15f; priv->basic_rate = rate_config &= 0x15f;
write_nic_dword(dev, BSSIDR, ((u32 *)net->bssid)[0]); rtl92e_writel(dev, BSSIDR, ((u32 *)net->bssid)[0]);
write_nic_word(dev, BSSIDR+4, ((u16 *)net->bssid)[2]); write_nic_word(dev, BSSIDR+4, ((u16 *)net->bssid)[2]);
if (priv->rtllib->iw_mode == IW_MODE_ADHOC) { if (priv->rtllib->iw_mode == IW_MODE_ADHOC) {
...@@ -1019,7 +1019,7 @@ void rtl92e_link_change(struct net_device *dev) ...@@ -1019,7 +1019,7 @@ void rtl92e_link_change(struct net_device *dev)
} else } else
priv->ReceiveConfig = reg &= ~RCR_CBSSID; priv->ReceiveConfig = reg &= ~RCR_CBSSID;
write_nic_dword(dev, RCR, reg); rtl92e_writel(dev, RCR, reg);
} }
} }
...@@ -1034,7 +1034,7 @@ void rtl92e_set_monitor_mode(struct net_device *dev, bool bAllowAllDA, ...@@ -1034,7 +1034,7 @@ void rtl92e_set_monitor_mode(struct net_device *dev, bool bAllowAllDA,
priv->ReceiveConfig &= ~RCR_AAP; priv->ReceiveConfig &= ~RCR_AAP;
if (WriteIntoReg) if (WriteIntoReg)
write_nic_dword(dev, RCR, priv->ReceiveConfig); rtl92e_writel(dev, RCR, priv->ReceiveConfig);
} }
static u8 MRateToHwRate8190Pci(u8 rate) static u8 MRateToHwRate8190Pci(u8 rate)
...@@ -2122,11 +2122,11 @@ void rtl92e_stop_adapter(struct net_device *dev, bool reset) ...@@ -2122,11 +2122,11 @@ void rtl92e_stop_adapter(struct net_device *dev, bool reset)
rtl92e_set_rf_off(dev); rtl92e_set_rf_off(dev);
ulRegRead = rtl92e_readl(dev, CPU_GEN); ulRegRead = rtl92e_readl(dev, CPU_GEN);
ulRegRead |= CPU_GEN_SYSTEM_RESET; ulRegRead |= CPU_GEN_SYSTEM_RESET;
write_nic_dword(dev, CPU_GEN, ulRegRead); rtl92e_writel(dev, CPU_GEN, ulRegRead);
} else { } else {
write_nic_dword(dev, WFCRC0, 0xffffffff); rtl92e_writel(dev, WFCRC0, 0xffffffff);
write_nic_dword(dev, WFCRC1, 0xffffffff); rtl92e_writel(dev, WFCRC1, 0xffffffff);
write_nic_dword(dev, WFCRC2, 0xffffffff); rtl92e_writel(dev, WFCRC2, 0xffffffff);
rtl92e_writeb(dev, PMR, 0x5); rtl92e_writeb(dev, PMR, 0x5);
...@@ -2185,7 +2185,7 @@ void rtl92e_update_ratr_table(struct net_device *dev) ...@@ -2185,7 +2185,7 @@ void rtl92e_update_ratr_table(struct net_device *dev)
else if (!ieee->pHTInfo->bCurTxBW40MHz && else if (!ieee->pHTInfo->bCurTxBW40MHz &&
ieee->pHTInfo->bCurShortGI20MHz) ieee->pHTInfo->bCurShortGI20MHz)
ratr_value |= 0x80000000; ratr_value |= 0x80000000;
write_nic_dword(dev, RATR0+rate_index*4, ratr_value); rtl92e_writel(dev, RATR0+rate_index*4, ratr_value);
rtl92e_writeb(dev, UFWP, 1); rtl92e_writeb(dev, UFWP, 1);
} }
...@@ -2230,7 +2230,7 @@ void rtl92e_enable_irq(struct net_device *dev) ...@@ -2230,7 +2230,7 @@ void rtl92e_enable_irq(struct net_device *dev)
priv->irq_enabled = 1; priv->irq_enabled = 1;
write_nic_dword(dev, INTA_MASK, priv->irq_mask[0]); rtl92e_writel(dev, INTA_MASK, priv->irq_mask[0]);
} }
...@@ -2238,7 +2238,7 @@ void rtl92e_disable_irq(struct net_device *dev) ...@@ -2238,7 +2238,7 @@ void rtl92e_disable_irq(struct net_device *dev)
{ {
struct r8192_priv *priv = (struct r8192_priv *)rtllib_priv(dev); struct r8192_priv *priv = (struct r8192_priv *)rtllib_priv(dev);
write_nic_dword(dev, INTA_MASK, 0); rtl92e_writel(dev, INTA_MASK, 0);
priv->irq_enabled = 0; priv->irq_enabled = 0;
} }
...@@ -2248,7 +2248,7 @@ void rtl92e_clear_irq(struct net_device *dev) ...@@ -2248,7 +2248,7 @@ void rtl92e_clear_irq(struct net_device *dev)
u32 tmp = 0; u32 tmp = 0;
tmp = rtl92e_readl(dev, ISR); tmp = rtl92e_readl(dev, ISR);
write_nic_dword(dev, ISR, tmp); rtl92e_writel(dev, ISR, tmp);
} }
...@@ -2256,7 +2256,7 @@ void rtl92e_enable_rx(struct net_device *dev) ...@@ -2256,7 +2256,7 @@ void rtl92e_enable_rx(struct net_device *dev)
{ {
struct r8192_priv *priv = (struct r8192_priv *)rtllib_priv(dev); struct r8192_priv *priv = (struct r8192_priv *)rtllib_priv(dev);
write_nic_dword(dev, RDQDA, priv->rx_ring_dma[RX_MPDU_QUEUE]); rtl92e_writel(dev, RDQDA, priv->rx_ring_dma[RX_MPDU_QUEUE]);
} }
static const u32 TX_DESC_BASE[] = { static const u32 TX_DESC_BASE[] = {
...@@ -2269,14 +2269,14 @@ void rtl92e_enable_tx(struct net_device *dev) ...@@ -2269,14 +2269,14 @@ void rtl92e_enable_tx(struct net_device *dev)
u32 i; u32 i;
for (i = 0; i < MAX_TX_QUEUE_COUNT; i++) for (i = 0; i < MAX_TX_QUEUE_COUNT; i++)
write_nic_dword(dev, TX_DESC_BASE[i], priv->tx_ring[i].dma); rtl92e_writel(dev, TX_DESC_BASE[i], priv->tx_ring[i].dma);
} }
void rtl92e_ack_irq(struct net_device *dev, u32 *p_inta, u32 *p_intb) void rtl92e_ack_irq(struct net_device *dev, u32 *p_inta, u32 *p_intb)
{ {
*p_inta = rtl92e_readl(dev, ISR); *p_inta = rtl92e_readl(dev, ISR);
write_nic_dword(dev, ISR, *p_inta); rtl92e_writel(dev, ISR, *p_inta);
} }
bool rtl92e_is_rx_stuck(struct net_device *dev) bool rtl92e_is_rx_stuck(struct net_device *dev)
......
...@@ -91,9 +91,9 @@ void rtl92e_set_bb_reg(struct net_device *dev, u32 dwRegAddr, u32 dwBitMask, ...@@ -91,9 +91,9 @@ void rtl92e_set_bb_reg(struct net_device *dev, u32 dwRegAddr, u32 dwBitMask,
BitShift = rtl8192_CalculateBitShift(dwBitMask); BitShift = rtl8192_CalculateBitShift(dwBitMask);
NewValue = (((OriginalValue) & (~dwBitMask)) | NewValue = (((OriginalValue) & (~dwBitMask)) |
(dwData << BitShift)); (dwData << BitShift));
write_nic_dword(dev, dwRegAddr, NewValue); rtl92e_writel(dev, dwRegAddr, NewValue);
} else } else
write_nic_dword(dev, dwRegAddr, dwData); rtl92e_writel(dev, dwRegAddr, dwData);
} }
u32 rtl92e_get_bb_reg(struct net_device *dev, u32 dwRegAddr, u32 dwBitMask) u32 rtl92e_get_bb_reg(struct net_device *dev, u32 dwRegAddr, u32 dwBitMask)
...@@ -293,7 +293,7 @@ static u32 phy_FwRFSerialRead(struct net_device *dev, ...@@ -293,7 +293,7 @@ static u32 phy_FwRFSerialRead(struct net_device *dev,
else else
break; break;
} }
write_nic_dword(dev, QPNR, Data); rtl92e_writel(dev, QPNR, Data);
while (rtl92e_readl(dev, QPNR) & 0x80000000) { while (rtl92e_readl(dev, QPNR) & 0x80000000) {
if (time++ < 100) if (time++ < 100)
udelay(10); udelay(10);
...@@ -321,7 +321,7 @@ static void phy_FwRFSerialWrite(struct net_device *dev, ...@@ -321,7 +321,7 @@ static void phy_FwRFSerialWrite(struct net_device *dev,
else else
break; break;
} }
write_nic_dword(dev, QPNR, Data); rtl92e_writel(dev, QPNR, Data);
} }
...@@ -512,8 +512,8 @@ bool rtl92e_check_bb_and_rf(struct net_device *dev, enum hw90_block CheckBlock, ...@@ -512,8 +512,8 @@ bool rtl92e_check_bb_and_rf(struct net_device *dev, enum hw90_block CheckBlock,
switch (CheckBlock) { switch (CheckBlock) {
case HW90_BLOCK_PHY0: case HW90_BLOCK_PHY0:
case HW90_BLOCK_PHY1: case HW90_BLOCK_PHY1:
write_nic_dword(dev, WriteAddr[CheckBlock], rtl92e_writel(dev, WriteAddr[CheckBlock],
WriteData[i]); WriteData[i]);
dwRegRead = rtl92e_readl(dev, WriteAddr[CheckBlock]); dwRegRead = rtl92e_readl(dev, WriteAddr[CheckBlock]);
break; break;
...@@ -556,7 +556,7 @@ static bool rtl8192_BB_Config_ParaFile(struct net_device *dev) ...@@ -556,7 +556,7 @@ static bool rtl8192_BB_Config_ParaFile(struct net_device *dev)
rtl92e_writeb(dev, BB_GLOBAL_RESET, (bRegValue|BB_GLOBAL_RESET_BIT)); rtl92e_writeb(dev, BB_GLOBAL_RESET, (bRegValue|BB_GLOBAL_RESET_BIT));
dwRegValue = rtl92e_readl(dev, CPU_GEN); dwRegValue = rtl92e_readl(dev, CPU_GEN);
write_nic_dword(dev, CPU_GEN, (dwRegValue&(~CPU_GEN_BB_RST))); rtl92e_writel(dev, CPU_GEN, (dwRegValue&(~CPU_GEN_BB_RST)));
for (eCheckItem = (enum hw90_block)HW90_BLOCK_PHY0; for (eCheckItem = (enum hw90_block)HW90_BLOCK_PHY0;
eCheckItem <= HW90_BLOCK_PHY1; eCheckItem++) { eCheckItem <= HW90_BLOCK_PHY1; eCheckItem++) {
...@@ -574,7 +574,7 @@ static bool rtl8192_BB_Config_ParaFile(struct net_device *dev) ...@@ -574,7 +574,7 @@ static bool rtl8192_BB_Config_ParaFile(struct net_device *dev)
rtl8192_phyConfigBB(dev, BaseBand_Config_PHY_REG); rtl8192_phyConfigBB(dev, BaseBand_Config_PHY_REG);
dwRegValue = rtl92e_readl(dev, CPU_GEN); dwRegValue = rtl92e_readl(dev, CPU_GEN);
write_nic_dword(dev, CPU_GEN, (dwRegValue|CPU_GEN_BB_RST)); rtl92e_writel(dev, CPU_GEN, (dwRegValue|CPU_GEN_BB_RST));
rtl8192_phyConfigBB(dev, BaseBand_Config_AGC_TAB); rtl8192_phyConfigBB(dev, BaseBand_Config_AGC_TAB);
...@@ -935,8 +935,8 @@ static u8 rtl8192_phy_SwChnlStepByStep(struct net_device *dev, u8 channel, ...@@ -935,8 +935,8 @@ static u8 rtl8192_phy_SwChnlStepByStep(struct net_device *dev, u8 channel,
rtl8192_SetTxPowerLevel(dev, channel); rtl8192_SetTxPowerLevel(dev, channel);
break; break;
case CmdID_WritePortUlong: case CmdID_WritePortUlong:
write_nic_dword(dev, CurrentCmd->Para1, rtl92e_writel(dev, CurrentCmd->Para1,
CurrentCmd->Para2); CurrentCmd->Para2);
break; break;
case CmdID_WritePortUshort: case CmdID_WritePortUshort:
write_nic_word(dev, CurrentCmd->Para1, write_nic_word(dev, CurrentCmd->Para1,
...@@ -1202,9 +1202,9 @@ static void rtl8192_SetBWModeWorkItem(struct net_device *dev) ...@@ -1202,9 +1202,9 @@ static void rtl8192_SetBWModeWorkItem(struct net_device *dev)
rtl92e_set_bb_reg(dev, rFPGA1_RFMOD, bRFMOD, 0x0); rtl92e_set_bb_reg(dev, rFPGA1_RFMOD, bRFMOD, 0x0);
if (!priv->btxpower_tracking) { if (!priv->btxpower_tracking) {
write_nic_dword(dev, rCCK0_TxFilter1, 0x1a1b0000); rtl92e_writel(dev, rCCK0_TxFilter1, 0x1a1b0000);
write_nic_dword(dev, rCCK0_TxFilter2, 0x090e1317); rtl92e_writel(dev, rCCK0_TxFilter2, 0x090e1317);
write_nic_dword(dev, rCCK0_DebugPort, 0x00000204); rtl92e_writel(dev, rCCK0_DebugPort, 0x00000204);
} else { } else {
CCK_Tx_Power_Track_BW_Switch(dev); CCK_Tx_Power_Track_BW_Switch(dev);
} }
...@@ -1217,9 +1217,9 @@ static void rtl8192_SetBWModeWorkItem(struct net_device *dev) ...@@ -1217,9 +1217,9 @@ static void rtl8192_SetBWModeWorkItem(struct net_device *dev)
rtl92e_set_bb_reg(dev, rFPGA1_RFMOD, bRFMOD, 0x1); rtl92e_set_bb_reg(dev, rFPGA1_RFMOD, bRFMOD, 0x1);
if (!priv->btxpower_tracking) { if (!priv->btxpower_tracking) {
write_nic_dword(dev, rCCK0_TxFilter1, 0x35360000); rtl92e_writel(dev, rCCK0_TxFilter1, 0x35360000);
write_nic_dword(dev, rCCK0_TxFilter2, 0x121c252e); rtl92e_writel(dev, rCCK0_TxFilter2, 0x121c252e);
write_nic_dword(dev, rCCK0_DebugPort, 0x00000409); rtl92e_writel(dev, rCCK0_DebugPort, 0x00000409);
} else { } else {
CCK_Tx_Power_Track_BW_Switch(dev); CCK_Tx_Power_Track_BW_Switch(dev);
} }
......
...@@ -33,7 +33,7 @@ void rtl92e_cam_reset(struct net_device *dev) ...@@ -33,7 +33,7 @@ void rtl92e_cam_reset(struct net_device *dev)
u32 ulcommand = 0; u32 ulcommand = 0;
ulcommand |= BIT31|BIT30; ulcommand |= BIT31|BIT30;
write_nic_dword(dev, RWCAM, ulcommand); rtl92e_writel(dev, RWCAM, ulcommand);
} }
void rtl92e_enable_hw_security_config(struct net_device *dev) void rtl92e_enable_hw_security_config(struct net_device *dev)
...@@ -135,20 +135,20 @@ void rtl92e_set_key(struct net_device *dev, u8 EntryNo, u8 KeyIndex, ...@@ -135,20 +135,20 @@ void rtl92e_set_key(struct net_device *dev, u8 EntryNo, u8 KeyIndex,
(u32)(*(MacAddr+1)) << 24 | (u32)(*(MacAddr+1)) << 24 |
(u32)usConfig; (u32)usConfig;
write_nic_dword(dev, WCAMI, TargetContent); rtl92e_writel(dev, WCAMI, TargetContent);
write_nic_dword(dev, RWCAM, TargetCommand); rtl92e_writel(dev, RWCAM, TargetCommand);
} else if (i == 1) { } else if (i == 1) {
TargetContent = (u32)(*(MacAddr+2)) | TargetContent = (u32)(*(MacAddr+2)) |
(u32)(*(MacAddr+3)) << 8 | (u32)(*(MacAddr+3)) << 8 |
(u32)(*(MacAddr+4)) << 16 | (u32)(*(MacAddr+4)) << 16 |
(u32)(*(MacAddr+5)) << 24; (u32)(*(MacAddr+5)) << 24;
write_nic_dword(dev, WCAMI, TargetContent); rtl92e_writel(dev, WCAMI, TargetContent);
write_nic_dword(dev, RWCAM, TargetCommand); rtl92e_writel(dev, RWCAM, TargetCommand);
} else { } else {
if (KeyContent != NULL) { if (KeyContent != NULL) {
write_nic_dword(dev, WCAMI, rtl92e_writel(dev, WCAMI,
(u32)(*(KeyContent+i-2))); (u32)(*(KeyContent+i-2)));
write_nic_dword(dev, RWCAM, TargetCommand); rtl92e_writel(dev, RWCAM, TargetCommand);
udelay(100); udelay(100);
} }
} }
......
...@@ -132,7 +132,7 @@ void rtl92e_writeb(struct net_device *dev, int x, u8 y) ...@@ -132,7 +132,7 @@ void rtl92e_writeb(struct net_device *dev, int x, u8 y)
udelay(20); udelay(20);
} }
void write_nic_dword(struct net_device *dev, int x, u32 y) void rtl92e_writel(struct net_device *dev, int x, u32 y)
{ {
writel(y, (u8 __iomem *)dev->mem_start + x); writel(y, (u8 __iomem *)dev->mem_start + x);
...@@ -2194,8 +2194,8 @@ static void rtl8192_irq_rx_tasklet(struct r8192_priv *priv) ...@@ -2194,8 +2194,8 @@ static void rtl8192_irq_rx_tasklet(struct r8192_priv *priv)
{ {
rtl8192_rx_normal(priv->rtllib->dev); rtl8192_rx_normal(priv->rtllib->dev);
write_nic_dword(priv->rtllib->dev, INTA_MASK, rtl92e_writel(priv->rtllib->dev, INTA_MASK,
rtl92e_readl(priv->rtllib->dev, INTA_MASK) | IMR_RDU); rtl92e_readl(priv->rtllib->dev, INTA_MASK) | IMR_RDU);
} }
/**************************************************************************** /****************************************************************************
...@@ -2526,8 +2526,8 @@ static irqreturn_t rtl8192_interrupt(int irq, void *netdev) ...@@ -2526,8 +2526,8 @@ static irqreturn_t rtl8192_interrupt(int irq, void *netdev)
if (inta & IMR_RDU) { if (inta & IMR_RDU) {
RT_TRACE(COMP_INTR, "rx descriptor unavailable!\n"); RT_TRACE(COMP_INTR, "rx descriptor unavailable!\n");
priv->stats.rxrdu++; priv->stats.rxrdu++;
write_nic_dword(dev, INTA_MASK, rtl92e_writel(dev, INTA_MASK,
rtl92e_readl(dev, INTA_MASK) & ~IMR_RDU); rtl92e_readl(dev, INTA_MASK) & ~IMR_RDU);
tasklet_schedule(&priv->irq_rx_tasklet); tasklet_schedule(&priv->irq_rx_tasklet);
} }
......
...@@ -583,7 +583,7 @@ u32 rtl92e_readl(struct net_device *dev, int x); ...@@ -583,7 +583,7 @@ u32 rtl92e_readl(struct net_device *dev, int x);
u16 rtl92e_readw(struct net_device *dev, int x); u16 rtl92e_readw(struct net_device *dev, int x);
void rtl92e_writeb(struct net_device *dev, int x, u8 y); void rtl92e_writeb(struct net_device *dev, int x, u8 y);
void write_nic_word(struct net_device *dev, int x, u16 y); void write_nic_word(struct net_device *dev, int x, u16 y);
void write_nic_dword(struct net_device *dev, int x, u32 y); void rtl92e_writel(struct net_device *dev, int x, u32 y);
void force_pci_posting(struct net_device *dev); void force_pci_posting(struct net_device *dev);
......
...@@ -454,7 +454,7 @@ static void dm_check_rate_adaptive(struct net_device *dev) ...@@ -454,7 +454,7 @@ static void dm_check_rate_adaptive(struct net_device *dev)
currentRATR, targetRATR); currentRATR, targetRATR);
if (priv->rf_type == RF_1T2R) if (priv->rf_type == RF_1T2R)
ratr_value &= ~(RATE_ALL_OFDM_2SS); ratr_value &= ~(RATE_ALL_OFDM_2SS);
write_nic_dword(dev, RATR0, ratr_value); rtl92e_writel(dev, RATR0, ratr_value);
rtl92e_writeb(dev, UFWP, 1); rtl92e_writeb(dev, UFWP, 1);
pra->last_ratr = targetRATR; pra->last_ratr = targetRATR;
...@@ -1211,7 +1211,7 @@ void dm_restore_dynamic_mechanism_state(struct net_device *dev) ...@@ -1211,7 +1211,7 @@ void dm_restore_dynamic_mechanism_state(struct net_device *dev)
ratr_value = reg_ratr; ratr_value = reg_ratr;
if (priv->rf_type == RF_1T2R) if (priv->rf_type == RF_1T2R)
ratr_value &= ~(RATE_ALL_OFDM_2SS); ratr_value &= ~(RATE_ALL_OFDM_2SS);
write_nic_dword(dev, RATR0, ratr_value); rtl92e_writel(dev, RATR0, ratr_value);
rtl92e_writeb(dev, UFWP, 1); rtl92e_writeb(dev, UFWP, 1);
if (priv->btxpower_trackingInit && priv->btxpower_tracking) if (priv->btxpower_trackingInit && priv->btxpower_tracking)
dm_txpower_reset_recovery(dev); dm_txpower_reset_recovery(dev);
...@@ -1741,21 +1741,19 @@ static void dm_check_edca_turbo(struct net_device *dev) ...@@ -1741,21 +1741,19 @@ static void dm_check_edca_turbo(struct net_device *dev)
if (curTxOkCnt > 4*curRxOkCnt) { if (curTxOkCnt > 4*curRxOkCnt) {
if (priv->bis_cur_rdlstate || if (priv->bis_cur_rdlstate ||
!priv->bcurrent_turbo_EDCA) { !priv->bcurrent_turbo_EDCA) {
write_nic_dword(dev, EDCAPARA_BE, rtl92e_writel(dev, EDCAPARA_BE,
edca_setting_UL[pHTInfo->IOTPeer]); edca_setting_UL[pHTInfo->IOTPeer]);
priv->bis_cur_rdlstate = false; priv->bis_cur_rdlstate = false;
} }
} else { } else {
if (!priv->bis_cur_rdlstate || if (!priv->bis_cur_rdlstate ||
!priv->bcurrent_turbo_EDCA) { !priv->bcurrent_turbo_EDCA) {
if (priv->rtllib->mode == WIRELESS_MODE_G) if (priv->rtllib->mode == WIRELESS_MODE_G)
write_nic_dword(dev, rtl92e_writel(dev, EDCAPARA_BE,
EDCAPARA_BE, edca_setting_DL_GMode[pHTInfo->IOTPeer]);
edca_setting_DL_GMode[pHTInfo->IOTPeer]);
else else
write_nic_dword(dev, rtl92e_writel(dev, EDCAPARA_BE,
EDCAPARA_BE, edca_setting_DL[pHTInfo->IOTPeer]);
edca_setting_DL[pHTInfo->IOTPeer]);
priv->bis_cur_rdlstate = true; priv->bis_cur_rdlstate = true;
} }
} }
...@@ -1765,20 +1763,18 @@ static void dm_check_edca_turbo(struct net_device *dev) ...@@ -1765,20 +1763,18 @@ static void dm_check_edca_turbo(struct net_device *dev)
if (!priv->bis_cur_rdlstate || if (!priv->bis_cur_rdlstate ||
!priv->bcurrent_turbo_EDCA) { !priv->bcurrent_turbo_EDCA) {
if (priv->rtllib->mode == WIRELESS_MODE_G) if (priv->rtllib->mode == WIRELESS_MODE_G)
write_nic_dword(dev, rtl92e_writel(dev, EDCAPARA_BE,
EDCAPARA_BE, edca_setting_DL_GMode[pHTInfo->IOTPeer]);
edca_setting_DL_GMode[pHTInfo->IOTPeer]);
else else
write_nic_dword(dev, rtl92e_writel(dev, EDCAPARA_BE,
EDCAPARA_BE, edca_setting_DL[pHTInfo->IOTPeer]);
edca_setting_DL[pHTInfo->IOTPeer]);
priv->bis_cur_rdlstate = true; priv->bis_cur_rdlstate = true;
} }
} else { } else {
if (priv->bis_cur_rdlstate || if (priv->bis_cur_rdlstate ||
!priv->bcurrent_turbo_EDCA) { !priv->bcurrent_turbo_EDCA) {
write_nic_dword(dev, EDCAPARA_BE, rtl92e_writel(dev, EDCAPARA_BE,
edca_setting_UL[pHTInfo->IOTPeer]); edca_setting_UL[pHTInfo->IOTPeer]);
priv->bis_cur_rdlstate = false; priv->bis_cur_rdlstate = false;
} }
...@@ -2283,7 +2279,7 @@ static void dm_fsync_timer_callback(unsigned long data) ...@@ -2283,7 +2279,7 @@ static void dm_fsync_timer_callback(unsigned long data)
rtl92e_writeb(dev, 0xC3e, 0x96); rtl92e_writeb(dev, 0xC3e, 0x96);
} }
priv->ContinueDiffCount = 0; priv->ContinueDiffCount = 0;
write_nic_dword(dev, rOFDM0_RxDetector2, 0x465c52cd); rtl92e_writel(dev, rOFDM0_RxDetector2, 0x465c52cd);
} }
RT_TRACE(COMP_HALDM, "ContinueDiffCount %d\n", priv->ContinueDiffCount); RT_TRACE(COMP_HALDM, "ContinueDiffCount %d\n", priv->ContinueDiffCount);
RT_TRACE(COMP_HALDM, RT_TRACE(COMP_HALDM,
...@@ -2298,7 +2294,7 @@ static void dm_StartHWFsync(struct net_device *dev) ...@@ -2298,7 +2294,7 @@ static void dm_StartHWFsync(struct net_device *dev)
struct r8192_priv *priv = rtllib_priv(dev); struct r8192_priv *priv = rtllib_priv(dev);
RT_TRACE(COMP_HALDM, "%s\n", __func__); RT_TRACE(COMP_HALDM, "%s\n", __func__);
write_nic_dword(dev, rOFDM0_RxDetector2, 0x465c12cf); rtl92e_writel(dev, rOFDM0_RxDetector2, 0x465c12cf);
priv->rtllib->SetHwRegHandler(dev, HW_VAR_RF_TIMING, priv->rtllib->SetHwRegHandler(dev, HW_VAR_RF_TIMING,
(u8 *)(&rf_timing)); (u8 *)(&rf_timing));
rtl92e_writeb(dev, 0xc3b, 0x41); rtl92e_writeb(dev, 0xc3b, 0x41);
...@@ -2310,7 +2306,7 @@ static void dm_EndHWFsync(struct net_device *dev) ...@@ -2310,7 +2306,7 @@ static void dm_EndHWFsync(struct net_device *dev)
struct r8192_priv *priv = rtllib_priv(dev); struct r8192_priv *priv = rtllib_priv(dev);
RT_TRACE(COMP_HALDM, "%s\n", __func__); RT_TRACE(COMP_HALDM, "%s\n", __func__);
write_nic_dword(dev, rOFDM0_RxDetector2, 0x465c52cd); rtl92e_writel(dev, rOFDM0_RxDetector2, 0x465c52cd);
priv->rtllib->SetHwRegHandler(dev, HW_VAR_RF_TIMING, (u8 *) priv->rtllib->SetHwRegHandler(dev, HW_VAR_RF_TIMING, (u8 *)
(&rf_timing)); (&rf_timing));
rtl92e_writeb(dev, 0xc3b, 0x49); rtl92e_writeb(dev, 0xc3b, 0x49);
...@@ -2332,7 +2328,7 @@ static void dm_EndSWFsync(struct net_device *dev) ...@@ -2332,7 +2328,7 @@ static void dm_EndSWFsync(struct net_device *dev)
} }
priv->ContinueDiffCount = 0; priv->ContinueDiffCount = 0;
write_nic_dword(dev, rOFDM0_RxDetector2, 0x465c52cd); rtl92e_writel(dev, rOFDM0_RxDetector2, 0x465c52cd);
} }
static void dm_StartSWFsync(struct net_device *dev) static void dm_StartSWFsync(struct net_device *dev)
...@@ -2367,7 +2363,7 @@ static void dm_StartSWFsync(struct net_device *dev) ...@@ -2367,7 +2363,7 @@ static void dm_StartSWFsync(struct net_device *dev)
msecs_to_jiffies(priv->rtllib->fsync_time_interval); msecs_to_jiffies(priv->rtllib->fsync_time_interval);
add_timer(&priv->fsync_timer); add_timer(&priv->fsync_timer);
write_nic_dword(dev, rOFDM0_RxDetector2, 0x465c12cd); rtl92e_writel(dev, rOFDM0_RxDetector2, 0x465c12cd);
} }
......
...@@ -48,11 +48,11 @@ int rtl8192E_suspend(struct pci_dev *pdev, pm_message_t state) ...@@ -48,11 +48,11 @@ int rtl8192E_suspend(struct pci_dev *pdev, pm_message_t state)
rtl92e_set_rf_state(dev, eRfOff, RF_CHANGE_BY_INIT, true); rtl92e_set_rf_state(dev, eRfOff, RF_CHANGE_BY_INIT, true);
ulRegRead = rtl92e_readl(dev, CPU_GEN); ulRegRead = rtl92e_readl(dev, CPU_GEN);
ulRegRead |= CPU_GEN_SYSTEM_RESET; ulRegRead |= CPU_GEN_SYSTEM_RESET;
write_nic_dword(dev, CPU_GEN, ulRegRead); rtl92e_writel(dev, CPU_GEN, ulRegRead);
} else { } else {
write_nic_dword(dev, WFCRC0, 0xffffffff); rtl92e_writel(dev, WFCRC0, 0xffffffff);
write_nic_dword(dev, WFCRC1, 0xffffffff); rtl92e_writel(dev, WFCRC1, 0xffffffff);
write_nic_dword(dev, WFCRC2, 0xffffffff); rtl92e_writel(dev, WFCRC2, 0xffffffff);
rtl92e_writeb(dev, PMR, 0x5); rtl92e_writeb(dev, PMR, 0x5);
rtl92e_writeb(dev, MacBlkCtrl, 0xa); rtl92e_writeb(dev, MacBlkCtrl, 0xa);
} }
......
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