Commit bd2912f4 authored by Nitin Yadav's avatar Nitin Yadav Committed by Vignesh Raghavendra

arm64: dts: ti: k3-am62-main: Update OTAP and ITAP delay select

UHS Class U1 sd-card are not getting detected due to incorrect
OTAP/ITAP delay select values in linux. Update OTAP and ITAP
delay select values for various speed modes. For sdhci0, update
OTAP delay values for ddr52 & HS200 and add ITAP delay for legacy
& mmc-hs. For sdhci1 & sdhci2, update OTAP & ITAP delay select
recommended as in RIOT for various speed modes.
Signed-off-by: default avatarNitin Yadav <n-yadav@ti.com>
[cherry-pick from vendor BSP]
Signed-off-by: default avatarSjoerd Simons <sjoerd@collabora.com>
Tested-by: default avatarMartyn Welch <martyn.welch@collabora.com>
Signed-off-by: default avatarVignesh Raghavendra <vigneshr@ti.com>
Link: https://lore.kernel.org/r/20230112162847.973869-2-sjoerd@collabora.com
parent 6be5d8e5
...@@ -501,8 +501,10 @@ sdhci0: mmc@fa10000 { ...@@ -501,8 +501,10 @@ sdhci0: mmc@fa10000 {
ti,clkbuf-sel = <0x7>; ti,clkbuf-sel = <0x7>;
ti,otap-del-sel-legacy = <0x0>; ti,otap-del-sel-legacy = <0x0>;
ti,otap-del-sel-mmc-hs = <0x0>; ti,otap-del-sel-mmc-hs = <0x0>;
ti,otap-del-sel-ddr52 = <0x9>; ti,otap-del-sel-ddr52 = <0x5>;
ti,otap-del-sel-hs200 = <0x6>; ti,otap-del-sel-hs200 = <0x5>;
ti,itap-del-sel-legacy = <0xa>;
ti,itap-del-sel-mmc-hs = <0x1>;
status = "disabled"; status = "disabled";
}; };
...@@ -514,17 +516,17 @@ sdhci1: mmc@fa00000 { ...@@ -514,17 +516,17 @@ sdhci1: mmc@fa00000 {
clocks = <&k3_clks 58 5>, <&k3_clks 58 6>; clocks = <&k3_clks 58 5>, <&k3_clks 58 6>;
clock-names = "clk_ahb", "clk_xin"; clock-names = "clk_ahb", "clk_xin";
ti,trm-icp = <0x2>; ti,trm-icp = <0x2>;
ti,otap-del-sel-legacy = <0x0>; ti,otap-del-sel-legacy = <0x8>;
ti,otap-del-sel-sd-hs = <0x0>; ti,otap-del-sel-sd-hs = <0x0>;
ti,otap-del-sel-sdr12 = <0xf>; ti,otap-del-sel-sdr12 = <0x0>;
ti,otap-del-sel-sdr25 = <0xf>; ti,otap-del-sel-sdr25 = <0x0>;
ti,otap-del-sel-sdr50 = <0xc>; ti,otap-del-sel-sdr50 = <0x8>;
ti,otap-del-sel-sdr104 = <0x6>; ti,otap-del-sel-sdr104 = <0x7>;
ti,otap-del-sel-ddr50 = <0x9>; ti,otap-del-sel-ddr50 = <0x4>;
ti,itap-del-sel-legacy = <0x0>; ti,itap-del-sel-legacy = <0xa>;
ti,itap-del-sel-sd-hs = <0x0>; ti,itap-del-sel-sd-hs = <0x1>;
ti,itap-del-sel-sdr12 = <0x0>; ti,itap-del-sel-sdr12 = <0xa>;
ti,itap-del-sel-sdr25 = <0x0>; ti,itap-del-sel-sdr25 = <0x1>;
ti,clkbuf-sel = <0x7>; ti,clkbuf-sel = <0x7>;
bus-width = <4>; bus-width = <4>;
status = "disabled"; status = "disabled";
...@@ -538,17 +540,17 @@ sdhci2: mmc@fa20000 { ...@@ -538,17 +540,17 @@ sdhci2: mmc@fa20000 {
clocks = <&k3_clks 184 5>, <&k3_clks 184 6>; clocks = <&k3_clks 184 5>, <&k3_clks 184 6>;
clock-names = "clk_ahb", "clk_xin"; clock-names = "clk_ahb", "clk_xin";
ti,trm-icp = <0x2>; ti,trm-icp = <0x2>;
ti,otap-del-sel-legacy = <0x0>; ti,otap-del-sel-legacy = <0x8>;
ti,otap-del-sel-sd-hs = <0x0>; ti,otap-del-sel-sd-hs = <0x0>;
ti,otap-del-sel-sdr12 = <0xf>; ti,otap-del-sel-sdr12 = <0x0>;
ti,otap-del-sel-sdr25 = <0xf>; ti,otap-del-sel-sdr25 = <0x0>;
ti,otap-del-sel-sdr50 = <0xc>; ti,otap-del-sel-sdr50 = <0x8>;
ti,otap-del-sel-sdr104 = <0x6>; ti,otap-del-sel-sdr104 = <0x7>;
ti,otap-del-sel-ddr50 = <0x9>; ti,otap-del-sel-ddr50 = <0x8>;
ti,itap-del-sel-legacy = <0x0>; ti,itap-del-sel-legacy = <0xa>;
ti,itap-del-sel-sd-hs = <0x0>; ti,itap-del-sel-sd-hs = <0xa>;
ti,itap-del-sel-sdr12 = <0x0>; ti,itap-del-sel-sdr12 = <0xa>;
ti,itap-del-sel-sdr25 = <0x0>; ti,itap-del-sel-sdr25 = <0x1>;
ti,clkbuf-sel = <0x7>; ti,clkbuf-sel = <0x7>;
status = "disabled"; status = "disabled";
}; };
......
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