Commit ccd58dad authored by Frank Li's avatar Frank Li Committed by Shawn Guo

arm64: dts: imx93-evk: add uart5

Enable uart5 for imx93-evk board.
Signed-off-by: default avatarFrank Li <Frank.Li@nxp.com>
Signed-off-by: default avatarShawn Guo <shawnguo@kernel.org>
parent c7c4825b
...@@ -149,6 +149,12 @@ &lpuart1 { /* console */ ...@@ -149,6 +149,12 @@ &lpuart1 { /* console */
status = "okay"; status = "okay";
}; };
&lpuart5 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_uart5>;
status = "okay";
};
&usdhc1 { &usdhc1 {
pinctrl-names = "default", "state_100mhz", "state_200mhz"; pinctrl-names = "default", "state_100mhz", "state_200mhz";
pinctrl-0 = <&pinctrl_usdhc1>; pinctrl-0 = <&pinctrl_usdhc1>;
...@@ -222,6 +228,15 @@ MX93_PAD_UART1_TXD__LPUART1_TX 0x31e ...@@ -222,6 +228,15 @@ MX93_PAD_UART1_TXD__LPUART1_TX 0x31e
>; >;
}; };
pinctrl_uart5: uart5grp {
fsl,pins = <
MX93_PAD_DAP_TDO_TRACESWO__LPUART5_TX 0x31e
MX93_PAD_DAP_TDI__LPUART5_RX 0x31e
MX93_PAD_DAP_TMS_SWDIO__LPUART5_RTS_B 0x31e
MX93_PAD_DAP_TCLK_SWCLK__LPUART5_CTS_B 0x31e
>;
};
pinctrl_usdhc1: usdhc1grp { pinctrl_usdhc1: usdhc1grp {
fsl,pins = < fsl,pins = <
MX93_PAD_SD1_CLK__USDHC1_CLK 0x15fe MX93_PAD_SD1_CLK__USDHC1_CLK 0x15fe
......
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