Commit d5aabbca authored by Linus Torvalds's avatar Linus Torvalds

Merge tag 'boards-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc

Pull ARM SoC board updates from Olof Johansson:
 "Board-related updates.  This branch is getting smaller and smaller,
  which is the whole idea so that's reassuring.

  Right now by far most of the code is related to shmobile updates, and
  they are now switching over to removal of board code and migration to
  multiplatform, so we'll see their board code base shrink in the near
  future too, I hope.

  In addition to that is some defconfig updates, some display updates
  for OMAP and a bit of new board support for Rockchip boards"

* tag 'boards-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (56 commits)
  ARM: rockchip: add support for rk3188 and Radxa Rock board
  ARM: rockchip: add dts for bqcurie2 tablet
  ARM: rockchip: enable arm-global-timer
  ARM: rockchip: move shared dt properties to common source file
  ARM: OMAP2+: display: Create omap_vout device inside omap_display_init
  ARM: OMAP2+: display: Create omapvrfb and omapfb devices inside omap_display_init
  ARM: OMAP2+: display: Create omapdrm device inside omap_display_init
  ARM: OMAP2+: drm: Don't build device for DMM
  ARM: tegra: defconfig updates
  RX-51: Add support for OMAP3 ROM Random Number Generator
  ARM: OMAP3: RX-51: ARM errata 430973 workaround
  ARM: OMAP3: Add secure function omap_smc3() which calling instruction smc #1
  ARM: shmobile: marzen: enable INTC IRQ
  ARM: shmobile: bockw: add SMSC support on reference
  ARM: shmobile: Use SMP on Koelsch
  ARM: shmobile: Remove KZM9D reference DTS
  ARM: shmobile: Let KZM9D multiplatform boot with KZM9D DTB
  ARM: shmobile: Remove non-multiplatform KZM9D reference support
  ARM: shmobile: Use KZM9D without reference for multiplatform
  ARM: shmobile: Sync KZM9D DTS with KZM9D reference DTS
  ...
parents aac59e3e 60cd8b09
...@@ -198,13 +198,14 @@ dtb-$(CONFIG_ARCH_U8500) += ste-snowball.dtb \ ...@@ -198,13 +198,14 @@ dtb-$(CONFIG_ARCH_U8500) += ste-snowball.dtb \
ste-ccu9540.dtb ste-ccu9540.dtb
dtb-$(CONFIG_ARCH_S3C24XX) += s3c2416-smdk2416.dtb dtb-$(CONFIG_ARCH_S3C24XX) += s3c2416-smdk2416.dtb
dtb-$(CONFIG_ARCH_SHMOBILE) += emev2-kzm9d.dtb \ dtb-$(CONFIG_ARCH_SHMOBILE) += emev2-kzm9d.dtb \
emev2-kzm9d-reference.dtb \ r7s72100-genmai.dtb \
r8a7740-armadillo800eva.dtb \ r8a7740-armadillo800eva.dtb \
r8a7778-bockw.dtb \ r8a7778-bockw.dtb \
r8a7778-bockw-reference.dtb \ r8a7778-bockw-reference.dtb \
r8a7740-armadillo800eva-reference.dtb \ r8a7740-armadillo800eva-reference.dtb \
r8a7779-marzen.dtb \ r8a7779-marzen.dtb \
r8a7779-marzen-reference.dtb \ r8a7779-marzen-reference.dtb \
r8a7791-koelsch.dtb \
r8a7790-lager.dtb \ r8a7790-lager.dtb \
r8a7790-lager-reference.dtb \ r8a7790-lager-reference.dtb \
sh73a0-kzm9g.dtb \ sh73a0-kzm9g.dtb \
...@@ -212,7 +213,7 @@ dtb-$(CONFIG_ARCH_SHMOBILE) += emev2-kzm9d.dtb \ ...@@ -212,7 +213,7 @@ dtb-$(CONFIG_ARCH_SHMOBILE) += emev2-kzm9d.dtb \
r8a73a4-ape6evm.dtb \ r8a73a4-ape6evm.dtb \
r8a73a4-ape6evm-reference.dtb \ r8a73a4-ape6evm-reference.dtb \
sh7372-mackerel.dtb sh7372-mackerel.dtb
dtb-$(CONFIG_ARCH_SHMOBILE_MULTI) += emev2-kzm9d-reference.dtb dtb-$(CONFIG_ARCH_SHMOBILE_MULTI) += emev2-kzm9d.dtb
dtb-$(CONFIG_ARCH_SOCFPGA) += socfpga_cyclone5.dtb \ dtb-$(CONFIG_ARCH_SOCFPGA) += socfpga_cyclone5.dtb \
socfpga_vt.dtb socfpga_vt.dtb
dtb-$(CONFIG_ARCH_SPEAR13XX) += spear1310-evb.dtb \ dtb-$(CONFIG_ARCH_SPEAR13XX) += spear1310-evb.dtb \
......
/*
* Device Tree Source for the KZM9D board
*
* Copyright (C) 2013 Renesas Solutions Corp.
*
* This file is licensed under the terms of the GNU General Public License
* version 2. This program is licensed "as is" without any warranty of any
* kind, whether express or implied.
*/
/dts-v1/;
/include/ "emev2.dtsi"
/ {
model = "EMEV2 KZM9D Board";
compatible = "renesas,kzm9d-reference", "renesas,emev2";
memory {
device_type = "memory";
reg = <0x40000000 0x8000000>;
};
chosen {
bootargs = "console=ttyS1,115200n81 ignore_loglevel root=/dev/nfs ip=dhcp";
};
reg_1p8v: regulator@0 {
compatible = "regulator-fixed";
regulator-name = "fixed-1.8V";
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <1800000>;
regulator-always-on;
regulator-boot-on;
};
reg_3p3v: regulator@1 {
compatible = "regulator-fixed";
regulator-name = "fixed-3.3V";
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
regulator-always-on;
regulator-boot-on;
};
lan9220@20000000 {
compatible = "smsc,lan9220", "smsc,lan9115";
reg = <0x20000000 0x10000>;
phy-mode = "mii";
interrupt-parent = <&gpio0>;
interrupts = <1 1>; /* active high */
reg-io-width = <4>;
smsc,irq-active-high;
smsc,irq-push-pull;
vddvario-supply = <&reg_1p8v>;
vdd33a-supply = <&reg_3p3v>;
};
};
/* /*
* Device Tree Source for the KZM9D board * Device Tree Source for the KZM9D board
* *
* Copyright (C) 2012 Renesas Solutions Corp. * Copyright (C) 2013 Renesas Solutions Corp.
* *
* This file is licensed under the terms of the GNU General Public License * This file is licensed under the terms of the GNU General Public License
* version 2. This program is licensed "as is" without any warranty of any * version 2. This program is licensed "as is" without any warranty of any
...@@ -23,4 +23,35 @@ memory { ...@@ -23,4 +23,35 @@ memory {
chosen { chosen {
bootargs = "console=ttyS1,115200n81 ignore_loglevel root=/dev/nfs ip=dhcp"; bootargs = "console=ttyS1,115200n81 ignore_loglevel root=/dev/nfs ip=dhcp";
}; };
reg_1p8v: regulator@0 {
compatible = "regulator-fixed";
regulator-name = "fixed-1.8V";
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <1800000>;
regulator-always-on;
regulator-boot-on;
};
reg_3p3v: regulator@1 {
compatible = "regulator-fixed";
regulator-name = "fixed-3.3V";
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
regulator-always-on;
regulator-boot-on;
};
lan9220@20000000 {
compatible = "smsc,lan9220", "smsc,lan9115";
reg = <0x20000000 0x10000>;
phy-mode = "mii";
interrupt-parent = <&gpio0>;
interrupts = <1 1>; /* active high */
reg-io-width = <4>;
smsc,irq-active-high;
smsc,irq-push-pull;
vddvario-supply = <&reg_1p8v>;
vdd33a-supply = <&reg_3p3v>;
};
}; };
/*
* Device Tree Source for the Genmai board
*
* Copyright (C) 2013 Renesas Solutions Corp.
*
* This file is licensed under the terms of the GNU General Public License
* version 2. This program is licensed "as is" without any warranty of any
* kind, whether express or implied.
*/
/dts-v1/;
/include/ "r7s72100.dtsi"
/ {
model = "Genmai";
compatible = "renesas,genmai", "renesas,r7s72100";
chosen {
bootargs = "console=ttySC2,115200 ignore_loglevel rw root=/dev/nfs ip=dhcp";
};
memory {
device_type = "memory";
reg = <0x08000000 0x08000000>;
};
lbsc {
#address-cells = <1>;
#size-cells = <1>;
};
};
/*
* Device Tree Source for the Koelsch board
*
* Copyright (C) 2013 Renesas Electronics Corporation
* Copyright (C) 2013 Renesas Solutions Corp.
*
* This file is licensed under the terms of the GNU General Public License
* version 2. This program is licensed "as is" without any warranty of any
* kind, whether express or implied.
*/
/dts-v1/;
/include/ "r8a7791.dtsi"
/ {
model = "Koelsch";
compatible = "renesas,koelsch", "renesas,r8a7791";
chosen {
bootargs = "console=ttySC6,115200 ignore_loglevel rw root=/dev/nfs ip=dhcp";
};
memory@40000000 {
device_type = "memory";
reg = <0 0x40000000 0 0x80000000>;
};
lbsc {
#address-cells = <1>;
#size-cells = <1>;
};
};
/*
* Copyright (c) 2013 MundoReader S.L.
* Author: Heiko Stuebner <heiko@sntech.de>
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*/
/dts-v1/;
#include "rk3066a.dtsi"
/ {
model = "bq Curie 2";
memory {
reg = <0x60000000 0x40000000>;
};
soc {
uart0: serial@10124000 {
status = "okay";
};
uart1: serial@10126000 {
status = "okay";
};
uart2: serial@20064000 {
pinctrl-names = "default";
pinctrl-0 = <&uart2_xfer>;
status = "okay";
};
uart3: serial@20068000 {
status = "okay";
};
vcc_sd0: fixed-regulator {
compatible = "regulator-fixed";
regulator-name = "sdmmc-supply";
regulator-min-microvolt = <3000000>;
regulator-max-microvolt = <3000000>;
gpio = <&gpio3 7 GPIO_ACTIVE_LOW>;
startup-delay-us = <100000>;
};
dwmmc@10214000 { /* sdmmc */
num-slots = <1>;
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&sd0_clk &sd0_cmd &sd0_cd &sd0_bus4>;
vmmc-supply = <&vcc_sd0>;
slot@0 {
reg = <0>;
bus-width = <4>;
disable-wp;
};
};
dwmmc@10218000 { /* wifi */
num-slots = <1>;
status = "okay";
non-removable;
pinctrl-names = "default";
pinctrl-0 = <&sd1_clk &sd1_cmd &sd1_bus4>;
slot@0 {
reg = <0>;
bus-width = <4>;
disable-wp;
};
};
gpio-keys {
compatible = "gpio-keys";
#address-cells = <1>;
#size-cells = <0>;
autorepeat;
button@0 {
gpios = <&gpio6 2 GPIO_ACTIVE_LOW>; /* GPIO6_A2 */
linux,code = <116>;
label = "GPIO Key Power";
linux,input-type = <1>;
gpio-key,wakeup = <1>;
debounce-interval = <100>;
};
button@1 {
gpios = <&gpio4 21 GPIO_ACTIVE_LOW>; /* GPIO4_C5 */
linux,code = <104>;
label = "GPIO Key Vol-";
linux,input-type = <1>;
gpio-key,wakeup = <0>;
debounce-interval = <100>;
};
/* VOL+ comes somehow thru the ADC */
};
};
};
...@@ -14,15 +14,12 @@ ...@@ -14,15 +14,12 @@
*/ */
#include <dt-bindings/gpio/gpio.h> #include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/interrupt-controller/irq.h>
#include <dt-bindings/interrupt-controller/arm-gic.h>
#include <dt-bindings/pinctrl/rockchip.h> #include <dt-bindings/pinctrl/rockchip.h>
#include "skeleton.dtsi" #include "rk3xxx.dtsi"
#include "rk3066a-clocks.dtsi" #include "rk3066a-clocks.dtsi"
/ { / {
compatible = "rockchip,rk3066a"; compatible = "rockchip,rk3066a";
interrupt-parent = <&gic>;
cpus { cpus {
#address-cells = <1>; #address-cells = <1>;
...@@ -43,33 +40,6 @@ cpu@1 { ...@@ -43,33 +40,6 @@ cpu@1 {
}; };
soc { soc {
#address-cells = <1>;
#size-cells = <1>;
compatible = "simple-bus";
ranges;
gic: interrupt-controller@1013d000 {
compatible = "arm,cortex-a9-gic";
interrupt-controller;
#interrupt-cells = <3>;
reg = <0x1013d000 0x1000>,
<0x1013c100 0x0100>;
};
L2: l2-cache-controller@10138000 {
compatible = "arm,pl310-cache";
reg = <0x10138000 0x1000>;
cache-unified;
cache-level = <2>;
};
local-timer@1013c600 {
compatible = "arm,cortex-a9-twd-timer";
reg = <0x1013c600 0x20>;
interrupts = <GIC_PPI 13 0x304>;
clocks = <&dummy150m>;
};
timer@20038000 { timer@20038000 {
compatible = "snps,dw-apb-timer-osc"; compatible = "snps,dw-apb-timer-osc";
reg = <0x20038000 0x100>; reg = <0x20038000 0x100>;
...@@ -298,71 +268,5 @@ sd1_bus4: sd1-bus-width4 { ...@@ -298,71 +268,5 @@ sd1_bus4: sd1-bus-width4 {
}; };
}; };
}; };
uart0: serial@10124000 {
compatible = "snps,dw-apb-uart";
reg = <0x10124000 0x400>;
interrupts = <GIC_SPI 34 IRQ_TYPE_LEVEL_HIGH>;
reg-shift = <2>;
reg-io-width = <1>;
clocks = <&clk_gates1 8>;
status = "disabled";
};
uart1: serial@10126000 {
compatible = "snps,dw-apb-uart";
reg = <0x10126000 0x400>;
interrupts = <GIC_SPI 35 IRQ_TYPE_LEVEL_HIGH>;
reg-shift = <2>;
reg-io-width = <1>;
clocks = <&clk_gates1 10>;
status = "disabled";
};
uart2: serial@20064000 {
compatible = "snps,dw-apb-uart";
reg = <0x20064000 0x400>;
interrupts = <GIC_SPI 36 IRQ_TYPE_LEVEL_HIGH>;
reg-shift = <2>;
reg-io-width = <1>;
clocks = <&clk_gates1 12>;
status = "disabled";
};
uart3: serial@20068000 {
compatible = "snps,dw-apb-uart";
reg = <0x20068000 0x400>;
interrupts = <GIC_SPI 37 IRQ_TYPE_LEVEL_HIGH>;
reg-shift = <2>;
reg-io-width = <1>;
clocks = <&clk_gates1 14>;
status = "disabled";
};
dwmmc@10214000 {
compatible = "rockchip,rk2928-dw-mshc";
reg = <0x10214000 0x1000>;
interrupts = <GIC_SPI 23 IRQ_TYPE_LEVEL_HIGH>;
#address-cells = <1>;
#size-cells = <0>;
clocks = <&clk_gates5 10>, <&clk_gates2 11>;
clock-names = "biu", "ciu";
status = "disabled";
};
dwmmc@10218000 {
compatible = "rockchip,rk2928-dw-mshc";
reg = <0x10218000 0x1000>;
interrupts = <GIC_SPI 24 IRQ_TYPE_LEVEL_HIGH>;
#address-cells = <1>;
#size-cells = <0>;
clocks = <&clk_gates5 11>, <&clk_gates2 13>;
clock-names = "biu", "ciu";
status = "disabled";
};
}; };
}; };
/*
* Copyright (c) 2013 MundoReader S.L.
* Author: Heiko Stuebner <heiko@sntech.de>
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*/
/ {
clocks {
#address-cells = <1>;
#size-cells = <1>;
ranges;
/*
* This is a dummy clock, to be used as placeholder on
* other mux clocks when a specific parent clock is not
* yet implemented. It should be dropped when the driver
* is complete.
*/
dummy: dummy {
compatible = "fixed-clock";
clock-frequency = <0>;
#clock-cells = <0>;
};
xin24m: xin24m {
compatible = "fixed-clock";
clock-frequency = <24000000>;
#clock-cells = <0>;
};
dummy48m: dummy48m {
compatible = "fixed-clock";
clock-frequency = <48000000>;
#clock-cells = <0>;
};
dummy150m: dummy150m {
compatible = "fixed-clock";
clock-frequency = <150000000>;
#clock-cells = <0>;
};
clk_gates0: gate-clk@200000d0 {
compatible = "rockchip,rk2928-gate-clk";
reg = <0x200000d0 0x4>;
clocks = <&dummy150m>, <&dummy>,
<&dummy>, <&dummy>,
<&dummy>, <&dummy>,
<&dummy>, <&dummy>,
<&dummy>, <&dummy>,
<&dummy>, <&dummy>,
<&dummy>, <&dummy>,
<&dummy>, <&dummy>;
clock-output-names =
"gate_core_periph", "gate_cpu_gpll",
"gate_ddrphy", "gate_aclk_cpu",
"gate_hclk_cpu", "gate_pclk_cpu",
"gate_atclk_cpu", "gate_aclk_core",
"reserved", "gate_i2s0",
"gate_i2s0_frac", "reserved",
"reserved", "gate_spdif",
"gate_spdif_frac", "gate_testclk";
#clock-cells = <1>;
};
clk_gates1: gate-clk@200000d4 {
compatible = "rockchip,rk2928-gate-clk";
reg = <0x200000d4 0x4>;
clocks = <&xin24m>, <&xin24m>,
<&xin24m>, <&dummy>,
<&dummy>, <&xin24m>,
<&xin24m>, <&dummy>,
<&xin24m>, <&dummy>,
<&xin24m>, <&dummy>,
<&xin24m>, <&dummy>,
<&xin24m>, <&dummy>;
clock-output-names =
"gate_timer0", "gate_timer1",
"gate_timer3", "gate_jtag",
"gate_aclk_lcdc1_src", "gate_otgphy0",
"gate_otgphy1", "gate_ddr_gpll",
"gate_uart0", "gate_frac_uart0",
"gate_uart1", "gate_frac_uart1",
"gate_uart2", "gate_frac_uart2",
"gate_uart3", "gate_frac_uart3";
#clock-cells = <1>;
};
clk_gates2: gate-clk@200000d8 {
compatible = "rockchip,rk2928-gate-clk";
reg = <0x200000d8 0x4>;
clocks = <&clk_gates2 1>, <&dummy>,
<&dummy>, <&dummy>,
<&dummy>, <&dummy>,
<&clk_gates2 3>, <&dummy>,
<&dummy>, <&dummy>,
<&dummy>, <&dummy48m>,
<&dummy>, <&dummy48m>,
<&dummy>, <&dummy>;
clock-output-names =
"gate_periph_src", "gate_aclk_periph",
"gate_hclk_periph", "gate_pclk_periph",
"gate_smc", "gate_mac",
"gate_hsadc", "gate_hsadc_frac",
"gate_saradc", "gate_spi0",
"gate_spi1", "gate_mmc0",
"gate_mac_lbtest", "gate_mmc1",
"gate_emmc", "reserved";
#clock-cells = <1>;
};
clk_gates3: gate-clk@200000dc {
compatible = "rockchip,rk2928-gate-clk";
reg = <0x200000dc 0x4>;
clocks = <&dummy>, <&dummy>,
<&dummy>, <&dummy>,
<&xin24m>, <&xin24m>,
<&dummy>, <&dummy>,
<&xin24m>, <&dummy>,
<&dummy>, <&dummy>,
<&dummy>, <&dummy>,
<&xin24m>, <&dummy>;
clock-output-names =
"gate_aclk_lcdc0_src", "gate_dclk_lcdc0",
"gate_dclk_lcdc1", "gate_pclkin_cif0",
"gate_timer2", "gate_timer4",
"gate_hsicphy", "gate_cif0_out",
"gate_timer5", "gate_aclk_vepu",
"gate_hclk_vepu", "gate_aclk_vdpu",
"gate_hclk_vdpu", "reserved",
"gate_timer6", "gate_aclk_gpu_src";
#clock-cells = <1>;
};
clk_gates4: gate-clk@200000e0 {
compatible = "rockchip,rk2928-gate-clk";
reg = <0x200000e0 0x4>;
clocks = <&clk_gates2 2>, <&clk_gates2 3>,
<&clk_gates2 1>, <&clk_gates2 1>,
<&clk_gates2 1>, <&clk_gates2 2>,
<&clk_gates2 2>, <&clk_gates2 2>,
<&clk_gates0 4>, <&clk_gates0 4>,
<&clk_gates0 3>, <&dummy>,
<&clk_gates0 3>, <&dummy>,
<&dummy>, <&dummy>;
clock-output-names =
"gate_hclk_peri_axi_matrix", "gate_pclk_peri_axi_matrix",
"gate_aclk_cpu_peri", "gate_aclk_peri_axi_matrix",
"gate_aclk_pei_niu", "gate_hclk_usb_peri",
"gate_hclk_peri_ahb_arbi", "gate_hclk_emem_peri",
"gate_hclk_cpubus", "gate_hclk_ahb2apb",
"gate_aclk_strc_sys", "reserved",
"gate_aclk_intmem", "reserved",
"gate_hclk_imem1", "gate_hclk_imem0";
#clock-cells = <1>;
};
clk_gates5: gate-clk@200000e4 {
compatible = "rockchip,rk2928-gate-clk";
reg = <0x200000e4 0x4>;
clocks = <&clk_gates0 3>, <&clk_gates2 1>,
<&clk_gates0 5>, <&clk_gates0 5>,
<&clk_gates0 5>, <&clk_gates0 5>,
<&clk_gates0 4>, <&clk_gates0 5>,
<&clk_gates2 1>, <&clk_gates2 2>,
<&clk_gates2 2>, <&clk_gates2 2>,
<&clk_gates2 2>, <&clk_gates4 5>;
clock-output-names =
"gate_aclk_dmac1", "gate_aclk_dmac2",
"gate_pclk_efuse", "gate_pclk_tzpc",
"gate_pclk_grf", "gate_pclk_pmu",
"gate_hclk_rom", "gate_pclk_ddrupctl",
"gate_aclk_smc", "gate_hclk_nandc",
"gate_hclk_mmc0", "gate_hclk_mmc1",
"gate_hclk_emmc", "gate_hclk_otg0";
#clock-cells = <1>;
};
clk_gates6: gate-clk@200000e8 {
compatible = "rockchip,rk2928-gate-clk";
reg = <0x200000e8 0x4>;
clocks = <&clk_gates3 0>, <&clk_gates0 4>,
<&clk_gates0 4>, <&clk_gates1 4>,
<&clk_gates0 4>, <&clk_gates3 0>,
<&dummy>, <&dummy>,
<&clk_gates3 0>, <&clk_gates0 4>,
<&clk_gates0 4>, <&clk_gates1 4>,
<&clk_gates0 4>, <&clk_gates3 0>;
clock-output-names =
"gate_aclk_lcdc0", "gate_hclk_lcdc0",
"gate_hclk_lcdc1", "gate_aclk_lcdc1",
"gate_hclk_cif0", "gate_aclk_cif0",
"reserved", "reserved",
"gate_aclk_ipp", "gate_hclk_ipp",
"gate_hclk_rga", "gate_aclk_rga",
"gate_hclk_vio_bus", "gate_aclk_vio0";
#clock-cells = <1>;
};
clk_gates7: gate-clk@200000ec {
compatible = "rockchip,rk2928-gate-clk";
reg = <0x200000ec 0x4>;
clocks = <&clk_gates2 2>, <&clk_gates0 4>,
<&clk_gates0 4>, <&dummy>,
<&dummy>, <&clk_gates2 2>,
<&clk_gates2 2>, <&clk_gates0 5>,
<&dummy>, <&clk_gates0 5>,
<&clk_gates0 5>, <&clk_gates2 3>,
<&clk_gates2 3>, <&clk_gates2 3>,
<&clk_gates2 3>, <&clk_gates2 3>;
clock-output-names =
"gate_hclk_emac", "gate_hclk_spdif",
"gate_hclk_i2s0_2ch", "gate_hclk_otg1",
"gate_hclk_hsic", "gate_hclk_hsadc",
"gate_hclk_pidf", "gate_pclk_timer0",
"reserved", "gate_pclk_timer2",
"gate_pclk_pwm01", "gate_pclk_pwm23",
"gate_pclk_spi0", "gate_pclk_spi1",
"gate_pclk_saradc", "gate_pclk_wdt";
#clock-cells = <1>;
};
clk_gates8: gate-clk@200000f0 {
compatible = "rockchip,rk2928-gate-clk";
reg = <0x200000f0 0x4>;
clocks = <&clk_gates0 5>, <&clk_gates0 5>,
<&clk_gates2 3>, <&clk_gates2 3>,
<&clk_gates0 5>, <&clk_gates0 5>,
<&clk_gates2 3>, <&clk_gates2 3>,
<&clk_gates2 3>, <&clk_gates0 5>,
<&clk_gates0 5>, <&clk_gates0 5>,
<&clk_gates2 3>, <&dummy>;
clock-output-names =
"gate_pclk_uart0", "gate_pclk_uart1",
"gate_pclk_uart2", "gate_pclk_uart3",
"gate_pclk_i2c0", "gate_pclk_i2c1",
"gate_pclk_i2c2", "gate_pclk_i2c3",
"gate_pclk_i2c4", "gate_pclk_gpio0",
"gate_pclk_gpio1", "gate_pclk_gpio2",
"gate_pclk_gpio3", "gate_aclk_gps";
#clock-cells = <1>;
};
clk_gates9: gate-clk@200000f4 {
compatible = "rockchip,rk2928-gate-clk";
reg = <0x200000f4 0x4>;
clocks = <&dummy>, <&dummy>,
<&dummy>, <&dummy>,
<&dummy>, <&dummy>,
<&dummy>, <&dummy>;
clock-output-names =
"gate_clk_core_dbg", "gate_pclk_dbg",
"gate_clk_trace", "gate_atclk",
"gate_clk_l2c", "gate_aclk_vio1",
"gate_pclk_publ", "gate_aclk_gpu";
#clock-cells = <1>;
};
};
};
/*
* Copyright (c) 2013 Heiko Stuebner <heiko@sntech.de>
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*/
/dts-v1/;
#include "rk3188.dtsi"
/ {
model = "Radxa Rock";
memory {
reg = <0x60000000 0x80000000>;
};
soc {
uart0: serial@10124000 {
status = "okay";
};
uart1: serial@10126000 {
status = "okay";
};
uart2: serial@20064000 {
pinctrl-names = "default";
pinctrl-0 = <&uart2_xfer>;
status = "okay";
};
uart3: serial@20068000 {
status = "okay";
};
gpio-keys {
compatible = "gpio-keys";
#address-cells = <1>;
#size-cells = <0>;
autorepeat;
button@0 {
gpios = <&gpio0 4 GPIO_ACTIVE_LOW>;
linux,code = <116>;
label = "GPIO Key Power";
linux,input-type = <1>;
gpio-key,wakeup = <1>;
debounce-interval = <100>;
};
};
gpio-leds {
compatible = "gpio-leds";
green {
gpios = <&gpio0 12 GPIO_ACTIVE_LOW>;
default-state = "off";
};
yellow {
gpios = <&gpio0 14 GPIO_ACTIVE_LOW>;
default-state = "off";
};
sleep {
gpios = <&gpio0 15 0>;
default-state = "off";
};
};
};
};
/*
* Copyright (c) 2013 MundoReader S.L.
* Author: Heiko Stuebner <heiko@sntech.de>
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*/
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/pinctrl/rockchip.h>
#include "rk3xxx.dtsi"
#include "rk3188-clocks.dtsi"
/ {
compatible = "rockchip,rk3188";
cpus {
#address-cells = <1>;
#size-cells = <0>;
cpu@0 {
device_type = "cpu";
compatible = "arm,cortex-a9";
next-level-cache = <&L2>;
reg = <0x0>;
};
cpu@1 {
device_type = "cpu";
compatible = "arm,cortex-a9";
next-level-cache = <&L2>;
reg = <0x1>;
};
cpu@2 {
device_type = "cpu";
compatible = "arm,cortex-a9";
next-level-cache = <&L2>;
reg = <0x2>;
};
cpu@3 {
device_type = "cpu";
compatible = "arm,cortex-a9";
next-level-cache = <&L2>;
reg = <0x3>;
};
};
soc {
global-timer@1013c200 {
interrupts = <GIC_PPI 11 0xf04>;
};
local-timer@1013c600 {
interrupts = <GIC_PPI 13 0xf04>;
};
pinctrl@20008000 {
compatible = "rockchip,rk3188-pinctrl";
reg = <0x20008000 0xa0>,
<0x20008164 0x1a0>;
reg-names = "base", "pull";
#address-cells = <1>;
#size-cells = <1>;
ranges;
gpio0: gpio0@0x2000a000 {
compatible = "rockchip,rk3188-gpio-bank0";
reg = <0x2000a000 0x100>,
<0x20004064 0x8>;
interrupts = <GIC_SPI 54 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&clk_gates8 9>;
gpio-controller;
#gpio-cells = <2>;
interrupt-controller;
#interrupt-cells = <2>;
};
gpio1: gpio1@0x2003c000 {
compatible = "rockchip,gpio-bank";
reg = <0x2003c000 0x100>;
interrupts = <GIC_SPI 55 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&clk_gates8 10>;
gpio-controller;
#gpio-cells = <2>;
interrupt-controller;
#interrupt-cells = <2>;
};
gpio2: gpio2@2003e000 {
compatible = "rockchip,gpio-bank";
reg = <0x2003e000 0x100>;
interrupts = <GIC_SPI 56 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&clk_gates8 11>;
gpio-controller;
#gpio-cells = <2>;
interrupt-controller;
#interrupt-cells = <2>;
};
gpio3: gpio3@20080000 {
compatible = "rockchip,gpio-bank";
reg = <0x20080000 0x100>;
interrupts = <GIC_SPI 57 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&clk_gates8 12>;
gpio-controller;
#gpio-cells = <2>;
interrupt-controller;
#interrupt-cells = <2>;
};
pcfg_pull_up: pcfg_pull_up {
bias-pull-up;
};
pcfg_pull_down: pcfg_pull_down {
bias-pull-down;
};
pcfg_pull_none: pcfg_pull_none {
bias-disable;
};
uart0 {
uart0_xfer: uart0-xfer {
rockchip,pins = <RK_GPIO1 0 RK_FUNC_1 &pcfg_pull_none>,
<RK_GPIO1 1 RK_FUNC_1 &pcfg_pull_none>;
};
uart0_cts: uart0-cts {
rockchip,pins = <RK_GPIO1 2 RK_FUNC_1 &pcfg_pull_none>;
};
uart0_rts: uart0-rts {
rockchip,pins = <RK_GPIO1 3 RK_FUNC_1 &pcfg_pull_none>;
};
};
uart1 {
uart1_xfer: uart1-xfer {
rockchip,pins = <RK_GPIO1 4 RK_FUNC_1 &pcfg_pull_none>,
<RK_GPIO1 5 RK_FUNC_1 &pcfg_pull_none>;
};
uart1_cts: uart1-cts {
rockchip,pins = <RK_GPIO1 6 RK_FUNC_1 &pcfg_pull_none>;
};
uart1_rts: uart1-rts {
rockchip,pins = <RK_GPIO1 7 RK_FUNC_1 &pcfg_pull_none>;
};
};
uart2 {
uart2_xfer: uart2-xfer {
rockchip,pins = <RK_GPIO1 8 RK_FUNC_1 &pcfg_pull_none>,
<RK_GPIO1 9 RK_FUNC_1 &pcfg_pull_none>;
};
/* no rts / cts for uart2 */
};
uart3 {
uart3_xfer: uart3-xfer {
rockchip,pins = <RK_GPIO1 10 RK_FUNC_1 &pcfg_pull_none>,
<RK_GPIO1 11 RK_FUNC_1 &pcfg_pull_none>;
};
uart3_cts: uart3-cts {
rockchip,pins = <RK_GPIO1 12 RK_FUNC_1 &pcfg_pull_none>;
};
uart3_rts: uart3-rts {
rockchip,pins = <RK_GPIO1 13 RK_FUNC_1 &pcfg_pull_none>;
};
};
sd0 {
sd0_clk: sd0-clk {
rockchip,pins = <RK_GPIO3 2 RK_FUNC_1 &pcfg_pull_none>;
};
sd0_cmd: sd0-cmd {
rockchip,pins = <RK_GPIO3 3 RK_FUNC_1 &pcfg_pull_none>;
};
sd0_cd: sd0-cd {
rockchip,pins = <RK_GPIO3 8 RK_FUNC_1 &pcfg_pull_none>;
};
sd0_wp: sd0-wp {
rockchip,pins = <RK_GPIO3 9 RK_FUNC_1 &pcfg_pull_none>;
};
sd0_pwr: sd0-pwr {
rockchip,pins = <RK_GPIO3 1 RK_FUNC_1 &pcfg_pull_none>;
};
sd0_bus1: sd0-bus-width1 {
rockchip,pins = <RK_GPIO3 4 RK_FUNC_1 &pcfg_pull_none>;
};
sd0_bus4: sd0-bus-width4 {
rockchip,pins = <RK_GPIO3 4 RK_FUNC_1 &pcfg_pull_none>,
<RK_GPIO3 5 RK_FUNC_1 &pcfg_pull_none>,
<RK_GPIO3 6 RK_FUNC_1 &pcfg_pull_none>,
<RK_GPIO3 7 RK_FUNC_1 &pcfg_pull_none>;
};
};
sd1 {
sd1_clk: sd1-clk {
rockchip,pins = <RK_GPIO3 21 RK_FUNC_1 &pcfg_pull_none>;
};
sd1_cmd: sd1-cmd {
rockchip,pins = <RK_GPIO3 16 RK_FUNC_1 &pcfg_pull_none>;
};
sd1_cd: sd1-cd {
rockchip,pins = <RK_GPIO3 22 RK_FUNC_1 &pcfg_pull_none>;
};
sd1_wp: sd1-wp {
rockchip,pins = <RK_GPIO3 23 RK_FUNC_1 &pcfg_pull_none>;
};
sd1_bus1: sd1-bus-width1 {
rockchip,pins = <RK_GPIO3 17 RK_FUNC_1 &pcfg_pull_none>;
};
sd1_bus4: sd1-bus-width4 {
rockchip,pins = <RK_GPIO3 17 RK_FUNC_1 &pcfg_pull_none>,
<RK_GPIO3 18 RK_FUNC_1 &pcfg_pull_none>,
<RK_GPIO3 19 RK_FUNC_1 &pcfg_pull_none>,
<RK_GPIO3 20 RK_FUNC_1 &pcfg_pull_none>;
};
};
};
};
};
/*
* Copyright (c) 2013 MundoReader S.L.
* Author: Heiko Stuebner <heiko@sntech.de>
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*/
#include <dt-bindings/interrupt-controller/irq.h>
#include <dt-bindings/interrupt-controller/arm-gic.h>
#include "skeleton.dtsi"
/ {
interrupt-parent = <&gic>;
soc {
#address-cells = <1>;
#size-cells = <1>;
compatible = "simple-bus";
ranges;
gic: interrupt-controller@1013d000 {
compatible = "arm,cortex-a9-gic";
interrupt-controller;
#interrupt-cells = <3>;
reg = <0x1013d000 0x1000>,
<0x1013c100 0x0100>;
};
L2: l2-cache-controller@10138000 {
compatible = "arm,pl310-cache";
reg = <0x10138000 0x1000>;
cache-unified;
cache-level = <2>;
};
global-timer@1013c200 {
compatible = "arm,cortex-a9-global-timer";
reg = <0x1013c200 0x20>;
interrupts = <GIC_PPI 11 0x304>;
clocks = <&dummy150m>;
};
local-timer@1013c600 {
compatible = "arm,cortex-a9-twd-timer";
reg = <0x1013c600 0x20>;
interrupts = <GIC_PPI 13 0x304>;
clocks = <&dummy150m>;
};
uart0: serial@10124000 {
compatible = "snps,dw-apb-uart";
reg = <0x10124000 0x400>;
interrupts = <GIC_SPI 34 IRQ_TYPE_LEVEL_HIGH>;
reg-shift = <2>;
reg-io-width = <1>;
clocks = <&clk_gates1 8>;
status = "disabled";
};
uart1: serial@10126000 {
compatible = "snps,dw-apb-uart";
reg = <0x10126000 0x400>;
interrupts = <GIC_SPI 35 IRQ_TYPE_LEVEL_HIGH>;
reg-shift = <2>;
reg-io-width = <1>;
clocks = <&clk_gates1 10>;
status = "disabled";
};
uart2: serial@20064000 {
compatible = "snps,dw-apb-uart";
reg = <0x20064000 0x400>;
interrupts = <GIC_SPI 36 IRQ_TYPE_LEVEL_HIGH>;
reg-shift = <2>;
reg-io-width = <1>;
clocks = <&clk_gates1 12>;
status = "disabled";
};
uart3: serial@20068000 {
compatible = "snps,dw-apb-uart";
reg = <0x20068000 0x400>;
interrupts = <GIC_SPI 37 IRQ_TYPE_LEVEL_HIGH>;
reg-shift = <2>;
reg-io-width = <1>;
clocks = <&clk_gates1 14>;
status = "disabled";
};
dwmmc@10214000 {
compatible = "rockchip,rk2928-dw-mshc";
reg = <0x10214000 0x1000>;
interrupts = <GIC_SPI 23 IRQ_TYPE_LEVEL_HIGH>;
#address-cells = <1>;
#size-cells = <0>;
clocks = <&clk_gates5 10>, <&clk_gates2 11>;
clock-names = "biu", "ciu";
status = "disabled";
};
dwmmc@10218000 {
compatible = "rockchip,rk2928-dw-mshc";
reg = <0x10218000 0x1000>;
interrupts = <GIC_SPI 24 IRQ_TYPE_LEVEL_HIGH>;
#address-cells = <1>;
#size-cells = <0>;
clocks = <&clk_gates5 11>, <&clk_gates2 13>;
clock-names = "biu", "ciu";
status = "disabled";
};
};
};
...@@ -91,6 +91,10 @@ CONFIG_VIDEO_RCAR_VIN=y ...@@ -91,6 +91,10 @@ CONFIG_VIDEO_RCAR_VIN=y
CONFIG_VIDEO_ML86V7667=y CONFIG_VIDEO_ML86V7667=y
CONFIG_SPI=y CONFIG_SPI=y
CONFIG_SPI_SH_HSPI=y CONFIG_SPI_SH_HSPI=y
CONFIG_SOUND=y
CONFIG_SND=y
CONFIG_SND_SOC=y
CONFIG_SND_SOC_RCAR=y
CONFIG_USB=y CONFIG_USB=y
CONFIG_USB_ANNOUNCE_NEW_DEVICES=y CONFIG_USB_ANNOUNCE_NEW_DEVICES=y
CONFIG_USB_EHCI_HCD=y CONFIG_USB_EHCI_HCD=y
......
CONFIG_SYSVIPC=y
CONFIG_NO_HZ=y
CONFIG_IKCONFIG=y
CONFIG_IKCONFIG_PROC=y
CONFIG_LOG_BUF_SHIFT=16
CONFIG_CC_OPTIMIZE_FOR_SIZE=y
CONFIG_SYSCTL_SYSCALL=y
CONFIG_EMBEDDED=y
CONFIG_PERF_EVENTS=y
CONFIG_SLAB=y
# CONFIG_BLOCK is not set
CONFIG_ARCH_SHMOBILE=y
CONFIG_ARCH_R8A7791=y
CONFIG_MACH_KOELSCH=y
# CONFIG_SWP_EMULATE is not set
CONFIG_CPU_BPREDICT_DISABLE=y
CONFIG_PL310_ERRATA_588369=y
CONFIG_ARM_ERRATA_754322=y
CONFIG_SMP=y
CONFIG_SCHED_MC=y
CONFIG_NR_CPUS=8
CONFIG_AEABI=y
CONFIG_ZBOOT_ROM_TEXT=0x0
CONFIG_ZBOOT_ROM_BSS=0x0
CONFIG_ARM_APPENDED_DTB=y
CONFIG_KEXEC=y
CONFIG_AUTO_ZRELADDR=y
CONFIG_VFP=y
CONFIG_NEON=y
# CONFIG_CORE_DUMP_DEFAULT_ELF_HEADERS is not set
CONFIG_PM_RUNTIME=y
CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug"
# CONFIG_INPUT_MOUSEDEV_PSAUX is not set
# CONFIG_INPUT_MOUSE is not set
# CONFIG_LEGACY_PTYS is not set
CONFIG_SERIAL_SH_SCI=y
CONFIG_SERIAL_SH_SCI_NR_UARTS=20
CONFIG_SERIAL_SH_SCI_CONSOLE=y
# CONFIG_HWMON is not set
CONFIG_THERMAL=y
CONFIG_RCAR_THERMAL=y
# CONFIG_HID is not set
# CONFIG_USB_SUPPORT is not set
CONFIG_NEW_LEDS=y
CONFIG_LEDS_CLASS=y
# CONFIG_IOMMU_SUPPORT is not set
# CONFIG_DNOTIFY is not set
# CONFIG_INOTIFY_USER is not set
CONFIG_TMPFS=y
CONFIG_CONFIGFS_FS=y
# CONFIG_MISC_FILESYSTEMS is not set
# CONFIG_ENABLE_WARN_DEPRECATED is not set
# CONFIG_ENABLE_MUST_CHECK is not set
# CONFIG_ARM_UNWIND is not set
...@@ -89,6 +89,8 @@ CONFIG_THERMAL=y ...@@ -89,6 +89,8 @@ CONFIG_THERMAL=y
CONFIG_RCAR_THERMAL=y CONFIG_RCAR_THERMAL=y
CONFIG_REGULATOR=y CONFIG_REGULATOR=y
CONFIG_REGULATOR_FIXED_VOLTAGE=y CONFIG_REGULATOR_FIXED_VOLTAGE=y
CONFIG_DRM=y
CONFIG_DRM_RCAR_DU=y
# CONFIG_USB_SUPPORT is not set # CONFIG_USB_SUPPORT is not set
CONFIG_MMC=y CONFIG_MMC=y
CONFIG_MMC_SDHI=y CONFIG_MMC_SDHI=y
......
...@@ -92,6 +92,8 @@ CONFIG_SOC_CAMERA=y ...@@ -92,6 +92,8 @@ CONFIG_SOC_CAMERA=y
CONFIG_VIDEO_RCAR_VIN=y CONFIG_VIDEO_RCAR_VIN=y
# CONFIG_MEDIA_SUBDRV_AUTOSELECT is not set # CONFIG_MEDIA_SUBDRV_AUTOSELECT is not set
CONFIG_VIDEO_ADV7180=y CONFIG_VIDEO_ADV7180=y
CONFIG_DRM=y
CONFIG_DRM_RCAR_DU=y
CONFIG_USB=y CONFIG_USB=y
CONFIG_USB_RCAR_PHY=y CONFIG_USB_RCAR_PHY=y
CONFIG_MMC=y CONFIG_MMC=y
......
...@@ -27,6 +27,7 @@ CONFIG_ARCH_TEGRA=y ...@@ -27,6 +27,7 @@ CONFIG_ARCH_TEGRA=y
CONFIG_ARCH_TEGRA_2x_SOC=y CONFIG_ARCH_TEGRA_2x_SOC=y
CONFIG_ARCH_TEGRA_3x_SOC=y CONFIG_ARCH_TEGRA_3x_SOC=y
CONFIG_ARCH_TEGRA_114_SOC=y CONFIG_ARCH_TEGRA_114_SOC=y
CONFIG_ARCH_TEGRA_124_SOC=y
CONFIG_TEGRA_EMC_SCALING_ENABLE=y CONFIG_TEGRA_EMC_SCALING_ENABLE=y
CONFIG_PCI=y CONFIG_PCI=y
CONFIG_PCI_MSI=y CONFIG_PCI_MSI=y
...@@ -41,9 +42,11 @@ CONFIG_ZBOOT_ROM_TEXT=0x0 ...@@ -41,9 +42,11 @@ CONFIG_ZBOOT_ROM_TEXT=0x0
CONFIG_ZBOOT_ROM_BSS=0x0 CONFIG_ZBOOT_ROM_BSS=0x0
CONFIG_KEXEC=y CONFIG_KEXEC=y
CONFIG_CPU_FREQ=y CONFIG_CPU_FREQ=y
CONFIG_CPU_FREQ_STAT_DETAILS=y
CONFIG_CPU_FREQ_DEFAULT_GOV_ONDEMAND=y CONFIG_CPU_FREQ_DEFAULT_GOV_ONDEMAND=y
CONFIG_CPU_IDLE=y CONFIG_CPU_IDLE=y
CONFIG_VFP=y CONFIG_VFP=y
CONFIG_NEON=y
CONFIG_PM_RUNTIME=y CONFIG_PM_RUNTIME=y
CONFIG_NET=y CONFIG_NET=y
CONFIG_PACKET=y CONFIG_PACKET=y
...@@ -129,6 +132,7 @@ CONFIG_SPI=y ...@@ -129,6 +132,7 @@ CONFIG_SPI=y
CONFIG_SPI_TEGRA114=y CONFIG_SPI_TEGRA114=y
CONFIG_SPI_TEGRA20_SFLASH=y CONFIG_SPI_TEGRA20_SFLASH=y
CONFIG_SPI_TEGRA20_SLINK=y CONFIG_SPI_TEGRA20_SLINK=y
CONFIG_PINCTRL_PALMAS=y
CONFIG_GPIO_PCA953X_IRQ=y CONFIG_GPIO_PCA953X_IRQ=y
CONFIG_GPIO_PALMAS=y CONFIG_GPIO_PALMAS=y
CONFIG_GPIO_TPS6586X=y CONFIG_GPIO_TPS6586X=y
...@@ -223,6 +227,7 @@ CONFIG_KEYBOARD_NVEC=y ...@@ -223,6 +227,7 @@ CONFIG_KEYBOARD_NVEC=y
CONFIG_SERIO_NVEC_PS2=y CONFIG_SERIO_NVEC_PS2=y
CONFIG_NVEC_POWER=y CONFIG_NVEC_POWER=y
CONFIG_NVEC_PAZ00=y CONFIG_NVEC_PAZ00=y
CONFIG_COMMON_CLK_DEBUG=y
CONFIG_TEGRA_IOMMU_GART=y CONFIG_TEGRA_IOMMU_GART=y
CONFIG_TEGRA_IOMMU_SMMU=y CONFIG_TEGRA_IOMMU_SMMU=y
CONFIG_MEMORY=y CONFIG_MEMORY=y
......
...@@ -8,7 +8,7 @@ ccflags-$(CONFIG_ARCH_MULTIPLATFORM) := -I$(srctree)/$(src)/include \ ...@@ -8,7 +8,7 @@ ccflags-$(CONFIG_ARCH_MULTIPLATFORM) := -I$(srctree)/$(src)/include \
# Common support # Common support
obj-y := id.o io.o control.o mux.o devices.o fb.o serial.o gpmc.o timer.o pm.o \ obj-y := id.o io.o control.o mux.o devices.o fb.o serial.o gpmc.o timer.o pm.o \
common.o gpio.o dma.o wd_timer.o display.o i2c.o hdq1w.o omap_hwmod.o \ common.o gpio.o dma.o wd_timer.o display.o i2c.o hdq1w.o omap_hwmod.o \
omap_device.o sram.o omap_device.o sram.o drm.o
omap-2-3-common = irq.o omap-2-3-common = irq.o
hwmod-common = omap_hwmod.o omap_hwmod_reset.o \ hwmod-common = omap_hwmod.o omap_hwmod_reset.o \
...@@ -235,10 +235,6 @@ endif ...@@ -235,10 +235,6 @@ endif
# OMAP2420 MSDI controller integration support ("MMC") # OMAP2420 MSDI controller integration support ("MMC")
obj-$(CONFIG_SOC_OMAP2420) += msdi.o obj-$(CONFIG_SOC_OMAP2420) += msdi.o
ifneq ($(CONFIG_DRM_OMAP),)
obj-y += drm.o
endif
# Specific board support # Specific board support
obj-$(CONFIG_MACH_OMAP_GENERIC) += board-generic.o obj-$(CONFIG_MACH_OMAP_GENERIC) += board-generic.o
obj-$(CONFIG_MACH_OMAP_H4) += board-h4.o obj-$(CONFIG_MACH_OMAP_H4) += board-h4.o
......
...@@ -57,6 +57,8 @@ ...@@ -57,6 +57,8 @@
#include "common-board-devices.h" #include "common-board-devices.h"
#include "gpmc.h" #include "gpmc.h"
#include "gpmc-onenand.h" #include "gpmc-onenand.h"
#include "soc.h"
#include "omap-secure.h"
#define SYSTEM_REV_B_USES_VAUX3 0x1699 #define SYSTEM_REV_B_USES_VAUX3 0x1699
#define SYSTEM_REV_S_USES_VAUX3 0x8 #define SYSTEM_REV_S_USES_VAUX3 0x8
...@@ -1298,6 +1300,22 @@ static void __init rx51_init_twl4030_hwmon(void) ...@@ -1298,6 +1300,22 @@ static void __init rx51_init_twl4030_hwmon(void)
platform_device_register(&madc_hwmon); platform_device_register(&madc_hwmon);
} }
static struct platform_device omap3_rom_rng_device = {
.name = "omap3-rom-rng",
.id = -1,
.dev = {
.platform_data = rx51_secure_rng_call,
},
};
static void __init rx51_init_omap3_rom_rng(void)
{
if (omap_type() == OMAP2_DEVICE_TYPE_SEC) {
pr_info("RX-51: Registring OMAP3 HWRNG device\n");
platform_device_register(&omap3_rom_rng_device);
}
}
void __init rx51_peripherals_init(void) void __init rx51_peripherals_init(void)
{ {
rx51_i2c_init(); rx51_i2c_init();
...@@ -1318,5 +1336,6 @@ void __init rx51_peripherals_init(void) ...@@ -1318,5 +1336,6 @@ void __init rx51_peripherals_init(void)
rx51_charger_init(); rx51_charger_init();
rx51_init_twl4030_hwmon(); rx51_init_twl4030_hwmon();
rx51_init_omap3_rom_rng();
} }
...@@ -2,6 +2,8 @@ ...@@ -2,6 +2,8 @@
* Board support file for Nokia N900 (aka RX-51). * Board support file for Nokia N900 (aka RX-51).
* *
* Copyright (C) 2007, 2008 Nokia * Copyright (C) 2007, 2008 Nokia
* Copyright (C) 2012 Ivaylo Dimitrov <freemangordon@abv.bg>
* Copyright (C) 2013 Pali Rohár <pali.rohar@gmail.com>
* *
* This program is free software; you can redistribute it and/or modify * This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 as * it under the terms of the GNU General Public License version 2 as
...@@ -31,7 +33,9 @@ ...@@ -31,7 +33,9 @@
#include "mux.h" #include "mux.h"
#include "gpmc.h" #include "gpmc.h"
#include "pm.h" #include "pm.h"
#include "soc.h"
#include "sdram-nokia.h" #include "sdram-nokia.h"
#include "omap-secure.h"
#define RX51_GPIO_SLEEP_IND 162 #define RX51_GPIO_SLEEP_IND 162
...@@ -103,6 +107,14 @@ static void __init rx51_init(void) ...@@ -103,6 +107,14 @@ static void __init rx51_init(void)
usb_musb_init(&musb_board_data); usb_musb_init(&musb_board_data);
rx51_peripherals_init(); rx51_peripherals_init();
if (omap_type() == OMAP2_DEVICE_TYPE_SEC) {
#ifdef CONFIG_ARM_ERRATA_430973
pr_info("RX-51: Enabling ARM errata 430973 workaround\n");
/* set IBE to 1 */
rx51_secure_update_aux_cr(BIT(6), 0);
#endif
}
/* Ensure SDRC pins are mux'd for self-refresh */ /* Ensure SDRC pins are mux'd for self-refresh */
omap_mux_init_signal("sdrc_cke0", OMAP_PIN_OUTPUT); omap_mux_init_signal("sdrc_cke0", OMAP_PIN_OUTPUT);
omap_mux_init_signal("sdrc_cke1", OMAP_PIN_OUTPUT); omap_mux_init_signal("sdrc_cke1", OMAP_PIN_OUTPUT);
......
...@@ -3275,6 +3275,7 @@ static struct omap_clk omap36xx_clks[] = { ...@@ -3275,6 +3275,7 @@ static struct omap_clk omap36xx_clks[] = {
static struct omap_clk omap34xx_omap36xx_clks[] = { static struct omap_clk omap34xx_omap36xx_clks[] = {
CLK(NULL, "aes1_ick", &aes1_ick), CLK(NULL, "aes1_ick", &aes1_ick),
CLK("omap_rng", "ick", &rng_ick), CLK("omap_rng", "ick", &rng_ick),
CLK("omap3-rom-rng", "ick", &rng_ick),
CLK(NULL, "sha11_ick", &sha11_ick), CLK(NULL, "sha11_ick", &sha11_ick),
CLK(NULL, "des1_ick", &des1_ick), CLK(NULL, "des1_ick", &des1_ick),
CLK(NULL, "cam_mclk", &cam_mclk), CLK(NULL, "cam_mclk", &cam_mclk),
......
...@@ -37,6 +37,7 @@ ...@@ -37,6 +37,7 @@
#include "mux.h" #include "mux.h"
#include "control.h" #include "control.h"
#include "devices.h" #include "devices.h"
#include "display.h"
#define L3_MODULES_MAX_LEN 12 #define L3_MODULES_MAX_LEN 12
#define L3_MODULES 3 #define L3_MODULES 3
...@@ -466,13 +467,13 @@ static struct platform_device omap_vout_device = { ...@@ -466,13 +467,13 @@ static struct platform_device omap_vout_device = {
.resource = &omap_vout_resource[0], .resource = &omap_vout_resource[0],
.id = -1, .id = -1,
}; };
static void omap_init_vout(void)
int __init omap_init_vout(void)
{ {
if (platform_device_register(&omap_vout_device) < 0) return platform_device_register(&omap_vout_device);
printk(KERN_ERR "Unable to register OMAP-VOUT device\n");
} }
#else #else
static inline void omap_init_vout(void) {} int __init omap_init_vout(void) { return 0; }
#endif #endif
#if IS_ENABLED(CONFIG_WL12XX) #if IS_ENABLED(CONFIG_WL12XX)
...@@ -536,7 +537,6 @@ static int __init omap2_init_devices(void) ...@@ -536,7 +537,6 @@ static int __init omap2_init_devices(void)
omap_init_wl12xx_of(); omap_init_wl12xx_of();
} }
omap_init_sti(); omap_init_sti();
omap_init_vout();
return 0; return 0;
} }
......
...@@ -416,6 +416,34 @@ int __init omap_display_init(struct omap_dss_board_info *board_data) ...@@ -416,6 +416,34 @@ int __init omap_display_init(struct omap_dss_board_info *board_data)
} }
} }
/* create DRM device */
r = omap_init_drm();
if (r < 0) {
pr_err("Unable to register omapdrm device\n");
return r;
}
/* create vrfb device */
r = omap_init_vrfb();
if (r < 0) {
pr_err("Unable to register omapvrfb device\n");
return r;
}
/* create FB device */
r = omap_init_fb();
if (r < 0) {
pr_err("Unable to register omapfb device\n");
return r;
}
/* create V4L2 display device */
r = omap_init_vout();
if (r < 0) {
pr_err("Unable to register omap_vout device\n");
return r;
}
return 0; return 0;
} }
......
...@@ -26,4 +26,8 @@ struct omap_dss_dispc_dev_attr { ...@@ -26,4 +26,8 @@ struct omap_dss_dispc_dev_attr {
bool has_framedonetv_irq; bool has_framedonetv_irq;
}; };
int omap_init_drm(void);
int omap_init_vrfb(void);
int omap_init_fb(void);
int omap_init_vout(void);
#endif #endif
...@@ -26,10 +26,9 @@ ...@@ -26,10 +26,9 @@
#include <linux/platform_data/omap_drm.h> #include <linux/platform_data/omap_drm.h>
#include "soc.h" #include "soc.h"
#include "omap_device.h" #include "display.h"
#include "omap_hwmod.h"
#if defined(CONFIG_DRM_OMAP) || (CONFIG_DRM_OMAP_MODULE) #if defined(CONFIG_DRM_OMAP) || defined(CONFIG_DRM_OMAP_MODULE)
static struct omap_drm_platform_data platform_data; static struct omap_drm_platform_data platform_data;
...@@ -42,26 +41,13 @@ static struct platform_device omap_drm_device = { ...@@ -42,26 +41,13 @@ static struct platform_device omap_drm_device = {
.id = 0, .id = 0,
}; };
static int __init omap_init_drm(void) int __init omap_init_drm(void)
{ {
struct omap_hwmod *oh = NULL;
struct platform_device *pdev;
/* lookup and populate the DMM information, if present - OMAP4+ */
oh = omap_hwmod_lookup("dmm");
if (oh) {
pdev = omap_device_build(oh->name, -1, oh, NULL, 0);
WARN(IS_ERR(pdev), "Could not build omap_device for %s\n",
oh->name);
}
platform_data.omaprev = GET_OMAP_TYPE; platform_data.omaprev = GET_OMAP_TYPE;
return platform_device_register(&omap_drm_device); return platform_device_register(&omap_drm_device);
} }
#else
omap_arch_initcall(omap_init_drm); int __init omap_init_drm(void) { return 0; }
#endif #endif
...@@ -32,6 +32,7 @@ ...@@ -32,6 +32,7 @@
#include <asm/mach/map.h> #include <asm/mach/map.h>
#include "soc.h" #include "soc.h"
#include "display.h"
#ifdef CONFIG_OMAP2_VRFB #ifdef CONFIG_OMAP2_VRFB
...@@ -64,7 +65,7 @@ static const struct resource omap3_vrfb_resources[] = { ...@@ -64,7 +65,7 @@ static const struct resource omap3_vrfb_resources[] = {
DEFINE_RES_MEM_NAMED(0xfc000000u, 0x4000000, "vrfb-area-11"), DEFINE_RES_MEM_NAMED(0xfc000000u, 0x4000000, "vrfb-area-11"),
}; };
static int __init omap_init_vrfb(void) int __init omap_init_vrfb(void)
{ {
struct platform_device *pdev; struct platform_device *pdev;
const struct resource *res; const struct resource *res;
...@@ -85,8 +86,8 @@ static int __init omap_init_vrfb(void) ...@@ -85,8 +86,8 @@ static int __init omap_init_vrfb(void)
return PTR_RET(pdev); return PTR_RET(pdev);
} }
#else
omap_arch_initcall(omap_init_vrfb); int __init omap_init_vrfb(void) { return 0; }
#endif #endif
#if defined(CONFIG_FB_OMAP2) || defined(CONFIG_FB_OMAP2_MODULE) #if defined(CONFIG_FB_OMAP2) || defined(CONFIG_FB_OMAP2_MODULE)
...@@ -105,11 +106,10 @@ static struct platform_device omap_fb_device = { ...@@ -105,11 +106,10 @@ static struct platform_device omap_fb_device = {
.num_resources = 0, .num_resources = 0,
}; };
static int __init omap_init_fb(void) int __init omap_init_fb(void)
{ {
return platform_device_register(&omap_fb_device); return platform_device_register(&omap_fb_device);
} }
#else
omap_arch_initcall(omap_init_fb); int __init omap_init_fb(void) { return 0; }
#endif #endif
...@@ -3,6 +3,8 @@ ...@@ -3,6 +3,8 @@
* *
* Copyright (C) 2011 Texas Instruments, Inc. * Copyright (C) 2011 Texas Instruments, Inc.
* Santosh Shilimkar <santosh.shilimkar@ti.com> * Santosh Shilimkar <santosh.shilimkar@ti.com>
* Copyright (C) 2012 Ivaylo Dimitrov <freemangordon@abv.bg>
* Copyright (C) 2013 Pali Rohár <pali.rohar@gmail.com>
* *
* *
* This program is free software,you can redistribute it and/or modify * This program is free software,you can redistribute it and/or modify
...@@ -70,3 +72,77 @@ phys_addr_t omap_secure_ram_mempool_base(void) ...@@ -70,3 +72,77 @@ phys_addr_t omap_secure_ram_mempool_base(void)
{ {
return omap_secure_memblock_base; return omap_secure_memblock_base;
} }
/**
* rx51_secure_dispatcher: Routine to dispatch secure PPA API calls
* @idx: The PPA API index
* @process: Process ID
* @flag: The flag indicating criticality of operation
* @nargs: Number of valid arguments out of four.
* @arg1, arg2, arg3 args4: Parameters passed to secure API
*
* Return the non-zero error value on failure.
*
* NOTE: rx51_secure_dispatcher differs from omap_secure_dispatcher because
* it calling omap_smc3() instead omap_smc2() and param[0] is nargs+1
*/
u32 rx51_secure_dispatcher(u32 idx, u32 process, u32 flag, u32 nargs,
u32 arg1, u32 arg2, u32 arg3, u32 arg4)
{
u32 ret;
u32 param[5];
param[0] = nargs+1; /* RX-51 needs number of arguments + 1 */
param[1] = arg1;
param[2] = arg2;
param[3] = arg3;
param[4] = arg4;
/*
* Secure API needs physical address
* pointer for the parameters
*/
local_irq_disable();
local_fiq_disable();
flush_cache_all();
outer_clean_range(__pa(param), __pa(param + 5));
ret = omap_smc3(idx, process, flag, __pa(param));
flush_cache_all();
local_fiq_enable();
local_irq_enable();
return ret;
}
/**
* rx51_secure_update_aux_cr: Routine to modify the contents of Auxiliary Control Register
* @set_bits: bits to set in ACR
* @clr_bits: bits to clear in ACR
*
* Return the non-zero error value on failure.
*/
u32 rx51_secure_update_aux_cr(u32 set_bits, u32 clear_bits)
{
u32 acr;
/* Read ACR */
asm volatile ("mrc p15, 0, %0, c1, c0, 1" : "=r" (acr));
acr &= ~clear_bits;
acr |= set_bits;
return rx51_secure_dispatcher(RX51_PPA_WRITE_ACR,
0,
FLAG_START_CRITICAL,
1, acr, 0, 0, 0);
}
/**
* rx51_secure_rng_call: Routine for HW random generator
*/
u32 rx51_secure_rng_call(u32 ptr, u32 count, u32 flag)
{
return rx51_secure_dispatcher(RX51_PPA_HWRNG,
0,
NO_FLAG,
3, ptr, count, flag, 0);
}
...@@ -3,6 +3,8 @@ ...@@ -3,6 +3,8 @@
* *
* Copyright (C) 2011 Texas Instruments, Inc. * Copyright (C) 2011 Texas Instruments, Inc.
* Santosh Shilimkar <santosh.shilimkar@ti.com> * Santosh Shilimkar <santosh.shilimkar@ti.com>
* Copyright (C) 2012 Ivaylo Dimitrov <freemangordon@abv.bg>
* Copyright (C) 2013 Pali Rohár <pali.rohar@gmail.com>
* *
* This program is free software; you can redistribute it and/or modify * This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 as * it under the terms of the GNU General Public License version 2 as
...@@ -48,14 +50,25 @@ ...@@ -48,14 +50,25 @@
#define OMAP4_PPA_L2_POR_INDEX 0x23 #define OMAP4_PPA_L2_POR_INDEX 0x23
#define OMAP4_PPA_CPU_ACTRL_SMP_INDEX 0x25 #define OMAP4_PPA_CPU_ACTRL_SMP_INDEX 0x25
/* Secure RX-51 PPA (Primary Protected Application) APIs */
#define RX51_PPA_HWRNG 29
#define RX51_PPA_L2_INVAL 40
#define RX51_PPA_WRITE_ACR 42
#ifndef __ASSEMBLER__ #ifndef __ASSEMBLER__
extern u32 omap_secure_dispatcher(u32 idx, u32 flag, u32 nargs, extern u32 omap_secure_dispatcher(u32 idx, u32 flag, u32 nargs,
u32 arg1, u32 arg2, u32 arg3, u32 arg4); u32 arg1, u32 arg2, u32 arg3, u32 arg4);
extern u32 omap_smc2(u32 id, u32 falg, u32 pargs); extern u32 omap_smc2(u32 id, u32 falg, u32 pargs);
extern u32 omap_smc3(u32 id, u32 process, u32 flag, u32 pargs);
extern phys_addr_t omap_secure_ram_mempool_base(void); extern phys_addr_t omap_secure_ram_mempool_base(void);
extern int omap_secure_ram_reserve_memblock(void); extern int omap_secure_ram_reserve_memblock(void);
extern u32 rx51_secure_dispatcher(u32 idx, u32 process, u32 flag, u32 nargs,
u32 arg1, u32 arg2, u32 arg3, u32 arg4);
extern u32 rx51_secure_update_aux_cr(u32 set_bits, u32 clear_bits);
extern u32 rx51_secure_rng_call(u32 ptr, u32 count, u32 flag);
#ifdef CONFIG_OMAP4_ERRATA_I688 #ifdef CONFIG_OMAP4_ERRATA_I688
extern int omap_barrier_reserve_memblock(void); extern int omap_barrier_reserve_memblock(void);
#else #else
......
/* /*
* OMAP44xx secure APIs file. * OMAP34xx and OMAP44xx secure APIs file.
* *
* Copyright (C) 2010 Texas Instruments, Inc. * Copyright (C) 2010 Texas Instruments, Inc.
* Written by Santosh Shilimkar <santosh.shilimkar@ti.com> * Written by Santosh Shilimkar <santosh.shilimkar@ti.com>
* *
* Copyright (C) 2012 Ivaylo Dimitrov <freemangordon@abv.bg>
* Copyright (C) 2013 Pali Rohár <pali.rohar@gmail.com>
* *
* This program is free software,you can redistribute it and/or modify * This program is free software,you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 as * it under the terms of the GNU General Public License version 2 as
...@@ -54,6 +56,23 @@ ENTRY(omap_smc2) ...@@ -54,6 +56,23 @@ ENTRY(omap_smc2)
ldmfd sp!, {r4-r12, pc} ldmfd sp!, {r4-r12, pc}
ENDPROC(omap_smc2) ENDPROC(omap_smc2)
/**
* u32 omap_smc3(u32 service_id, u32 process_id, u32 flag, u32 pargs)
* Low level common routine for secure HAL and PPA APIs via smc #1
* r0 - @service_id: Secure Service ID
* r1 - @process_id: Process ID
* r2 - @flag: Flag to indicate the criticality of operation
* r3 - @pargs: Physical address of parameter list
*/
ENTRY(omap_smc3)
stmfd sp!, {r4-r11, lr}
mov r12, r0 @ Copy the secure service ID
mov r6, #0xff @ Indicate new Task call
dsb @ Memory Barrier (not sure if needed, copied from omap_smc2)
smc #1 @ Call PPA service
ldmfd sp!, {r4-r11, pc}
ENDPROC(omap_smc3)
ENTRY(omap_modify_auxcoreboot0) ENTRY(omap_modify_auxcoreboot0)
stmfd sp!, {r1-r12, lr} stmfd sp!, {r1-r12, lr}
ldr r12, =0x104 ldr r12, =0x104
......
...@@ -10,6 +10,8 @@ config ARCH_ROCKCHIP ...@@ -10,6 +10,8 @@ config ARCH_ROCKCHIP
select COMMON_CLK select COMMON_CLK
select GENERIC_CLOCKEVENTS select GENERIC_CLOCKEVENTS
select DW_APB_TIMER_OF select DW_APB_TIMER_OF
select ARM_GLOBAL_TIMER
select CLKSRC_ARM_GLOBAL_TIMER_SCHED_CLOCK
help help
Support for Rockchip's Cortex-A9 Single-to-Quad-Core-SoCs Support for Rockchip's Cortex-A9 Single-to-Quad-Core-SoCs
containing the RK2928, RK30xx and RK31xx series. containing the RK2928, RK30xx and RK31xx series.
...@@ -22,16 +22,10 @@ config ARCH_EMEV2 ...@@ -22,16 +22,10 @@ config ARCH_EMEV2
comment "SH-Mobile Board Type" comment "SH-Mobile Board Type"
config MACH_KZM9D_REFERENCE config MACH_KZM9D
bool "KZM9D board - Reference Device Tree Implementation" bool "KZM9D board"
depends on ARCH_EMEV2 depends on ARCH_EMEV2
select REGULATOR_FIXED_VOLTAGE if REGULATOR select REGULATOR_FIXED_VOLTAGE if REGULATOR
---help---
Use reference implementation of KZM9D board support
which makes a greater use of device tree at the expense
of not supporting a number of devices.
This is intended to aid developers
comment "SH-Mobile System Configuration" comment "SH-Mobile System Configuration"
endif endif
...@@ -174,6 +168,8 @@ config MACH_BOCKW ...@@ -174,6 +168,8 @@ config MACH_BOCKW
select RENESAS_INTC_IRQPIN select RENESAS_INTC_IRQPIN
select REGULATOR_FIXED_VOLTAGE if REGULATOR select REGULATOR_FIXED_VOLTAGE if REGULATOR
select USE_OF select USE_OF
select SND_SOC_AK4554 if SND_SIMPLE_CARD
select SND_SOC_AK4642 if SND_SIMPLE_CARD
config MACH_BOCKW_REFERENCE config MACH_BOCKW_REFERENCE
bool "BOCK-W - Reference Device Tree Implementation" bool "BOCK-W - Reference Device Tree Implementation"
...@@ -189,6 +185,11 @@ config MACH_BOCKW_REFERENCE ...@@ -189,6 +185,11 @@ config MACH_BOCKW_REFERENCE
This is intended to aid developers This is intended to aid developers
config MACH_GENMAI
bool "Genmai board"
depends on ARCH_R7S72100
select USE_OF
config MACH_MARZEN config MACH_MARZEN
bool "MARZEN board" bool "MARZEN board"
depends on ARCH_R8A7779 depends on ARCH_R8A7779
...@@ -225,23 +226,16 @@ config MACH_LAGER_REFERENCE ...@@ -225,23 +226,16 @@ config MACH_LAGER_REFERENCE
This is intended to aid developers This is intended to aid developers
config MACH_KZM9D config MACH_KOELSCH
bool "KZM9D board" bool "Koelsch board"
depends on ARCH_EMEV2 depends on ARCH_R8A7791
select REGULATOR_FIXED_VOLTAGE if REGULATOR
select USE_OF select USE_OF
config MACH_KZM9D_REFERENCE config MACH_KZM9D
bool "KZM9D board - Reference Device Tree Implementation" bool "KZM9D board"
depends on ARCH_EMEV2 depends on ARCH_EMEV2
select REGULATOR_FIXED_VOLTAGE if REGULATOR select REGULATOR_FIXED_VOLTAGE if REGULATOR
select USE_OF select USE_OF
---help---
Use reference implementation of KZM9D board support
which makes a greater use of device tree at the expense
of not supporting a number of devices.
This is intended to aid developers
config MACH_KZM9G config MACH_KZM9G
bool "KZM-A9-GT board" bool "KZM-A9-GT board"
......
...@@ -55,21 +55,26 @@ obj-$(CONFIG_ARCH_R8A7740) += pm-r8a7740.o pm-rmobile.o ...@@ -55,21 +55,26 @@ obj-$(CONFIG_ARCH_R8A7740) += pm-r8a7740.o pm-rmobile.o
obj-$(CONFIG_ARCH_R8A7779) += pm-r8a7779.o obj-$(CONFIG_ARCH_R8A7779) += pm-r8a7779.o
# Board objects # Board objects
ifdef CONFIG_ARCH_SHMOBILE_MULTI
obj-$(CONFIG_MACH_KZM9D) += board-kzm9d-reference.o
else
obj-$(CONFIG_MACH_APE6EVM) += board-ape6evm.o obj-$(CONFIG_MACH_APE6EVM) += board-ape6evm.o
obj-$(CONFIG_MACH_APE6EVM_REFERENCE) += board-ape6evm-reference.o obj-$(CONFIG_MACH_APE6EVM_REFERENCE) += board-ape6evm-reference.o
obj-$(CONFIG_MACH_MACKEREL) += board-mackerel.o obj-$(CONFIG_MACH_MACKEREL) += board-mackerel.o
obj-$(CONFIG_MACH_BOCKW) += board-bockw.o obj-$(CONFIG_MACH_BOCKW) += board-bockw.o
obj-$(CONFIG_MACH_BOCKW_REFERENCE) += board-bockw-reference.o obj-$(CONFIG_MACH_BOCKW_REFERENCE) += board-bockw-reference.o
obj-$(CONFIG_MACH_GENMAI) += board-genmai.o
obj-$(CONFIG_MACH_MARZEN) += board-marzen.o obj-$(CONFIG_MACH_MARZEN) += board-marzen.o
obj-$(CONFIG_MACH_MARZEN_REFERENCE) += board-marzen-reference.o obj-$(CONFIG_MACH_MARZEN_REFERENCE) += board-marzen-reference.o
obj-$(CONFIG_MACH_LAGER) += board-lager.o obj-$(CONFIG_MACH_LAGER) += board-lager.o
obj-$(CONFIG_MACH_LAGER_REFERENCE) += board-lager-reference.o obj-$(CONFIG_MACH_LAGER_REFERENCE) += board-lager-reference.o
obj-$(CONFIG_MACH_ARMADILLO800EVA) += board-armadillo800eva.o obj-$(CONFIG_MACH_ARMADILLO800EVA) += board-armadillo800eva.o
obj-$(CONFIG_MACH_ARMADILLO800EVA_REFERENCE) += board-armadillo800eva-reference.o obj-$(CONFIG_MACH_ARMADILLO800EVA_REFERENCE) += board-armadillo800eva-reference.o
obj-$(CONFIG_MACH_KOELSCH) += board-koelsch.o
obj-$(CONFIG_MACH_KZM9D) += board-kzm9d.o obj-$(CONFIG_MACH_KZM9D) += board-kzm9d.o
obj-$(CONFIG_MACH_KZM9D_REFERENCE) += board-kzm9d-reference.o
obj-$(CONFIG_MACH_KZM9G) += board-kzm9g.o obj-$(CONFIG_MACH_KZM9G) += board-kzm9g.o
obj-$(CONFIG_MACH_KZM9G_REFERENCE) += board-kzm9g-reference.o obj-$(CONFIG_MACH_KZM9G_REFERENCE) += board-kzm9g-reference.o
endif
# Framework support # Framework support
obj-$(CONFIG_SMP) += $(smp-y) obj-$(CONFIG_SMP) += $(smp-y)
...@@ -6,8 +6,9 @@ loadaddr-$(CONFIG_MACH_ARMADILLO800EVA) += 0x40008000 ...@@ -6,8 +6,9 @@ loadaddr-$(CONFIG_MACH_ARMADILLO800EVA) += 0x40008000
loadaddr-$(CONFIG_MACH_ARMADILLO800EVA_REFERENCE) += 0x40008000 loadaddr-$(CONFIG_MACH_ARMADILLO800EVA_REFERENCE) += 0x40008000
loadaddr-$(CONFIG_MACH_BOCKW) += 0x60008000 loadaddr-$(CONFIG_MACH_BOCKW) += 0x60008000
loadaddr-$(CONFIG_MACH_BOCKW_REFERENCE) += 0x60008000 loadaddr-$(CONFIG_MACH_BOCKW_REFERENCE) += 0x60008000
loadaddr-$(CONFIG_MACH_GENMAI) += 0x8008000
loadaddr-$(CONFIG_MACH_KOELSCH) += 0x40008000
loadaddr-$(CONFIG_MACH_KZM9D) += 0x40008000 loadaddr-$(CONFIG_MACH_KZM9D) += 0x40008000
loadaddr-$(CONFIG_MACH_KZM9D_REFERENCE) += 0x40008000
loadaddr-$(CONFIG_MACH_KZM9G) += 0x41008000 loadaddr-$(CONFIG_MACH_KZM9G) += 0x41008000
loadaddr-$(CONFIG_MACH_KZM9G_REFERENCE) += 0x41008000 loadaddr-$(CONFIG_MACH_KZM9G_REFERENCE) += 0x41008000
loadaddr-$(CONFIG_MACH_LAGER) += 0x40008000 loadaddr-$(CONFIG_MACH_LAGER) += 0x40008000
......
...@@ -113,22 +113,58 @@ static const struct smsc911x_platform_config lan9220_data __initconst = { ...@@ -113,22 +113,58 @@ static const struct smsc911x_platform_config lan9220_data __initconst = {
}; };
/* /*
* On APE6EVM power is supplied to MMCIF by a tps80032 regulator. For now we * MMC0 power supplies:
* model a VDD supply to MMCIF, using a fixed 3.3V regulator. Also use the * Both Vcc and VccQ to eMMC on APE6EVM are supplied by a tps80032 voltage
* static power supply for SDHI0 and SDHI1, whereas SDHI0's VccQ is also * regulator. Until support for it is added to this file we simulate the
* supplied by the same tps80032 regulator and thus can also be adjusted * Vcc supply by a fixed always-on regulator
* dynamically.
*/ */
static struct regulator_consumer_supply fixed3v3_power_consumers[] = static struct regulator_consumer_supply vcc_mmc0_consumers[] =
{ {
REGULATOR_SUPPLY("vmmc", "sh_mmcif.0"), REGULATOR_SUPPLY("vmmc", "sh_mmcif.0"),
};
/*
* SDHI0 power supplies:
* Vcc to SDHI0 on APE6EVM is supplied by a GPIO-switchable regulator. VccQ is
* provided by the same tps80032 regulator as both MMC0 voltages - see comment
* above
*/
static struct regulator_consumer_supply vcc_sdhi0_consumers[] =
{
REGULATOR_SUPPLY("vmmc", "sh_mobile_sdhi.0"), REGULATOR_SUPPLY("vmmc", "sh_mobile_sdhi.0"),
};
static struct regulator_init_data vcc_sdhi0_init_data = {
.constraints = {
.valid_ops_mask = REGULATOR_CHANGE_STATUS,
},
.num_consumer_supplies = ARRAY_SIZE(vcc_sdhi0_consumers),
.consumer_supplies = vcc_sdhi0_consumers,
};
static const struct fixed_voltage_config vcc_sdhi0_info __initconst = {
.supply_name = "SDHI0 Vcc",
.microvolts = 3300000,
.gpio = 76,
.enable_high = 1,
.init_data = &vcc_sdhi0_init_data,
};
/*
* SDHI1 power supplies:
* Vcc and VccQ to SDHI1 on APE6EVM are both fixed at 3.3V
*/
static struct regulator_consumer_supply vcc_sdhi1_consumers[] =
{
REGULATOR_SUPPLY("vmmc", "sh_mobile_sdhi.1"), REGULATOR_SUPPLY("vmmc", "sh_mobile_sdhi.1"),
}; };
/* MMCIF */ /* MMCIF */
static const struct sh_mmcif_plat_data mmcif0_pdata __initconst = { static const struct sh_mmcif_plat_data mmcif0_pdata __initconst = {
.caps = MMC_CAP_8_BIT_DATA | MMC_CAP_NONREMOVABLE, .caps = MMC_CAP_8_BIT_DATA | MMC_CAP_NONREMOVABLE,
.slave_id_tx = SHDMA_SLAVE_MMCIF0_TX,
.slave_id_rx = SHDMA_SLAVE_MMCIF0_RX,
.ccs_unsupported = true,
}; };
static const struct resource mmcif0_resources[] __initconst = { static const struct resource mmcif0_resources[] __initconst = {
...@@ -215,14 +251,19 @@ static void __init ape6evm_add_standard_devices(void) ...@@ -215,14 +251,19 @@ static void __init ape6evm_add_standard_devices(void)
platform_device_register_resndata(&platform_bus, "smsc911x", -1, platform_device_register_resndata(&platform_bus, "smsc911x", -1,
lan9220_res, ARRAY_SIZE(lan9220_res), lan9220_res, ARRAY_SIZE(lan9220_res),
&lan9220_data, sizeof(lan9220_data)); &lan9220_data, sizeof(lan9220_data));
regulator_register_always_on(1, "fixed-3.3V", fixed3v3_power_consumers,
ARRAY_SIZE(fixed3v3_power_consumers), 3300000); regulator_register_always_on(1, "MMC0 Vcc", vcc_mmc0_consumers,
ARRAY_SIZE(vcc_mmc0_consumers), 2800000);
platform_device_register_resndata(&platform_bus, "sh_mmcif", 0, platform_device_register_resndata(&platform_bus, "sh_mmcif", 0,
mmcif0_resources, ARRAY_SIZE(mmcif0_resources), mmcif0_resources, ARRAY_SIZE(mmcif0_resources),
&mmcif0_pdata, sizeof(mmcif0_pdata)); &mmcif0_pdata, sizeof(mmcif0_pdata));
platform_device_register_data(&platform_bus, "reg-fixed-voltage", 2,
&vcc_sdhi0_info, sizeof(vcc_sdhi0_info));
platform_device_register_resndata(&platform_bus, "sh_mobile_sdhi", 0, platform_device_register_resndata(&platform_bus, "sh_mobile_sdhi", 0,
sdhi0_resources, ARRAY_SIZE(sdhi0_resources), sdhi0_resources, ARRAY_SIZE(sdhi0_resources),
&sdhi0_pdata, sizeof(sdhi0_pdata)); &sdhi0_pdata, sizeof(sdhi0_pdata));
regulator_register_always_on(3, "SDHI1 Vcc", vcc_sdhi1_consumers,
ARRAY_SIZE(vcc_sdhi1_consumers), 3300000);
platform_device_register_resndata(&platform_bus, "sh_mobile_sdhi", 1, platform_device_register_resndata(&platform_bus, "sh_mobile_sdhi", 1,
sdhi1_resources, ARRAY_SIZE(sdhi1_resources), sdhi1_resources, ARRAY_SIZE(sdhi1_resources),
&sdhi1_pdata, sizeof(sdhi1_pdata)); &sdhi1_pdata, sizeof(sdhi1_pdata));
......
...@@ -823,6 +823,7 @@ static struct sh_mmcif_plat_data sh_mmcif_plat = { ...@@ -823,6 +823,7 @@ static struct sh_mmcif_plat_data sh_mmcif_plat = {
.caps = MMC_CAP_4_BIT_DATA | .caps = MMC_CAP_4_BIT_DATA |
MMC_CAP_8_BIT_DATA | MMC_CAP_8_BIT_DATA |
MMC_CAP_NONREMOVABLE, MMC_CAP_NONREMOVABLE,
.ccs_unsupported = true,
.slave_id_tx = SHDMA_SLAVE_MMCIF_TX, .slave_id_tx = SHDMA_SLAVE_MMCIF_TX,
.slave_id_rx = SHDMA_SLAVE_MMCIF_RX, .slave_id_rx = SHDMA_SLAVE_MMCIF_RX,
}; };
......
...@@ -36,15 +36,35 @@ static const struct pinctrl_map bockw_pinctrl_map[] = { ...@@ -36,15 +36,35 @@ static const struct pinctrl_map bockw_pinctrl_map[] = {
"scif0_ctrl", "scif0"), "scif0_ctrl", "scif0"),
}; };
#define FPGA 0x18200000
#define IRQ0MR 0x30
#define COMCTLR 0x101c
static void __init bockw_init(void) static void __init bockw_init(void)
{ {
static void __iomem *fpga;
r8a7778_clock_init(); r8a7778_clock_init();
r8a7778_init_irq_extpin_dt(1);
pinctrl_register_mappings(bockw_pinctrl_map, pinctrl_register_mappings(bockw_pinctrl_map,
ARRAY_SIZE(bockw_pinctrl_map)); ARRAY_SIZE(bockw_pinctrl_map));
r8a7778_pinmux_init(); r8a7778_pinmux_init();
r8a7778_add_dt_devices(); r8a7778_add_dt_devices();
fpga = ioremap_nocache(FPGA, SZ_1M);
if (fpga) {
/*
* CAUTION
*
* IRQ0/1 is cascaded interrupt from FPGA.
* it should be cared in the future
* Now, it is assuming IRQ0 was used only from SMSC.
*/
u16 val = ioread16(fpga + IRQ0MR);
val &= ~(1 << 4); /* enable SMSC911x */
iowrite16(val, fpga + IRQ0MR);
}
of_platform_populate(NULL, of_default_bus_match_table, NULL, NULL); of_platform_populate(NULL, of_default_bus_match_table, NULL, NULL);
} }
......
This diff is collapsed.
/*
* Genmai board support
*
* Copyright (C) 2013 Renesas Solutions Corp.
* Copyright (C) 2013 Magnus Damm
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; version 2 of the License.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
*/
#include <linux/kernel.h>
#include <linux/platform_device.h>
#include <mach/common.h>
#include <mach/r7s72100.h>
#include <asm/mach-types.h>
#include <asm/mach/arch.h>
static void __init genmai_add_standard_devices(void)
{
r7s72100_clock_init();
r7s72100_add_dt_devices();
}
static const char * const genmai_boards_compat_dt[] __initconst = {
"renesas,genmai",
NULL,
};
DT_MACHINE_START(GENMAI_DT, "genmai")
.init_early = r7s72100_init_early,
.init_machine = genmai_add_standard_devices,
.dt_compat = genmai_boards_compat_dt,
MACHINE_END
/*
* Koelsch board support
*
* Copyright (C) 2013 Renesas Electronics Corporation
* Copyright (C) 2013 Renesas Solutions Corp.
* Copyright (C) 2013 Magnus Damm
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; version 2 of the License.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
*/
#include <linux/kernel.h>
#include <linux/platform_device.h>
#include <mach/common.h>
#include <mach/r8a7791.h>
#include <mach/rcar-gen2.h>
#include <asm/mach-types.h>
#include <asm/mach/arch.h>
static void __init koelsch_add_standard_devices(void)
{
r8a7791_clock_init();
r8a7791_add_standard_devices();
}
static const char * const koelsch_boards_compat_dt[] __initconst = {
"renesas,koelsch",
NULL,
};
DT_MACHINE_START(KOELSCH_DT, "koelsch")
.smp = smp_ops(r8a7791_smp_ops),
.init_early = r8a7791_init_early,
.init_machine = koelsch_add_standard_devices,
.init_time = rcar_gen2_timer_init,
.dt_compat = koelsch_boards_compat_dt,
MACHINE_END
...@@ -33,6 +33,7 @@ static void __init kzm9d_add_standard_devices(void) ...@@ -33,6 +33,7 @@ static void __init kzm9d_add_standard_devices(void)
} }
static const char *kzm9d_boards_compat_dt[] __initdata = { static const char *kzm9d_boards_compat_dt[] __initdata = {
"renesas,kzm9d",
"renesas,kzm9d-reference", "renesas,kzm9d-reference",
NULL, NULL,
}; };
......
...@@ -366,6 +366,7 @@ static struct resource sh_mmcif_resources[] = { ...@@ -366,6 +366,7 @@ static struct resource sh_mmcif_resources[] = {
static struct sh_mmcif_plat_data sh_mmcif_platdata = { static struct sh_mmcif_plat_data sh_mmcif_platdata = {
.ocr = MMC_VDD_165_195, .ocr = MMC_VDD_165_195,
.caps = MMC_CAP_8_BIT_DATA | MMC_CAP_NONREMOVABLE, .caps = MMC_CAP_8_BIT_DATA | MMC_CAP_NONREMOVABLE,
.ccs_unsupported = true,
.slave_id_tx = SHDMA_SLAVE_MMCIF_TX, .slave_id_tx = SHDMA_SLAVE_MMCIF_TX,
.slave_id_rx = SHDMA_SLAVE_MMCIF_RX, .slave_id_rx = SHDMA_SLAVE_MMCIF_RX,
}; };
......
...@@ -28,6 +28,7 @@ ...@@ -28,6 +28,7 @@
#include <linux/mmc/sh_mmcif.h> #include <linux/mmc/sh_mmcif.h>
#include <linux/pinctrl/machine.h> #include <linux/pinctrl/machine.h>
#include <linux/platform_data/gpio-rcar.h> #include <linux/platform_data/gpio-rcar.h>
#include <linux/platform_data/rcar-du.h>
#include <linux/platform_device.h> #include <linux/platform_device.h>
#include <linux/phy.h> #include <linux/phy.h>
#include <linux/regulator/fixed.h> #include <linux/regulator/fixed.h>
...@@ -39,6 +40,62 @@ ...@@ -39,6 +40,62 @@
#include <asm/mach-types.h> #include <asm/mach-types.h>
#include <asm/mach/arch.h> #include <asm/mach/arch.h>
/* DU */
static struct rcar_du_encoder_data lager_du_encoders[] = {
{
.type = RCAR_DU_ENCODER_VGA,
.output = RCAR_DU_OUTPUT_DPAD0,
}, {
.type = RCAR_DU_ENCODER_NONE,
.output = RCAR_DU_OUTPUT_LVDS1,
.connector.lvds.panel = {
.width_mm = 210,
.height_mm = 158,
.mode = {
.clock = 65000,
.hdisplay = 1024,
.hsync_start = 1048,
.hsync_end = 1184,
.htotal = 1344,
.vdisplay = 768,
.vsync_start = 771,
.vsync_end = 777,
.vtotal = 806,
.flags = 0,
},
},
},
};
static const struct rcar_du_platform_data lager_du_pdata __initconst = {
.encoders = lager_du_encoders,
.num_encoders = ARRAY_SIZE(lager_du_encoders),
};
static const struct resource du_resources[] __initconst = {
DEFINE_RES_MEM(0xfeb00000, 0x70000),
DEFINE_RES_MEM_NAMED(0xfeb90000, 0x1c, "lvds.0"),
DEFINE_RES_MEM_NAMED(0xfeb94000, 0x1c, "lvds.1"),
DEFINE_RES_IRQ(gic_spi(256)),
DEFINE_RES_IRQ(gic_spi(268)),
DEFINE_RES_IRQ(gic_spi(269)),
};
static void __init lager_add_du_device(void)
{
struct platform_device_info info = {
.name = "rcar-du-r8a7790",
.id = -1,
.res = du_resources,
.num_res = ARRAY_SIZE(du_resources),
.data = &lager_du_pdata,
.size_data = sizeof(lager_du_pdata),
.dma_mask = DMA_BIT_MASK(32),
};
platform_device_register_full(&info);
}
/* LEDS */ /* LEDS */
static struct gpio_led lager_leds[] = { static struct gpio_led lager_leds[] = {
{ {
...@@ -86,6 +143,8 @@ static struct regulator_consumer_supply fixed3v3_power_consumers[] = ...@@ -86,6 +143,8 @@ static struct regulator_consumer_supply fixed3v3_power_consumers[] =
/* MMCIF */ /* MMCIF */
static const struct sh_mmcif_plat_data mmcif1_pdata __initconst = { static const struct sh_mmcif_plat_data mmcif1_pdata __initconst = {
.caps = MMC_CAP_8_BIT_DATA | MMC_CAP_NONREMOVABLE, .caps = MMC_CAP_8_BIT_DATA | MMC_CAP_NONREMOVABLE,
.clk_ctrl2_present = true,
.ccs_unsupported = true,
}; };
static const struct resource mmcif1_resources[] __initconst = { static const struct resource mmcif1_resources[] __initconst = {
...@@ -107,6 +166,13 @@ static const struct resource ether_resources[] __initconst = { ...@@ -107,6 +166,13 @@ static const struct resource ether_resources[] __initconst = {
}; };
static const struct pinctrl_map lager_pinctrl_map[] = { static const struct pinctrl_map lager_pinctrl_map[] = {
/* DU (CN10: ARGB0, CN13: LVDS) */
PIN_MAP_MUX_GROUP_DEFAULT("rcar-du-r8a7790", "pfc-r8a7790",
"du_rgb666", "du"),
PIN_MAP_MUX_GROUP_DEFAULT("rcar-du-r8a7790", "pfc-r8a7790",
"du_sync_1", "du"),
PIN_MAP_MUX_GROUP_DEFAULT("rcar-du-r8a7790", "pfc-r8a7790",
"du_clk_out_0", "du"),
/* SCIF0 (CN19: DEBUG SERIAL0) */ /* SCIF0 (CN19: DEBUG SERIAL0) */
PIN_MAP_MUX_GROUP_DEFAULT("sh-sci.6", "pfc-r8a7790", PIN_MAP_MUX_GROUP_DEFAULT("sh-sci.6", "pfc-r8a7790",
"scif0_data", "scif0"), "scif0_data", "scif0"),
...@@ -154,6 +220,8 @@ static void __init lager_add_standard_devices(void) ...@@ -154,6 +220,8 @@ static void __init lager_add_standard_devices(void)
ether_resources, ether_resources,
ARRAY_SIZE(ether_resources), ARRAY_SIZE(ether_resources),
&ether_pdata, sizeof(ether_pdata)); &ether_pdata, sizeof(ether_pdata));
lager_add_du_device();
} }
/* /*
......
...@@ -28,6 +28,7 @@ ...@@ -28,6 +28,7 @@
static void __init marzen_init(void) static void __init marzen_init(void)
{ {
r8a7779_add_standard_devices_dt(); r8a7779_add_standard_devices_dt();
r8a7779_init_irq_extpin_dt(1); /* IRQ1 as individual interrupt */
} }
static const char *marzen_boards_compat_dt[] __initdata = { static const char *marzen_boards_compat_dt[] __initdata = {
......
...@@ -30,6 +30,7 @@ ...@@ -30,6 +30,7 @@
#include <linux/dma-mapping.h> #include <linux/dma-mapping.h>
#include <linux/pinctrl/machine.h> #include <linux/pinctrl/machine.h>
#include <linux/platform_data/gpio-rcar.h> #include <linux/platform_data/gpio-rcar.h>
#include <linux/platform_data/rcar-du.h>
#include <linux/platform_data/usb-rcar-phy.h> #include <linux/platform_data/usb-rcar-phy.h>
#include <linux/regulator/fixed.h> #include <linux/regulator/fixed.h>
#include <linux/regulator/machine.h> #include <linux/regulator/machine.h>
...@@ -124,6 +125,8 @@ static struct resource sdhi0_resources[] = { ...@@ -124,6 +125,8 @@ static struct resource sdhi0_resources[] = {
}; };
static struct sh_mobile_sdhi_info sdhi0_platform_data = { static struct sh_mobile_sdhi_info sdhi0_platform_data = {
.dma_slave_tx = HPBDMA_SLAVE_SDHI0_TX,
.dma_slave_rx = HPBDMA_SLAVE_SDHI0_RX,
.tmio_flags = TMIO_MMC_WRPROTECT_DISABLE | TMIO_MMC_HAS_IDLE_WAIT, .tmio_flags = TMIO_MMC_WRPROTECT_DISABLE | TMIO_MMC_HAS_IDLE_WAIT,
.tmio_caps = MMC_CAP_SD_HIGHSPEED, .tmio_caps = MMC_CAP_SD_HIGHSPEED,
}; };
...@@ -169,6 +172,63 @@ static struct platform_device hspi_device = { ...@@ -169,6 +172,63 @@ static struct platform_device hspi_device = {
.num_resources = ARRAY_SIZE(hspi_resources), .num_resources = ARRAY_SIZE(hspi_resources),
}; };
/*
* DU
*
* The panel only specifies the [hv]display and [hv]total values. The position
* and width of the sync pulses don't matter, they're copied from VESA timings.
*/
static struct rcar_du_encoder_data du_encoders[] = {
{
.type = RCAR_DU_ENCODER_VGA,
.output = RCAR_DU_OUTPUT_DPAD0,
}, {
.type = RCAR_DU_ENCODER_LVDS,
.output = RCAR_DU_OUTPUT_DPAD1,
.connector.lvds.panel = {
.width_mm = 210,
.height_mm = 158,
.mode = {
.clock = 65000,
.hdisplay = 1024,
.hsync_start = 1048,
.hsync_end = 1184,
.htotal = 1344,
.vdisplay = 768,
.vsync_start = 771,
.vsync_end = 777,
.vtotal = 806,
.flags = 0,
},
},
},
};
static const struct rcar_du_platform_data du_pdata __initconst = {
.encoders = du_encoders,
.num_encoders = ARRAY_SIZE(du_encoders),
};
static const struct resource du_resources[] __initconst = {
DEFINE_RES_MEM(0xfff80000, 0x40000),
DEFINE_RES_IRQ(gic_iid(0x3f)),
};
static void __init marzen_add_du_device(void)
{
struct platform_device_info info = {
.name = "rcar-du-r8a7779",
.id = -1,
.res = du_resources,
.num_res = ARRAY_SIZE(du_resources),
.data = &du_pdata,
.size_data = sizeof(du_pdata),
.dma_mask = DMA_BIT_MASK(32),
};
platform_device_register_full(&info);
}
/* LEDS */ /* LEDS */
static struct gpio_led marzen_leds[] = { static struct gpio_led marzen_leds[] = {
{ {
...@@ -237,6 +297,19 @@ static struct platform_device *marzen_devices[] __initdata = { ...@@ -237,6 +297,19 @@ static struct platform_device *marzen_devices[] __initdata = {
}; };
static const struct pinctrl_map marzen_pinctrl_map[] = { static const struct pinctrl_map marzen_pinctrl_map[] = {
/* DU (CN10: ARGB0, CN13: LVDS) */
PIN_MAP_MUX_GROUP_DEFAULT("rcar-du-r8a7779", "pfc-r8a7779",
"du0_rgb888", "du0"),
PIN_MAP_MUX_GROUP_DEFAULT("rcar-du-r8a7779", "pfc-r8a7779",
"du0_sync_1", "du0"),
PIN_MAP_MUX_GROUP_DEFAULT("rcar-du-r8a7779", "pfc-r8a7779",
"du0_clk_out_0", "du0"),
PIN_MAP_MUX_GROUP_DEFAULT("rcar-du-r8a7779", "pfc-r8a7779",
"du1_rgb666", "du1"),
PIN_MAP_MUX_GROUP_DEFAULT("rcar-du-r8a7779", "pfc-r8a7779",
"du1_sync_1", "du1"),
PIN_MAP_MUX_GROUP_DEFAULT("rcar-du-r8a7779", "pfc-r8a7779",
"du1_clk_out", "du1"),
/* HSPI0 */ /* HSPI0 */
PIN_MAP_MUX_GROUP_DEFAULT("sh-hspi.0", "pfc-r8a7779", PIN_MAP_MUX_GROUP_DEFAULT("sh-hspi.0", "pfc-r8a7779",
"hspi0", "hspi0"), "hspi0", "hspi0"),
...@@ -297,6 +370,7 @@ static void __init marzen_init(void) ...@@ -297,6 +370,7 @@ static void __init marzen_init(void)
r8a7779_add_vin_device(1, &vin_platform_data); r8a7779_add_vin_device(1, &vin_platform_data);
r8a7779_add_vin_device(3, &vin_platform_data); r8a7779_add_vin_device(3, &vin_platform_data);
platform_add_devices(marzen_devices, ARRAY_SIZE(marzen_devices)); platform_add_devices(marzen_devices, ARRAY_SIZE(marzen_devices));
marzen_add_du_device();
} }
static const char *marzen_boards_compat_dt[] __initdata = { static const char *marzen_boards_compat_dt[] __initdata = {
......
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