[ARM] Tweak the bridge control register for PCI and cardbus bridges.

This ensures that we release reset on devices behind a PCI bridge,
and that we have error reporting enabled behind bridges.

arch/arm/kernel/bios32.c

@@ -362,6 +362,19 @@ void __devinit pcibios_fixup_bus(struct pci_bus *bus)
 			isa_bridge = dev;
 			break;
 #endif
+		case PCI_CLASS_BRIDGE_PCI:
+			pci_read_config_word(dev, PCI_BRIDGE_CONTROL, &status);
+			status |= PCI_BRIDGE_CTL_PARITY|PCI_BRIDGE_CTL_MASTER_ABORT;
+			status &= ~(PCI_BRIDGE_CTL_BUS_RESET|PCI_BRIDGE_CTL_FAST_BACK);
+			pci_write_config_word(dev, PCI_BRIDGE_CONTROL, status);
+			break;
+
+		case PCI_CLASS_BRIDGE_CARDBUS:
+			pci_read_config_word(dev, PCI_CB_BRIDGE_CONTROL, &status);
+			status |= PCI_CB_BRIDGE_CTL_PARITY|PCI_CB_BRIDGE_CTL_MASTER_ABORT;
+			pci_write_config_word(dev, PCI_CB_BRIDGE_CONTROL, status);
+			break;
+		}
 	}
 
 	/*