- 04 Aug, 2021 26 commits
-
-
Konrad Dybcio authored
There is SO MUCH common code between these two SoCs that it makes no sense to keep what is essentially a duplicate of 630.dtsi. Instead, it's better to just change the things that differ. Signed-off-by:
Konrad Dybcio <konrad.dybcio@somainline.org> Link: https://lore.kernel.org/r/20210728222542.54269-25-konrad.dybcio@somainline.orgSigned-off-by:
Bjorn Andersson <bjorn.andersson@linaro.org>
-
Konrad Dybcio authored
Add VADC, temperature alarm and thermal zones for pm660(l) to allow for temperature and voltage readouts and prevent PMIC overheating. Signed-off-by:
AngeloGioacchino Del Regno <angelogioacchino.delregno@somainline.org> Signed-off-by:
-
AngeloGioacchino Del Regno authored
The PM660L PMIC has SPMI regulators on the PMIC SID 3: let's add the compatible in order to probe them. Signed-off-by:
-
Konrad Dybcio authored
This will enable backlight control on WLED-enabled devices. Signed-off-by:
-
AngeloGioacchino Del Regno authored
The PM660 PMIC has SPMI regulators on the PMIC SID 1: let's declare the second pmic subtree and add the spmi vregs compatible to probe them there. Signed-off-by:
-
AngeloGioacchino Del Regno authored
The SDM630 SoC features an Adreno 508.0 GPU with a minimum frequency of 160MHz and a maximum of (depending on the speed-bin) 775MHz. Signed-off-by:
-
Konrad Dybcio authored
Enlarge the size to make sure all relevant registers can be reached. This will be required to support the modem. Signed-off-by:
-
Konrad Dybcio authored
Configure the ADSP remote processor and add a simple sound{} node to make way for future development. Signed-off-by: -
Konrad Dybcio authored
Add a basic thermal-zones configuration to make sure the SoC doesn't overheat itself to death. Signed-off-by:
-
Konrad Dybcio authored
Add SMP2P nodes that are required for ADSP and modem bringup. Signed-off-by:
-
Konrad Dybcio authored
This will enable temperature reporting for various SoC components. Acked-by:
Rob Herring <robh@kernel.org> Signed-off-by:
-
AngeloGioacchino Del Regno authored
The Adreno SMMU in SDM630 needs this compatible string for proper context handling and split pagetables support. Signed-off-by:
-
AngeloGioacchino Del Regno authored
Add the required clocks and power domains for the SMMUs to work. Signed-off-by:
-
AngeloGioacchino Del Regno authored
Add the GPU Clock Controller in SDM630 and keep it disabled by default. Signed-off-by:
-
AngeloGioacchino Del Regno authored
The SDHC port 1 has interconnects and can make use of DVFS: define the interconnections and the OPP table in order to optimize performance and power consumption. Signed-off-by:
-
AngeloGioacchino Del Regno authored
This will enable usage of (generally) uSD cards. While at it, add accompanying OPP table for DVFS. Signed-off-by:
-
AngeloGioacchino Del Regno authored
Previous pinctrl configuration was wrong. Fix it and clean up how multi-pin states are described. Signed-off-by:
-
Konrad Dybcio authored
This will let us use USB2 on our devices. The SoC supposedly supports USB3, but there are no known cases of devices that actually have USB3 wired up in hardware. Signed-off-by:
-
AngeloGioacchino Del Regno authored
These will be required for USB and Adreno support. Signed-off-by:
-
Konrad Dybcio authored
Add MDSS node along with its children to enable display functionality. Signed-off-by:
-
Konrad Dybcio authored
Add interconnect provider nodes to allow for NoC bus scaling. Signed-off-by:
-
Konrad Dybcio authored
Add MultiMedia Clock Controller node to allow for accessing and controlling Multimedia Subsystem clocks by their respective users. Signed-off-by:
-
Konrad Dybcio authored
Add the rpmpd node on the sdm630 and define the available levels. Signed-off-by:
-
AngeloGioacchino Del Regno authored
The memory map was wrong. Fix it. Signed-off-by:
-
Thara Gopinath authored
CPU0 frequency 768MHz is wrongly modeled as 576000000 hz in cpu0_opp_table. Use the correct value 768000000 hz. Fixes: 2b6187ab ("arm64: dts: qcom: sm8150: Add CPU opp tables") Signed-off-by:
Thara Gopinath <thara.gopinath@linaro.org> Reviewed-by:
-
Thara Gopinath authored
Add "qcom,sm8150" as one of the platform compatible strings. This will be later used by cpufreq-dt-platdev to exclude using cpufreq-dt cpufreq driver. Signed-off-by:
-
- 03 Aug, 2021 4 commits
-
-
AngeloGioacchino Del Regno authored
Add support for following boards: - Xperia X Performance (dora) - Xperia XZ (kagura) - Xperia XZs (keyaki) They are all based on the SONY Tone platform and feature largely similar hardware with the most obvious differences being lack of USB-C and ToF sensor on Dora and different camera sensor on Keyaki. Signed-off-by:
-
Konrad Dybcio authored
Most phones ship without HDMI and leaving it enabled wrecks havoc. Disable it in msm8996.dtsi and re-enable it on the boards that did not disable it previously. Signed-off-by:
-
Konrad Dybcio authored
Add an overlay for MSM8996v3.0, which is a pre-final revision of the said SoC. It has some stark differences with regards to GPU, or more specifically its power delivery path. Oh, and of course a different msm-id. Signed-off-by:
-
Konrad Dybcio authored
PMI8996 is *almost* the same hardware as PMI8994, say for some annoyances: - Boards equipped with PMI8996 now have to include pmic-id (which wasn't the case before) - Different qpnp-ibb-discharge-resistor value (will be addressed after LABIBB is introduced) - Different inhibit-derating-ua value (will be addressed after BCL is introduced) - Different ramp_up_step value (will be addressed after [if?] QPNP Flash LED is introduced) This DTSI is supposed to be included >>ON TOP OF<< pmi8994.dtsi, like this: -- msm8996-nice-device.dts -- \#include "pmi8994.dtsi" \#include "pmi8996.dtsi" or more likely like this: -- msm8996-some-phone.dts -- \#include "msm8996.dtsi" ... \#include "pmi8994.dtsi" -- msm8996-pmi8996-some-phone.dts -- \#include "msm8996-some-phone.dts" \#include "pmi8996.dtsi" So that we only have to keep 2 DTs for devices that were shipped with both ones, instead of what would be three (device base + pmi8994 + pmi8996) Signed-off-by:
-
- 21 Jul, 2021 1 commit
-
-
Judy Hsiao authored
Use max98360a dts node to correctly describe the hardware. Signed-off-by:
Judy Hsiao <judyhsiao@chromium.org> Reviewed-by:
Matthias Kaehlcke <mka@chromium.org> Link: https://lore.kernel.org/r/20210625045010.2914289-1-judyhsiao@chromium.orgSigned-off-by:
-
- 20 Jul, 2021 8 commits
-
-
Sandeep Maheswaram authored
Add USB nodes for sc7280 IDP board. Signed-off-by:
Sandeep Maheswaram <sanm@codeaurora.org> Reviewed-by:
Stephen Boyd <swboyd@chromium.org> Link: https://lore.kernel.org/r/1625576413-12324-4-git-send-email-sanm@codeaurora.orgSigned-off-by:
-
Sandeep Maheswaram authored
Add nodes for DWC3 USB controller, QMP and HS USB PHYs in sc7280 SOC. Signed-off-by:
-
Shaik Sajida Bhanu authored
Add nodes for eMMC and SD card on sc7280. Signed-off-by:
Shaik Sajida Bhanu <sbhanu@codeaurora.org> Reviewed-by:
-
Bhupesh Sharma authored
SA8155p adp board has two USB A-type receptacles called USB-portB and USB-portC respectively. While USB-portB is a USB High-Speed connector/interface, the USB-portC one is a USB 3.1 Super-Speed connector/interface. Also the USB-portB is used as the USB emergency download port (for image download purposes). Enable both the ports on the board in USB Host mode (since all the USB interfaces are brought out to USB Type A connectors). Cc: Bjorn Andersson <bjorn.andersson@linaro.org> Signed-off-by:
Bhupesh Sharma <bhupesh.sharma@linaro.org> Link: https://lore.kernel.org/r/20210627114616.717101-4-bhupesh.sharma@linaro.orgSigned-off-by:
-
Bhupesh Sharma authored
Nodes should be sorted by address, so move the dc_noc and gem_noc nodes to their correct place. Cc: Bjorn Andersson <bjorn.andersson@linaro.org> Signed-off-by:
-
Bhupesh Sharma authored
The dwc3 usb nodes in several arm64 qcom dts are currently named differently, somewhere as 'usb@<addr>' and somewhere as 'dwc3@<addr>', leading to some confusion when one sees the entries in sysfs or dmesg: [ 1.943482] dwc3 a600000.usb: Adding to iommu group 1 [ 2.266127] dwc3 a800000.dwc3: Adding to iommu group 2 Name the usb nodes as 'usb@<addr>' for consistency, which is the correct convention as per the 'snps,dwc3' dt-binding as well (see [1]). [1]. Documentation/devicetree/bindings/usb/snps,dwc3.yaml Cc: Bjorn Andersson <bjorn.andersson@linaro.org> Signed-off-by:
-
Bhupesh Sharma authored
Add support for UFS ICE (Qualcomm Inline Crypto Engine) in sm8150 SoC dts. I tested this on SA8155p-adp board, which is a publicly available development board that uses the sa8155p Qualcomm Snapdragon SoC. SA8155p platform is similar to the SM8150, so use this as base for now. I tested the UFS ICE feature using 'fscrypt' test utility. Cc: Bjorn Andersson <bjorn.andersson@linaro.org> Cc: Eric Biggers <ebiggers@google.com> Signed-off-by:
-
Dmitry Baryshkov authored
Use 'lanes' as SuperSpeed lanes device node instead of just 'lane' to fix issues with TypeC support. Fixes: 46a6f297 ("arm64: dts: qcom: sm8250: Add USB and PHY device nodes") Cc: robh+dt@kernel.org Cc: devicetree@vger.kernel.org Signed-off-by:
Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Tested-by:
Bryan O'Donoghue <bryan.odonoghue@linaro.org> Signed-off-by:
-
- 19 Jul, 2021 1 commit
-
-
Judy Hsiao authored
Set audu wakeup delay to 80 ms for fixing pop noise during capture begin. Fixes: ba5f9b5d ("arm64: dts: qcom: sc7180: Add wakeup delay for adau codec") Signed-off-by:
-
