- 27 Jan, 2015 37 commits
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Thierry Reding authored
Switch out the regular plane helpers for the atomic plane helpers. Also use the default atomic helpers to implement the ->atomic_check() and ->atomic_commit() callbacks. The driver now exclusively uses the atomic interfaces. Signed-off-by: Thierry Reding <treding@nvidia.com>
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Thierry Reding authored
Hook up the default ->reset() and ->atomic_duplicate_state() helpers. This ensures that state objects are properly created and framebuffer reference counts correctly maintained. Signed-off-by: Thierry Reding <treding@nvidia.com>
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Thierry Reding authored
Implement initial atomic state handling. Hook up the CRTCs, planes' and connectors' ->atomic_destroy_state() callback to ensure that the atomic state objects don't leak. Furthermore the CRTC now implements the ->mode_set_nofb() callback that is used by new helpers to implement ->mode_set() and ->mode_set_base(). These new helpers also make use of the new plane helper functions which the driver now provides. Signed-off-by: Thierry Reding <treding@nvidia.com>
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Thierry Reding authored
Commit 9c012700 ("drm/tegra: dc: Add powergate support") changed the driver's ->probe() implementation to deassert the module reset, and with there being nobody else to assert it until ->remove() there is no need to deassert again later on. Signed-off-by: Thierry Reding <treding@nvidia.com>
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Thierry Reding authored
The tegra_output_exit() and tegra_output_remove() functions cannot fail, so make them return void. Signed-off-by: Thierry Reding <treding@nvidia.com>
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Thierry Reding authored
The tegra_output midlayer is now completely gone and output drivers use it purely as a helper library. Signed-off-by: Thierry Reding <treding@nvidia.com>
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Thierry Reding authored
The debugfs cleanup code never fails, so no error is returned. Therefore the functions can all return void instead. Signed-off-by: Thierry Reding <treding@nvidia.com>
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Thierry Reding authored
Implement encoder and connector within the eDP driver itself using the Tegra output helpers rather than using the Tegra output as midlayer. By doing so one level of indirection is removed and output drivers become more flexible while keeping the majority of the advantages provided by the common output helpers. Signed-off-by: Thierry Reding <treding@nvidia.com>
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Thierry Reding authored
Implement encoder and connector within the DSI driver itself using the Tegra output helpers rather than using the Tegra output as midlayer. By doing so one level of indirection is removed and output drivers become more flexible while keeping the majority of the advantages provided by the common output helpers. Signed-off-by: Thierry Reding <treding@nvidia.com>
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Thierry Reding authored
Implement encoder and connector within the HDMI driver itself using the Tegra output helpers rather than using the Tegra output as midlayer. By doing so one level of indirection is removed and output drivers become more flexible while keeping the majority of the advantages provided by the common output helpers. Signed-off-by: Thierry Reding <treding@nvidia.com>
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Thierry Reding authored
Implement encoder and connector within the RGB driver itself using the Tegra output helpers rather than using the Tegra output as midlayer. By doing so one level of indirection is removed and output drivers become more flexible while keeping the majority of the advantages provided by the common output helpers. Signed-off-by: Thierry Reding <treding@nvidia.com>
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Thierry Reding authored
This is a small helper that performs the basic steps required by all output drivers to prepare the display controller for use with a given encoder. Signed-off-by: Thierry Reding <treding@nvidia.com>
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Thierry Reding authored
In order to transition output drivers to using the struct tegra_output as a helper rather than midlayer, make this callback optional. Instead drivers should implement the equivalent as part of ->mode_fixup(). For the conversion to atomic modesetting a new callback ->atomic_check() should be implemented that updates the display controller's state with the corresponding parent clock, rate and shift clock divider. Signed-off-by: Thierry Reding <treding@nvidia.com>
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Thierry Reding authored
The output layer was initially designed to help reduce the amount of code duplicated in output drivers. An unfortunate side-effect of that was that it turned into a midlayer and it became difficult to make the output drivers work without bending over backwards to fit into the midlayer. This commit starts to convert the midlayer into a helper library by exporting most of the common functions so that they can be used by the output drivers directly. Doing so will allow output drivers to reuse common code paths but more easily override them where necessary. Signed-off-by: Thierry Reding <treding@nvidia.com>
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Thierry Reding authored
The DRM core should take care of disabling all unneeded planes, so there is no need to do this explicitly. Signed-off-by: Thierry Reding <treding@nvidia.com>
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Thierry Reding authored
This structure will be extended using non-framebuffer related callbacks in subsequent patches, so it should move to a more central location. Signed-off-by: Thierry Reding <treding@nvidia.com>
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Thierry Reding authored
When disabling the display controller, stop it and wait for it to become idle. Doing so ensures that no further accesses to the framebuffer occur and the buffers can be safely unmapped or freed. Signed-off-by: Thierry Reding <treding@nvidia.com>
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Thierry Reding authored
Previously output drivers would all stop the display controller in their disable path. However with the transition to atomic modesetting the display controller needs to be kept running until all planes have been disabled so that software can properly determine (using VBLANK counts) when it is safe to remove the framebuffers associated with the planes. Moving this code into the display controller's disable path also gets rid of the duplication of this into all output drivers. Signed-off-by: Thierry Reding <treding@nvidia.com>
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Thierry Reding authored
All output drivers have open-coded variants of this function, so export it to remove some code duplication. Signed-off-by: Thierry Reding <treding@nvidia.com>
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Thierry Reding authored
This callback can be used instead of the legacy ->mode_fixup() and is passed the CRTC and connector states. It can thus use these states to validate the modeset and cache values in the state to be used during the actual modeset. Reviewed-by: Daniel Vetter <daniel.vetter@ffwll.ch> Signed-off-by: Thierry Reding <treding@nvidia.com>
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Thierry Reding authored
In order to prevent drivers from having to perform the same checks over and over again, add an optional ->atomic_disable callback which the core calls under the right circumstances. v2: pass old state and detect edges to avoid calling ->atomic_disable on already disabled planes, remove redundant comment (Daniel Vetter) v3: rename helper to drm_atomic_plane_disabling() to clarify that it is checking for transitions, move helper to drm_atomic_helper.h, clarify check for !old_state and its relation to transitional helpers Here's an extract from some discussion rationalizing the behaviour (for a full version, see the reference below): > > Hm, thinking about this some more this will result in a slight difference > > in behaviour, at least when drivers just use the helper ->reset functions > > but don't disable everything: > > - With transitional helpers we assume we know nothing and call > > ->atomic_disable. > > - With atomic old_state->crtc == NULL in the same situation right after > > boot-up, but we asssume the plane is really off and _dont_ call > > ->atomic_disable. > > > > Should we instead check for (old_state && old_state->crtc) and state that > > drivers need to make sure they don't have stuff hanging around? > > I don't think we can check for old_state because otherwise this will > always return false, whereas we really want it to force-disable planes > that could be on (lacking any more accurate information). For > transitional helpers anyway. > > For the atomic helpers, old_state will never be NULL, but I'd assume > that the driver would reconstruct the current state in ->reset(). By the way, the reason for why old_state can be NULL with transitional helpers is the ordering of the steps in the atomic transition. Currently the Tegra patches do this (based on your blog post and the Exynos proto- type): 1) atomic conversion, phase 1: - implement ->atomic_{check,update,disable}() - use drm_plane_helper_{update,disable}() 2) atomic conversion, phase 2: - call drm_mode_config_reset() from ->load() - implement ->reset() That's only a partial list of what's done in these steps, but that's the only relevant pieces for why old_state is NULL. What happens is that without ->reset() implemented there won't be any initial state, hence plane->state (the old_state here) will be NULL the first time atomic state is applied. We could of course reorder the sequence such that drivers are required to hook up ->reset() before they can (or at the same as they) hook up the transitional helpers. We could add an appropriate WARN_ON to this helper to make that more obvious. However, that will not solve the problem because it only gets rid of the special case. We still don't know whether old_state->crtc == NULL is the current state or just the initial default. So no matter which way we do this, I don't see a way to get away without requiring specific semantics from drivers. They would be that: - drivers recreate the correct state in ->reset() so that old_state->crtc != NULL if the plane is really enabled or - drivers have to ensure that the real state in fact mirrors the initial default as encoded in the state (plane disabled) References: http://lists.freedesktop.org/archives/dri-devel/2015-January/075578.htmlReviewed-by: Daniel Vetter <daniel.vetter@ffwll.ch> Reviewed-by: Gustavo Padovan <gustavo.padovan@collabora.co.uk> Signed-off-by: Thierry Reding <treding@nvidia.com>
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Thierry Reding authored
There is no use-case where it would be useful for drivers not to implement this function and the transitional plane helpers already require drivers to provide an implementation. v2: add new requirement to kerneldoc Reviewed-by: Daniel Vetter <daniel.vetter@ffwll.ch> Signed-off-by: Thierry Reding <treding@nvidia.com>
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Dan Carpenter authored
kfree(ERR_PTR(-ENOMEM)) will not work very well. Signed-off-by: Dan Carpenter <dan.carpenter@oracle.com> Signed-off-by: Thierry Reding <treding@nvidia.com>
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Dan Carpenter authored
We can't save two values to the IRQ flags at the same time so the IRQs are not enabled at the end. This kind of bug is easy to miss in testing if the function is normally called with IRQs disabled so we wouldn't enable IRQs anyway. Signed-off-by: Dan Carpenter <dan.carpenter@oracle.com> Signed-off-by: Thierry Reding <treding@nvidia.com>
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David Ung authored
Compliance testing shows that HS Trail is off by -12%. Increase the HS Trail time to make this test pass. Signed-off-by: David Ung <davidu@nvidia.com> [treding@nvidia.com: update specification references, add comment] Signed-off-by: Thierry Reding <treding@nvidia.com>
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Thierry Reding authored
This allows a DRM driver unload/reload cycle to completely reset the DSI controller and may help in situations where it's broken. Signed-off-by: Thierry Reding <treding@nvidia.com>
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Thierry Reding authored
This reset is necessary to properly clean up the internal state of the controller. Signed-off-by: Thierry Reding <treding@nvidia.com>
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Thierry Reding authored
Use a sized unsigned 32-bit data type (u32) to store register contents. The DSI registers are 32 bits wide irrespective of the architecture's data width. Signed-off-by: Thierry Reding <treding@nvidia.com>
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Thierry Reding authored
Use a sized unsigned 32-bit data type (u32) to store register contents. The HDMI registers are 32 bits wide irrespective of the architecture's data width. Signed-off-by: Thierry Reding <treding@nvidia.com>
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Thierry Reding authored
This prevents the compiler from warning about using a variable that is possibly uninitialized. Signed-off-by: Thierry Reding <treding@nvidia.com>
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Thierry Reding authored
Most of the display controller's registers are double-buffered, a few of them are triple-buffered. The ASSEMBLY shadow copy is latched intto the ACTIVE copy for double-buffered registers. For triple-buffered registers the ASSEMBLY copy is first latched into the ARM copy. Latching into the ACTIVE copy happens immediately if the controller is inactive. Otherwise the latching happens on the next frame boundary. The latching of the ASSEMBLY into the ARM copy happens immediately. Latching is controlled by a set of *_ACT_REQ and *_UPDATE bits in the DC_CMD_STATE_CONTROL register. Signed-off-by: Thierry Reding <treding@nvidia.com>
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Thierry Reding authored
Tegra114 and earlier support specifying the color of the border (i.e. the active area of the screen that is not covered by any of the overlay windows). By default this is set to a light blue, so set it to black to comply with the requirements set by atomic modesetting. Signed-off-by: Thierry Reding <treding@nvidia.com>
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Dan Carpenter authored
iommu_domain_alloc() returns NULL on error, it never returns error pointers. Signed-off-by: Dan Carpenter <dan.carpenter@oracle.com> Signed-off-by: Thierry Reding <treding@nvidia.com>
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Thierry Reding authored
The possible_crtcs mask needs to be a mask of CRTC indices. There is no guarantee that the DRM indices match the hardware pipe number, so the mask must be computed from the CRTC index. Signed-off-by: Thierry Reding <treding@nvidia.com>
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Thierry Reding authored
The DRM core now zeroes out the memory associated with CRTC, encoder and connector objects upon cleanup, so there's no need to explicitly do that in drivers anymore. Signed-off-by: Thierry Reding <treding@nvidia.com>
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Thierry Reding authored
The iommu_map_sg() function is now available in the IOMMU API, so drop the open-coded variant. Signed-off-by: Thierry Reding <treding@nvidia.com>
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Thierry Reding authored
Previously the struct bus_type exported by the host1x infrastructure was only a very basic skeleton. Turn that implementation into a more full- fledged bus to support proper probe ordering and power management. Note that the bus infrastructure needs to be available before any of the drivers can be registered. This is automatically ensured if all drivers are built as loadable modules (via symbol dependencies). If all drivers are built-in there are no such guarantees and the link order determines the initcall ordering. Adjust drivers/gpu/Makefile to make sure that the host1x bus infrastructure is initialized prior to any of its users (only drm/tegra currently). v2: Fix building host1x and tegra-drm as modules Reported-by: Dave Airlie <airlied@gmail.com> Reviewed-by: Sean Paul <seanpaul@chromium.org> Reviewed-by: Mark Zhang <markz@nvidia.com> Signed-off-by: Thierry Reding <treding@nvidia.com>
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- 23 Jan, 2015 3 commits
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Thierry Reding authored
This function is needed in several places, so factor it out. Signed-off-by: Thierry Reding <treding@nvidia.com>
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Thierry Reding authored
Instead of locking within host1x_device_add(), call it under the lock to make the locking more consistent. Signed-off-by: Thierry Reding <treding@nvidia.com>
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Thierry Reding authored
When a driver's ->probe() function fails, the host1x bus must not call its ->remove() function because the driver will already have cleaned up in the error handling path in ->probe(). Signed-off-by: Thierry Reding <treding@nvidia.com>
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