- 26 Nov, 2014 6 commits
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Jisheng Zhang authored
This patch adds in support for S2R for dw-apb-ictl irqchip driver. We can used relaxed variants in the resume hook because there's no DMA at all here, the device type memory attribute can ensure the operations order and relaxed version imply compiler barrier. Signed-off-by:
Jisheng Zhang <jszhang@marvell.com> Link: https://lkml.kernel.org/r/1415773374-4629-4-git-send-email-jszhang@marvell.comSigned-off-by:
Jason Cooper <jason@lakedaemon.net>
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Jisheng Zhang authored
The irq_chip_type instances have separate mask registers, so we need to enable IRQ_GC_MASK_CACHE_PER_TYPE to actually handle separate mask registers. Signed-off-by:
Jisheng Zhang <jszhang@marvell.com> Acked-by:
Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com> Link: https://lkml.kernel.org/r/1415773374-4629-3-git-send-email-jszhang@marvell.comSigned-off-by:
Jason Cooper <jason@lakedaemon.net>
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Jisheng Zhang authored
There's no DMA at all, the device type memory attribute can ensure the operations order and relaxed version imply compiler barrier, so we are safe to use relaxed version to improve the performance a bit. Signed-off-by:
Jisheng Zhang <jszhang@marvell.com> Acked-by:
Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com> Link: https://lkml.kernel.org/r/1415773374-4629-2-git-send-email-jszhang@marvell.comSigned-off-by:
Jason Cooper <jason@lakedaemon.net>
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Jason Cooper authored
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Gregory CLEMENT authored
The commit "genirq: Generic chip: Change irq_reg_{readl,writel} arguments" modified the API. In the same tome the arch/arm/plat-orion/gpio.c file received a fix with the use of the old API: "ARM: orion: Fix for certain sequence of request_irq can cause irq storm". This commit fixes the use of the API. Signed-off-by:
Gregory CLEMENT <gregory.clement@free-electrons.com> Acked-by:
Olof Johansson <olof@lixom.net> Link: https://lkml.kernel.org/r/1416928752-24529-1-git-send-email-gregory.clement@free-electrons.comSigned-off-by:
Jason Cooper <jason@lakedaemon.net>
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Jason Cooper authored
mvebu fixes for v3.18 - Armada XP - Generalize i2c quirk - orion - Fix irq storm caused by specific sequence of request_irq
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- 09 Nov, 2014 19 commits
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Boris BREZILLON authored
The at91rm9200 have an RTT block and thus must at91rm9200_aic_irq_fixup has to be called when initializing the irqchip. Signed-off-by:
Boris BREZILLON <boris.brezillon@free-electrons.com> Link: https://lkml.kernel.org/r/1415003464-29239-6-git-send-email-boris.brezillon@free-electrons.comSigned-off-by:
Jason Cooper <jason@lakedaemon.net>
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Boris BREZILLON authored
Rename at91sam9_aic_irq_fixup into at91rm9200_aic_irq_fixup to be consistent with other fixup functions. Signed-off-by:
Boris BREZILLON <boris.brezillon@free-electrons.com> Link: https://lkml.kernel.org/r/1415003464-29239-5-git-send-email-boris.brezillon@free-electrons.comSigned-off-by:
Jason Cooper <jason@lakedaemon.net>
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Boris BREZILLON authored
The at91sam9g45 and at91sam9rl SoCs embed one RTT (Real Time Timer) and one RTC block and thus need to call both rtt and rtc fixup functions. Signed-off-by:
Boris BREZILLON <boris.brezillon@free-electrons.com> Link: https://lkml.kernel.org/r/1415003464-29239-4-git-send-email-boris.brezillon@free-electrons.comSigned-off-by:
Jason Cooper <jason@lakedaemon.net>
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Boris BREZILLON authored
The at91sam9260, at91sam9261, at91sam9263 and at91sam9g20 embed an RTT (Real Time Timer) block and thus need to call the aic_common_rtt_irq_fixup function. Signed-off-by:
Boris BREZILLON <boris.brezillon@free-electrons.com> Link: https://lkml.kernel.org/r/1415003464-29239-3-git-send-email-boris.brezillon@free-electrons.comSigned-off-by:
Jason Cooper <jason@lakedaemon.net>
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Boris BREZILLON authored
Signed-off-by:
Boris BREZILLON <boris.brezillon@free-electrons.com> Link: https://lkml.kernel.org/r/1415003464-29239-2-git-send-email-boris.brezillon@free-electrons.comSigned-off-by:
Jason Cooper <jason@lakedaemon.net>
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Kevin Cernekee authored
This effectively converts the __raw_ accessors to the non-__raw_ equivalents. To handle BE, we pass IRQ_GC_BE_IO, similar to what was done in irq-bcm7120-l2.c. Since irq_reg_writel now takes an irq_chip_generic argument, writel must be used for the initial hardware reset in the probe function. But that operation never needs endian swapping, so it's probably not a big deal. Signed-off-by:
Kevin Cernekee <cernekee@gmail.com> Acked-by:
Arnd Bergmann <arnd@arndb.de> Link: https://lkml.kernel.org/r/1415342669-30640-15-git-send-email-cernekee@gmail.comSigned-off-by:
Jason Cooper <jason@lakedaemon.net>
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Kevin Cernekee authored
On BE MIPS systems this needs to use the new IRQ_GC_BE_IO gc_flag. In all other cases it will use the standard readl/writel accessors. The initial irq_fwd_mask setup runs before "gc" is initialized, so it is unchanged for now. This could potentially be a problem on an ARM system that boots in LE mode but runs a BE kernel, but currently none of the supported ARM platforms are ever expected to run BE. Signed-off-by:
Kevin Cernekee <cernekee@gmail.com> Acked-by:
Arnd Bergmann <arnd@arndb.de> Link: https://lkml.kernel.org/r/1415342669-30640-14-git-send-email-cernekee@gmail.comSigned-off-by:
Jason Cooper <jason@lakedaemon.net>
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Kevin Cernekee authored
Some chips, such as BCM6328, only require bcm7120-l2. Some BCM7xxx STB configurations only require brcmstb-l2. Treat them as two separate entities, and update the mach-bcm dependencies to reflect the change. Signed-off-by:
Kevin Cernekee <cernekee@gmail.com> Acked-by:
Arnd Bergmann <arnd@arndb.de> Acked-by:
Florian Fainelli <f.fainelli@gmail.com> Link: https://lkml.kernel.org/r/1415342669-30640-13-git-send-email-cernekee@gmail.comSigned-off-by:
Jason Cooper <jason@lakedaemon.net>
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Kevin Cernekee authored
Most implementations of the bcm7120-l2 controller only have a single 32-bit enable word + 32-bit status word. But some instances have added more enable/status pairs in order to support 64+ IRQs (which are all ORed into one parent IRQ input). Make the following changes to allow the driver to support this: - Extend DT bindings so that multiple words can be specified for the reg property, various masks, etc. - Add loops to the probe/handle functions to deal with each word separately - Allocate 1 generic-chip for every 32 IRQs, so we can still use the clr/set helper functions - Update the documentation This uses one domain per bcm7120-l2 DT node. If the DT node defines multiple enable/status pairs (i.e. >=64 IRQs) then the driver will create a single IRQ domain with 2+ generic chips. Multiple generic chips are required because the generic-chip code can only handle one enable/status register pair per instance. Signed-off-by:
Kevin Cernekee <cernekee@gmail.com> Acked-by:
Arnd Bergmann <arnd@arndb.de> Link: https://lkml.kernel.org/r/1415342669-30640-12-git-send-email-cernekee@gmail.comSigned-off-by:
Jason Cooper <jason@lakedaemon.net>
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Kevin Cernekee authored
The cached value already incorporates irq_fwd_mask, and was saved the last time an IRQ was enabled/disabled. Signed-off-by:
Kevin Cernekee <cernekee@gmail.com> Acked-by:
Florian Fainelli <f.fainelli@gmail.com> Acked-by:
Arnd Bergmann <arnd@arndb.de> Link: https://lkml.kernel.org/r/1415342669-30640-11-git-send-email-cernekee@gmail.comSigned-off-by:
Jason Cooper <jason@lakedaemon.net>
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Kevin Cernekee authored
This mask should have been 0xffff_ffff, not 0x0fff_ffff. The change should not have an effect on current users (STB) because bits 31:27 are unused. Signed-off-by:
Kevin Cernekee <cernekee@gmail.com> Acked-by:
Arnd Bergmann <arnd@arndb.de> Acked-by:
Florian Fainelli <f.fainelli@gmail.com> Link: https://lkml.kernel.org/r/1415342669-30640-10-git-send-email-cernekee@gmail.comSigned-off-by:
Jason Cooper <jason@lakedaemon.net>
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Kevin Cernekee authored
A couple of accesses to IRQEN (base+0x00) just used "base" directly, so they would break if IRQEN ever became nonzero. Make sure that all reads/writes specify the register offset constant. Signed-off-by:
Kevin Cernekee <cernekee@gmail.com> Acked-by:
Florian Fainelli <f.fainelli@gmail.com> Acked-by:
Arnd Bergmann <arnd@arndb.de> Link: https://lkml.kernel.org/r/1415342669-30640-9-git-send-email-cernekee@gmail.comSigned-off-by:
Jason Cooper <jason@lakedaemon.net>
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Kevin Cernekee authored
This can compile for MIPS (or anything else) now. Signed-off-by:
Kevin Cernekee <cernekee@gmail.com> Acked-by:
Arnd Bergmann <arnd@arndb.de> Acked-by:
Florian Fainelli <f.fainelli@gmail.com> Link: https://lkml.kernel.org/r/1415342669-30640-8-git-send-email-cernekee@gmail.comSigned-off-by:
Jason Cooper <jason@lakedaemon.net>
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Kevin Cernekee authored
This check may be prone to race conditions, e.g. 1) Some external event (e.g. GPIO level) causes an IRQ to become pending 2) Peripheral asserts the L2 IRQ 3) CPU takes an interrupt 4) The event from #1 goes away 5) bcm7120_l2_intc_irq_handle() reads back a 0 status Unlike the hardware supported by brcmstb-l2, the bcm7120-l2 controller does not latch the IRQ status. Bits can change if the inputs to the controller change. Also, do_bad_IRQ() is an ARM-specific macro. So let's just nuke it. Signed-off-by:
Kevin Cernekee <cernekee@gmail.com> Acked-by:
Florian Fainelli <f.fainelli@gmail.com> Acked-by:
Arnd Bergmann <arnd@arndb.de> Link: https://lkml.kernel.org/r/1415342669-30640-7-git-send-email-cernekee@gmail.comSigned-off-by:
Jason Cooper <jason@lakedaemon.net>
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Kevin Cernekee authored
The irq-brcmstb-l2 driver has a single dependency on the ARM code, the do_bad_IRQ macro. Expand this macro in-place so that the driver can be built on non-ARM platforms. Signed-off-by:
Kevin Cernekee <cernekee@gmail.com> Acked-by:
Arnd Bergmann <arnd@arndb.de> Acked-by:
Florian Fainelli <f.fainelli@gmail.com> Link: https://lkml.kernel.org/r/1415342669-30640-6-git-send-email-cernekee@gmail.comSigned-off-by:
Jason Cooper <jason@lakedaemon.net>
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Kevin Cernekee authored
Use io{read,write}32be if the caller specified IRQ_GC_BE_IO when creating the irqchip. Signed-off-by:
Kevin Cernekee <cernekee@gmail.com> Acked-by:
Thomas Gleixner <tglx@linutronix.de> Acked-by:
Acked-by: Arnd Bergmann <arnd@arndb.de> Link: https://lkml.kernel.org/r/1415342669-30640-5-git-send-email-cernekee@gmail.comSigned-off-by:
Jason Cooper <jason@lakedaemon.net>
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Kevin Cernekee authored
Currently, these I/O accessors always assume little endian 32-bit registers (readl/writel). On some systems the IRQ registers need to be accessed in BE mode or using 16-bit loads/stores, so we will provide a way to override the default behavior. Signed-off-by:
Kevin Cernekee <cernekee@gmail.com> Acked-by:
Thomas Gleixner <tglx@linutronix.de> Acked-by:
Acked-by: Arnd Bergmann <arnd@arndb.de> Link: https://lkml.kernel.org/r/1415342669-30640-4-git-send-email-cernekee@gmail.comSigned-off-by:
Jason Cooper <jason@lakedaemon.net>
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Kevin Cernekee authored
Pass in the irq_chip_generic struct so we can use different readl/writel settings for each irqchip driver, when appropriate. Compute (gc->reg_base + reg_offset) in the helper function because this is pretty much what all callers want to do anyway. Compile-tested using the following configurations: at91_dt_defconfig (CONFIG_ATMEL_AIC_IRQ=y) sama5_defconfig (CONFIG_ATMEL_AIC5_IRQ=y) sunxi_defconfig (CONFIG_ARCH_SUNXI=y) tb10x (ARC) is untested. Signed-off-by:
Kevin Cernekee <cernekee@gmail.com> Acked-by:
Thomas Gleixner <tglx@linutronix.de> Acked-by:
Acked-by: Arnd Bergmann <arnd@arndb.de> Link: https://lkml.kernel.org/r/1415342669-30640-3-git-send-email-cernekee@gmail.comSigned-off-by:
Jason Cooper <jason@lakedaemon.net>
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Thomas Petazzoni authored
The ->set_affinity() hook of 'struct irq_chip' is supposed to return one of IRQ_SET_MASK_OK or IRQ_SET_MASK_OK_NOCOPY. However, the code currently simply returns 0. This patch fixes that by using IRQ_SET_MASK_OK, which tells the IRQ core that it is responsible for updating irq_data.affinity. Note that this patch does not cause any change to the compiled code, as IRQ_SET_MASK_OK has the value 0. This is therefore just a simple cleanup. Signed-off-by:
Thomas Petazzoni <thomas.petazzoni@free-electrons.com> Cc: Thomas Gleixner <tglx@linutronix.de> Cc: Jason Cooper <jason@lakedaemon.net> Cc: linux-kernel@vger.kernel.org Reviewed-by:
Gregory CLEMENT <gregory.clement@free-electrons.com> Link: https://lkml.kernel.org/r/1414151970-6626-4-git-send-email-thomas.petazzoni@free-electrons.comSigned-off-by:
Jason Cooper <jason@lakedaemon.net>
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- 02 Nov, 2014 2 commits
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Jisheng Zhang authored
The dw-apb-ictl driver uses the generic-chip functions. Thus it needs to select GENERIC_IRQ_CHIP in Kconfig. Signed-off-by:
Jisheng Zhang <jszhang@marvell.com> Link: https://lkml.kernel.org/r/1413982750-832-1-git-send-email-jszhang@marvell.comSigned-off-by:
Jason Cooper <jason@lakedaemon.net>
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Marc Zyngier authored
The HIP04 GIC-like irqchip escaped the conversion to handle_domain_irq. Let's give it the treatment it deserves. Cc: Haojian Zhuang <haojian.zhuang@linaro.org> Cc: Jason Cooper <jason@lakedaemon.net> Signed-off-by:
Marc Zyngier <marc.zyngier@arm.com> Link: https://lkml.kernel.org/r/1413882576-18922-1-git-send-email-marc.zyngier@arm.comSigned-off-by:
Jason Cooper <jason@lakedaemon.net>
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- 01 Nov, 2014 2 commits
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Evgeniy Dushistov authored
The problem is that hardware handled by arm/plat-orion/gpio.c, require ack for edge irq, and no ack for level irq. The code handle this issue, by two "struct irq_chip_type" per one "struct irq_chip_generic". For one "struct irq_chip_generic" irq_ack pointer is setted, for another it is NULL. But we have only one mask_cache per two "struct irq_chip_type". So if we 1)unmask interrupt A for "edge type" trigger, 2)unmask interrupt B for "level type" trigger, 3)unmask interrupt C for "edge type", we, because of usage of generic irq_gc_mask_clr_bit/irq_gc_mask_set_bit, have hardware configured to trigger interrupt B on "edge type", because of shared mask_cache. But kernel think that B is "level type", so when interrupt B occur via "edge" reason, we don't ack it, and B triggered again and again. Signed-off-by:
Evgeniy A. Dushistov <dushistov@mail.ru> Link: https://lkml.kernel.org/r/20140726155659.GA22977@fifteenSigned-off-by:
Jason Cooper <jason@lakedaemon.net>
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Andrew Lunn authored
A second product has come to light which makes use of the A0 stepping of the Armada XP SoC. A0 stepping has a hardware bug in the i2c core meaning that hardware offload does not work, resulting in the kernel failing to boot. The quirk detects that the kernel is running on an A0 stepping SoC and disables the use of hardware offload. Currently the quirk is only enabled for PlatHome Openblocks AX3. The AX3 has been produced with both A0 and B0 stepping SoCs. The second product is the Lenovo Iomega IX4-300d. It seems likely that this device will also swap from A0 to B0 SoC sometime during its life. If there are two products using A0, it seems likely there are more products with A0. Also, since the number of A0 SoCs is limited, these products are also likely to transition to B0. Hence detecting at run time is the safest option. So enable the quirk for all Armada XP boards. Tested on an AX3 with A0 stepping. Signed-off-by:
Andrew Lunn <andrew@lunn.ch> Acked-by:
Gregory CLEMENT <gregory.clement@free-electrons.com> Acked-by:
Thomas Petazzoni <thomas.petazzoni@free-electrons.com> Cc: stable@vger.kernel.org # v3.12+ Fixes: 930ab3d4: ("i2c: mv64xxx: Add I2C Transaction Generator support") Link: https://lkml.kernel.org/r/1406395238-29758-2-git-send-email-andrew@lunn.chSigned-off-by:
Jason Cooper <jason@lakedaemon.net>
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- 20 Oct, 2014 2 commits
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Linus Torvalds authored
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git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-socLinus Torvalds authored
Pull ARM SoC fixes from Olof Johansson: "A batch of fixes that have come in during the merge window. Some of them are defconfig updates for things that have now landed, some errata additions and a few general scattered fixes. There's also a qcom DT update that adds support for SATA on AP148, and basic support for Sony Xperia Z1 and CM-QS600 platforms that seemed isolated enough that we could merge it even if it's late" * tag 'arm-soc-fixes-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: MAINTAINERS: corrected bcm2835 search ARM: dts: Explicitly set dr_mode on exynos5420-arndale-octa ARM: dts: Explicitly set dr_mode on exynos Peach boards ARM: dts: qcom: add CM-QS600 board ARM: dts: qcom: Add initial DTS file for Sony Xperia Z1 phone ARM: dts: qcom: Add SATA support on IPQ8064/AP148 MAINTAINERS: Update Santosh Shilimkar's email id ARM: sunxi_defconfig: enable CONFIG_REGULATOR ARM: dts: Disable smc91x on n900 until bootloader dependency is removed ARM: omap2plus_defconfig: Enable ARM erratum 430973 for omap3 ARM: exynos_defconfig: enable USB gadget support ARM: exynos_defconfig: Enable Maxim 77693 and I2C GPIO drivers ARM: mm: Fix ifdef around cpu_*_do_[suspend, resume] ops ARM: EXYNOS: Fix build with PM_SLEEP=n and ARM_EXYNOS_CPUIDLE=n ARM: SAMSUNG: Restore Samsung PM Debug functionality ARM: dts: Fix pull setting in sd4_width8 pin group for exynos4x12 ARM: exynos_defconfig: Enable SBS battery support ARM: exynos_defconfig: Enable Control Groups support ARM: exynos_defconfig: Enable Atmel maXTouch support ARM: exynos_defconfig: Enable MAX77802
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- 19 Oct, 2014 9 commits
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git://git.infradead.org/users/eparis/auditLinus Torvalds authored
Pull audit updates from Eric Paris: "So this change across a whole bunch of arches really solves one basic problem. We want to audit when seccomp is killing a process. seccomp hooks in before the audit syscall entry code. audit_syscall_entry took as an argument the arch of the given syscall. Since the arch is part of what makes a syscall number meaningful it's an important part of the record, but it isn't available when seccomp shoots the syscall... For most arch's we have a better way to get the arch (syscall_get_arch) So the solution was two fold: Implement syscall_get_arch() everywhere there is audit which didn't have it. Use syscall_get_arch() in the seccomp audit code. Having syscall_get_arch() everywhere meant it was a useless flag on the stack and we could get rid of it for the typical syscall entry. The other changes inside the audit system aren't grand, fixed some records that had invalid spaces. Better locking around the task comm field. Removing some dead functions and structs. Make some things static. Really minor stuff" * git://git.infradead.org/users/eparis/audit: (31 commits) audit: rename audit_log_remove_rule to disambiguate for trees audit: cull redundancy in audit_rule_change audit: WARN if audit_rule_change called illegally audit: put rule existence check in canonical order next: openrisc: Fix build audit: get comm using lock to avoid race in string printing audit: remove open_arg() function that is never used audit: correct AUDIT_GET_FEATURE return message type audit: set nlmsg_len for multicast messages. audit: use union for audit_field values since they are mutually exclusive audit: invalid op= values for rules audit: use atomic_t to simplify audit_serial() kernel/audit.c: use ARRAY_SIZE instead of sizeof/sizeof[0] audit: reduce scope of audit_log_fcaps audit: reduce scope of audit_net_id audit: arm64: Remove the audit arch argument to audit_syscall_entry arm64: audit: Add audit hook in syscall_trace_enter/exit() audit: x86: drop arch from __audit_syscall_entry() interface sparc: implement is_32bit_task sparc: properly conditionalize use of TIF_32BIT ...
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Olof Johansson authored
Merge tag 'qcom-dt-for-3.18-3' of git://git.kernel.org/pub/scm/linux/kernel/git/galak/linux-qcom into fixes Merge "qcom DT changes for v3.18-3" from Kumar Gala: Qualcomm ARM Based Device Tree Updates for v3.18-3 * Added Board support for CM-QS600 and Sony Xperia Z1 phone * Added SATA support on IPQ8064/AP148 * tag 'qcom-dt-for-3.18-3' of git://git.kernel.org/pub/scm/linux/kernel/git/galak/linux-qcom: ARM: dts: qcom: add CM-QS600 board ARM: dts: qcom: Add initial DTS file for Sony Xperia Z1 phone ARM: dts: qcom: Add SATA support on IPQ8064/AP148
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Olof Johansson authored
Merge tag 'samsung-fixes-2' of git://git.kernel.org/pub/scm/linux/kernel/git/kgene/linux-samsung into fixes Pull more fixes from Kukjin Kim: 2nd Samsung fixes for v3.18 - Explicitly set dr_mode on exynos5800-peach-pi, exynos5420-peach-pit and exynos5420-arndale-octa boards, because the USB dwc3 controller will not work properly without dr_mode as host on above boards if the USB host and gadget are enabled in kernel configuration both. * tag 'samsung-fixes-2' of git://git.kernel.org/pub/scm/linux/kernel/git/kgene/linux-samsung: ARM: dts: Explicitly set dr_mode on exynos5420-arndale-octa ARM: dts: Explicitly set dr_mode on exynos Peach boards Signed-off-by:
Olof Johansson <olof@lixom.net>
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Scott Branden authored
Corrected bcm2835 maintainer info by using N: to specify any files with bcm2835 in are directed to the proper maintainer. Also corrected minor mispelling of ARCHITECTURE in 2 comment locations. Signed-off-by:
Scott Branden <sbranden@broadcom.com> Signed-off-by:
Stephen Warren <swarren@wwwdotorg.org> Signed-off-by:
Olof Johansson <olof@lixom.net>
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git://github.com/jonmason/ntbLinus Torvalds authored
Pull ntb (non-transparent bridge) updates from Jon Mason: "Add support for Haswell NTB split BARs, a debugfs entry for basic debugging info, and some code clean-ups" * tag 'ntb-3.18' of git://github.com/jonmason/ntb: ntb: Adding split BAR support for Haswell platforms ntb: use errata flag set via DID to implement workaround ntb: conslidate reading of PPD to move platform detection earlier ntb: move platform detection to separate function NTB: debugfs device entry
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git://git.kernel.org/pub/scm/linux/kernel/git/wsa/linuxLinus Torvalds authored
Pull i2c updates from Wolfram Sang: "Highlights from the I2C subsystem for 3.18: - new drivers for Axxia AM55xx, and Hisilicon hix5hd2 SoC. - designware driver gained AMD support, exynos gained exynos7 support The rest is usual driver stuff. Hopefully no lowlights this time" * 'i2c/for-next' of git://git.kernel.org/pub/scm/linux/kernel/git/wsa/linux: i2c: i801: Add Device IDs for Intel Sunrise Point PCH i2c: hix5hd2: add i2c controller driver i2c-imx: Disable the clock on probe failure i2c: designware: Add support for AMD I2C controller i2c: designware: Rework probe() to get clock a bit later i2c: designware: Default to fast mode in case of ACPI i2c: axxia: Add I2C driver for AXM55xx i2c: exynos: add support for HSI2C module on Exynos7 i2c: mxs: detect No Slave Ack on SELECT in PIO mode i2c: cros_ec: Remove EC_I2C_FLAG_10BIT i2c: cros-ec-tunnel: Add of match table i2c: rcar: remove sign-compare flaw i2c: ismt: Use minimum descriptor size i2c: imx: Add arbitration lost check i2c: rk3x: Remove unlikely() annotations i2c: rcar: check for no IRQ in rcar_i2c_irq() i2c: rcar: make rcar_i2c_prepare_msg() *void* i2c: rcar: simplify check for last message i2c: designware: add support of platform data to set I2C mode i2c: designware: add support of I2C standard mode
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git://git.kernel.org/pub/scm/linux/kernel/git/tiwai/soundLinus Torvalds authored
Pull sound fixes from Takashi Iwai: "Here are a collection of small fixes after 3.18 merge. The urgent one is the fix for kernel panics with linked PCM substream triggered by the recent nonatomic PCM ops support. Other two fixes (emu10k1 and bebob) are stable fixes, and one easy PCI ID addition for a new Intel HD-audio controller" * tag 'sound-fix-3.18-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/tiwai/sound: ALSA: hda_intel: Add Device IDs for Intel Sunrise Point PCH ALSA: emu10k1: Fix deadlock in synth voice lookup ALSA: pcm: Fix referred substream in snd_pcm_action_group() unlock loop ALSA: bebob: Fix failure to detect source of clock for Terratec Phase 88
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git://git.kernel.org/pub/scm/linux/kernel/git/dtor/inputLinus Torvalds authored
Pull second round of input updates from Dmitry Torokhov: "Mostly simple bug fixes, although we do have one brand new driver for Microchip AR1021 i2c touchscreen. Also there is the change to stop trying to use i8042 active multiplexing by default (it is still possible to activate it via i8042.nomux=0 on boxes that implement it)" * 'for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/dtor/input: Input: xpad - add Thrustmaster as Xbox 360 controller vendor Input: xpad - add USB ID for Thrustmaster Ferrari 458 Racing Wheel Input: max77693-haptic - fix state check in imax77693_haptic_disable() Input: xen-kbdfront - free grant table entry in xenkbd_disconnect_backend Input: alps - fix v4 button press recognition Input: i8042 - disable active multiplexing by default Input: i8042 - add noloop quirk for Asus X750LN Input: synaptics - gate forcepad support by DMI check Input: Add Microchip AR1021 i2c touchscreen Input: cros_ec_keyb - add of match table Input: serio - avoid negative serio device numbers Input: avoid negative input device numbers Input: automatically set EV_ABS bit in input_set_abs_params Input: adp5588-keys - cancel workqueue in failure path Input: opencores-kbd - switch to using managed resources Input: evdev - fix EVIOCG{type} ioctl
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git://git.kernel.org/pub/scm/linux/kernel/git/roland/infinibandLinus Torvalds authored
Pull infiniband/RDMA updates from Roland Dreier: - large set of iSER initiator improvements - hardware driver fixes for cxgb4, mlx5 and ocrdma - small fixes to core midlayer * tag 'rdma-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/roland/infiniband: (47 commits) RDMA/cxgb4: Fix ntuple calculation for ipv6 and remove duplicate line RDMA/cxgb4: Add missing neigh_release in find_route RDMA/cxgb4: Take IPv6 into account for best_mtu and set_emss RDMA/cxgb4: Make c4iw_wr_log_size_order static IB/core: Fix XRC race condition in ib_uverbs_open_qp IB/core: Clear AH attr variable to prevent garbage data RDMA/ocrdma: Save the bit environment, spare unncessary parenthesis RDMA/ocrdma: The kernel has a perfectly good BIT() macro - use it RDMA/ocrdma: Don't memset() buffers we just allocated with kzalloc() RDMA/ocrdma: Remove a unused-label warning RDMA/ocrdma: Convert kernel VA to PA for mmap in user RDMA/ocrdma: Get vlan tag from ib_qp_attrs RDMA/ocrdma: Add default GID at index 0 IB/mlx5, iser, isert: Add Signature API additions Target/iser: Centralize ib_sig_domain setting IB/iser: Centralize ib_sig_domain settings IB/mlx5: Use extended internal signature layout IB/iser: Set IP_CSUM as default guard type IB/iser: Remove redundant assignment IB/mlx5: Use enumerations for PI copy mask ...
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