- 15 Dec, 2021 7 commits
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Bjorn Andersson authored
v5.16-rc1 + 20211207114003.100693-2-vkoul@kernel.org The immutable branch contains DT binding and in defines for the global clock controller registers used the the Qualcomm SM8450 dtsi.
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Konrad Dybcio authored
This reverts commit ed9500c1. The clock-frequency property was meant to aid platforms with broken firmwares that don't set up the timer properly on their own. Don't include it where it is not the case. Signed-off-by:
Konrad Dybcio <konrad.dybcio@somainline.org> Signed-off-by:
Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/20211202004328.459899-1-konrad.dybcio@somainline.org
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Srinivas Kandagatla authored
Add MBHC support available in WCD934X codec. Signed-off-by:
Srinivas Kandagatla <srinivas.kandagatla@linaro.org> Tested-by:
Steev Klimaszewski <steev@kali.org> Signed-off-by:
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Srinivas Kandagatla authored
Currently Soundcard has 1 rx device for headset and SoundWire Speaker Playback. This setup has issues, ex if we try to play on headset the audio stream is also sent to SoundWire Speakers and we will hear sound in both headsets and speakers. Make a separate device for Speakers and Headset so that the streams are different and handled properly. Fixes: 45021d35 ("arm64: dts: qcom: c630: Enable audio support") Signed-off-by:
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Katherine Perez authored
This is a minimal devicetree for Microsoft Surface Duo 2 with SM8350 Chipset Signed-off-by:
Katherine Perez <kaperez@linux.microsoft.com> Signed-off-by:
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Caleb Connolly authored
The msm-id and board-id can be used to select the correct dtb when multiple are provided to the bootloader. Multiple DTBs can be provided on sdm845 devices using boot image header v1 by appending them all to the kernel image before creating the boot image. The bootloader then selects them like this: Best match DTB tags 321/00000008/0x00000000/20001/20014/20115/20018/0/(offset)0x79998E27/(size)0x000173CD Using pmic info 0x20014/0x20115/0x20018/0x0 for device 0x20014/0x20115/0x20018/0x0 Signed-off-by:
Caleb Connolly <caleb.connolly@linaro.org> Signed-off-by:
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Vinod Koul authored
Add device tree bindings for global clock controller on SM8450 SoCs. Signed-off-by:
Vinod Koul <vkoul@kernel.org> Reviewed-by:
Stephen Boyd <sboyd@kernel.org> Signed-off-by:
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- 13 Dec, 2021 6 commits
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Luca Weiss authored
Enable the remoteprocs found on the SoC and add a qcom,rmtfs-mem node. Signed-off-by:
Luca Weiss <luca.weiss@fairphone.com> Reviewed-by:
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Luca Weiss authored
Add the required nodes for booting the CDSP on sm6350. Signed-off-by:
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Luca Weiss authored
Add the required nodes for booting the ADSP on sm6350. Signed-off-by:
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Luca Weiss authored
Add the required nodes for booting the MPSS on sm6350. Signed-off-by:
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Luca Weiss authored
Sort clocks and interrupts as specified in the docs and remove the stray property #power-domain-cells from aoss_qmp to solve dtbs_check validation errors. Signed-off-by:
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Julian Ribbeck authored
Samsung J5 2015 is a MSM8916 based Smartphone. It is similar to some of the other MSM8916 devices, especially the Samsung ones. With this patch initial support for the following is added: - eMMC/SD card - Buttons - USB (although no suiting MUIC driver currently) - UART (untested for lack of equipment) - WiFi/Bluetooth (WCNSS) It is worth noting that Samsung J5 with MSM8916 exists in different generations (e.g Samsung J5 2015 and Samsung J5 2016) which each have different models (e.g. samsung-j5nlte, samsung-j5xnlte, etc). This patch is only regarding the 2015 generation, but should work with all of it's models, as far as we could test. Co-developed-by:
Stephan Gerhold <stephan@gerhold.net> Signed-off-by:
Julian Ribbeck <julian.ribbeck@gmx.de> Signed-off-by:
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- 01 Dec, 2021 11 commits
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Dmitry Baryshkov authored
Change sdhcN aliases to mmcN to make them actually work. Currently the board uses non-standard aliases sdhcN, which do not work, resulting in mmc0 and mmc1 hosts randomly changing indices between boots. Fixes: c4da5a56 ("arm64: dts: qcom: Add msm8916 sdhci configuration nodes") Signed-off-by:
Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Signed-off-by:
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Martin Botka authored
Add RPM Power Domains to internal eMMC and SDCard. Signed-off-by:
Martin Botka <martin.botka@somainline.org> Signed-off-by:
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Martin Botka authored
Add RPM Power Distribution node for sm6125 SoC. Signed-off-by:
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Kshitiz Godara authored
Add Touchscreen and touchpad hid-over-i2c node for the sc7280 CRD board Signed-off-by:
Kshitiz Godara <kgodara1@codeaurora.org> Signed-off-by:
Rajendra Nayak <quic_rjendra@quicinc.com> Reviewed-by:
Matthias Kaehlcke <mka@chromium.org> Signed-off-by:
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Kshitiz Godara authored
The IDP2 and CRD boards share the EC and H1 parts, so define all related device nodes into a common file and include them in the idp2 and crd dts files to avoid duplication. Signed-off-by:
Kshitiz Godara <kgodara@codeaurora.org> Signed-off-by:
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Rajendra Nayak authored
CRD (Compute Reference Design) is a sc7280 based board, largely derived from the existing IDP board design with some key deltas 1. has EC and H1 over SPI similar to IDP2 2. touchscreen and trackpad support 3. eDP display We just add the barebones dts file here, subsequent patches will add support for EC/H1 and other components. Signed-off-by:
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Rajendra Nayak authored
Document the qcom,sc7280-crd board based off sc7280 SoC, The board is also known as hoglin in the Chrome OS builds, so document the google,hoglin compatible as well. Signed-off-by:
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Dang Huynh authored
This property doesn't seem to exist in the documentation nor in source code, but for some reason it is defined in a bunch of device trees. Signed-off-by:
Dang Huynh <danct12@riseup.net> Signed-off-by:
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Dang Huynh authored
This enables the volume up key. Signed-off-by:
Alexey Minnekhanov <alexeymin@postmarketos.org> Signed-off-by:
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Stephan Gerhold authored
MSM8916 is similar to the other SoCs that had the RPM stats node added in commit 290bc684 ("arm64: dts: qcom: Enable RPM Sleep stats"). However, the dynamic offset readable at 0x14 seems only available on some of the newer firmware versions. To be absolutely sure, make use of the new qcom,msm8916-rpm-stats compatible that reads the sleep stats from a fixed offset of 0xdba0. Statistics are available for a "vmin" and "xosd" low power mode: $ cat /sys/kernel/debug/qcom_stats/vmin Count: 0 Last Entered At: 0 Last Exited At: 0 Accumulated Duration: 0 Client Votes: 0x0 $ cat /sys/kernel/debug/qcom_stats/xosd Count: 0 Last Entered At: 0 Last Exited At: 0 Accumulated Duration: 0 Client Votes: 0x0 Cc: Maulik Shah <mkshah@codeaurora.org> Signed-off-by:
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Thara Gopinath authored
Add OPP tables to scale DDR and L3 with CPUs for SM8250 SoCs. Signed-off-by:
Thara Gopinath <thara.gopinath@linaro.org> Reviewed-by:
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- 20 Nov, 2021 16 commits
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Alexey Min authored
Enable and configure DWC3 and QUSB2 PHY to enable USB functionality on the Redmi Note 7. Signed-off-by:
Alexey Min <alexey.min@gmail.com> Co-developed-by:
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Dang Huynh authored
This lets the user sees the framebuffer console. Reviewed-by:
Caleb Connolly <caleb@connolly.tech> Signed-off-by:
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Dang Huynh authored
This commit enable the SD card slot and internal MMC. Signed-off-by:
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Dang Huynh authored
This enables the volume down key as well as the power button. Reviewed-by:
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Dang Huynh authored
Add most of the RPM PM660/PM660L regulators and the fixed ones, defining the common electrical part of this platform. Signed-off-by:
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Dang Huynh authored
It's not worth duplicating the same node over and over again, so let's keep the common bits in the pm660 DTSI, making only changing the status and keycode necessary. Also, disable RESIN/PWR by default just in case if there are devices that doesn't use them. Reviewed-by:
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Dang Huynh authored
This makes eMMC/SD device number consistent. Reviewed-by:
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Prasad Malisetty authored
Update interrupt-map parent address cells for sc7280 Similar to existing Qcom SoCs. Fixes: 92e0ee9f ("arm64: dts: qcom: sc7280: Add PCIe and PHY related nodes") Signed-off-by:
Prasad Malisetty <pmaliset@codeaurora.org> Reviewed-by:
Stephen Boyd <swboyd@chromium.org> Signed-off-by:
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Prasad Malisetty authored
Add pcie clock phandle for sc7280 SoC. Signed-off-by:
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Prasad Malisetty authored
Replace pcie_1_pipe-clk clock name with pcie_1_pipe_clk To match with dt binding. Fixes: ab7772de ("arm64: dts: qcom: SC7280: Add rpmhcc clock controller node") Signed-off-by:
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yangcong authored
When powering up the ps8640, we need to deassert PD right after we turn on the vdd33 regulator. Unfortunately, the vdd33 regulator takes some time (~4ms) to turn on. Add in the delay for the vdd33 regulator so that when the driver deasserts PD that the regulator has had time to ramp. Signed-off-by:
yangcong <yangcong5@huaqin.corp-partner.google.com> Reviewed-by:
Douglas Anderson <dianders@chromium.org> Signed-off-by:
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Konrad Dybcio authored
Configure the Last-Level Cache Controller for SM8350. Signed-off-by:
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Konrad Dybcio authored
Configure ADSP, CDSP, MPSS, SLPI and IPA on SoMC Sagami. Signed-off-by:
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Konrad Dybcio authored
Based on current driver availability, add either nodes or comments regarding peripherals connected via I2C/SPI. Signed-off-by:
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Konrad Dybcio authored
Add support for SONY Xperia 1 III (PDX215) and 5 III (PDX214) smartphones. Both are based on the SM8350 Sagami platform and feature some really high-end specs, such as: - 4K (1 III / PRO-I) / 1080p (5 III), 120Hz HDR OLED 10-bit panels - USB-C 3.1 with HDMI in (yes, phone as display!) and DP out - 5G - 8 or 12 gigs of ram, 128/256/512 gigs of storage - A 3.5mm headphone jack, a RGB notification LED and a uSD card slot :) - IP65/68 dust/water resistance - Dual front-firing speakers and a lot of microphones - Crazy complex camera hardware (especially on the PRO-I), which includes 4 cameras, an RGBIR sensor and a 3D iToF The aforementioned PRO-I (PDX217) is not supported in this patch, because even though it shares most of the code with 1 III, nobody really has it (yet?) This only adds basic support for booting to a USB shell with a bootloader-enabled display, support for all the awesome hardware listed above will (hopefully) come (hopefully) soon. In order to get a working boot image, you need to run (e.g. for 1 III): cat arch/arm64/boot/Image.gz arch/arm64/boot/dts/qcom/sm8350-sony-xperia-\ sagami-pdx215.dtb > .Image.gz-dtb mkbootimg \ --kernel .Image.gz-dtb \ --ramdisk some_initrd.img \ --pagesize 4096 \ --base 0x0 \ --kernel_offset 0x8000 \ --ramdisk_offset 0x1000000 \ --tags_offset 0x100 \ --cmdline "SOME_CMDLINE" \ --dtb_offset 0x1f00000 \ --header_version 1 \ --os_version 11 \ --os_patch_level 2021-10 \ # or newer -o boot.img-sony-xperia-pdx215 Then, you need to flash it on the device and get rid of all the vendor_boot/dtbo mess: fastboot flash boot boot.img-sony-xperia-pdx215 fastboot erase vendor_boot fastboot flash dtbo emptydtbo.img fastboot reboot Where emptydtbo.img is a tiny file that consists of 2 bytes (all zeroes), doing a "fastboot erase" won't cut it, the bootloader will go crazy and things will fall apart when it tries to overlay random bytes from an empty partition onto a perfectly good appended DTB. Signed-off-by:
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Konrad Dybcio authored
Assign the iommus property to allow access to QUP hosts that were not set up by the bootloader. Signed-off-by:
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