1. 23 Mar, 2017 24 commits
  2. 22 Mar, 2017 8 commits
  3. 21 Mar, 2017 8 commits
    • Tvrtko Ursulin's avatar
      drm/i915: Spinlocks in tasklets can use spin_(un)lock_irq · 9f7886d0
      Tvrtko Ursulin authored
      The tasklets callbacks are only called from tasklet context so
      it is safe do to this.
      Signed-off-by: default avatarTvrtko Ursulin <tvrtko.ursulin@intel.com>
      Cc: Chris Wilson <chris@chris-wilson.co.uk>
      Reviewed-by: default avatarChris Wilson <chris@chris-wilson.co.uk>
      Link: http://patchwork.freedesktop.org/patch/msgid/20170321105511.18269-1-tvrtko.ursulin@linux.intel.com
      9f7886d0
    • Chris Wilson's avatar
      drm/i915: Remove intel_ring.last_retired_head · fe085f13
      Chris Wilson authored
      Storing the position of the breadcrumb of the last retired request as
      a separate last_retired_head is superfluous as we always copy that into
      head prior to recalculation of the intel_ring.space.
      Signed-off-by: default avatarChris Wilson <chris@chris-wilson.co.uk>
      Reviewed-by: default avatarJoonas Lahtinen <joonas.lahtinen@linux.intel.com>
      Link: http://patchwork.freedesktop.org/patch/msgid/20170321102552.24357-1-chris@chris-wilson.co.uk
      fe085f13
    • Chris Wilson's avatar
      drm/i915/execlists: Split the atomic test_and_clear_bit for irq handler · 899f6204
      Chris Wilson authored
      Rather than impose the cost of a locked test before queuing a new
      request, reduce it to a simple test_bit() with a following clear_bit()
      prior to doing the CSB check. This ensure that if an interrupt does
      occur whilst reading from the CSB, we still detect it (the interrupt
      would trigger a rescheduling of the tasklet anyway).
      Signed-off-by: default avatarChris Wilson <chris@chris-wilson.co.uk>
      Link: http://patchwork.freedesktop.org/patch/msgid/20170321113320.2603-1-chris@chris-wilson.co.ukReviewed-by: default avatarTvrtko Ursulin <tvrtko.ursulin@intel.com>
      899f6204
    • Arnd Bergmann's avatar
      drm/i915: split out check for noncontiguous pfn range · 272bce17
      Arnd Bergmann authored
      We get a warning with gcc-7 about a pointless comparison when
      using a linear memmap:
      
      drivers/gpu/drm/i915/selftests/scatterlist.c: In function 'alloc_table':
      drivers/gpu/drm/i915/selftests/scatterlist.c:219:66: error: self-comparison always evaluates to false [-Werror=tautological-compare]
      
      Splitting out the comparison into a separate function avoids the warning
      and makes it slightly more obvious what happens.
      
      Fixes: 935a2f77 ("drm/i915: Add some selftests for sg_table manipulation")
      Signed-off-by: default avatarArnd Bergmann <arnd@arndb.de>
      Link: http://patchwork.freedesktop.org/patch/msgid/20170320094335.1266306-2-arnd@arndb.deReviewed-by: default avatarChris Wilson <chris@chris-wilson.co.uk>
      Signed-off-by: default avatarChris Wilson <chris@chris-wilson.co.uk>
      272bce17
    • Chris Wilson's avatar
      drm/i915: intel_engine_init_global_seqno() requires atomic kmap · 24caf655
      Chris Wilson authored
      As intel_engine_init_global_seqno() may be called by
      nop_submit_request() from inside irq context, we have to use atomic
      versions of kmap/kunmap. This is rare as this requires using gen8 legacy
      ringbuffer submission.
      Reported-by: default avatarTvrtko Ursulin <tvrtko.ursulin@intel.com>
      Signed-off-by: default avatarChris Wilson <chris@chris-wilson.co.uk>
      Cc: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
      Cc: Mika Kuoppala <mika.kuoppala@intel.com>
      Link: http://patchwork.freedesktop.org/patch/msgid/20170320145609.4898-1-chris@chris-wilson.co.ukReviewed-by: default avatarTvrtko Ursulin <tvrtko.ursulin@intel.com>
      24caf655
    • Chris Wilson's avatar
      drm/i915: Protect intel_engine_wakeup() for call from irq context · 467221bc
      Chris Wilson authored
      intel_engine_wakeup() is called by nop_request_submit() which is
      installed to handle third party fences completed from within irq
      context. As such, it needs the full irqsave/irqrestore and not the
      partial spin_irq_lock handling.
      
      [18942.714467] =================================
      [18942.719076] [ INFO: inconsistent lock state ]
      [18942.723522] 4.11.0-rc2-CI-CI_DRM_2368+ #1 Tainted: G     U  W
      [18942.729970] ---------------------------------
      [18942.734466] inconsistent {IN-SOFTIRQ-W} -> {SOFTIRQ-ON-W} usage.
      [18942.740594] gem_eio/1275 [HC0[0]:SC0[0]:HE1:SE1] takes:
      [18942.745932]  (&(&fence->lock)->rlock){+.?...}, at: [<ffffffff815ec100>] dma_fence_signal+0x100/0x
      230
      [18942.755331] {IN-SOFTIRQ-W} state was registered at:
      [18942.760356]   __lock_acquire+0x5d0/0x1bb0
      [18942.764444]   lock_acquire+0xc9/0x220
      [18942.768196]   _raw_spin_lock_irqsave+0x41/0x60
      [18942.772747]   dma_fence_signal+0x100/0x230
      [18942.776927]   vgem_fence_timeout+0x9/0x10 [vgem]
      [18942.781701]   call_timer_fn+0x92/0x380
      [18942.785557]   expire_timers+0x150/0x1f0
      [18942.789491]   run_timer_softirq+0x7c/0x160
      [18942.793705]   __do_softirq+0x116/0x4c0
      [18942.797560]   irq_exit+0xa9/0xc0
      [18942.800873]   smp_apic_timer_interrupt+0x38/0x50
      [18942.805611]   apic_timer_interrupt+0x90/0xa0
      [18942.810008]   cpuidle_enter_state+0x135/0x380
      [18942.814503]   cpuidle_enter+0x12/0x20
      [18942.818250]   call_cpuidle+0x1e/0x40
      [18942.821906]   do_idle+0x17e/0x1f0
      [18942.825333]   cpu_startup_entry+0x18/0x20
      [18942.829463]   rest_init+0x127/0x130
      [18942.833025]   start_kernel+0x3f1/0x3fe
      [18942.836908]   x86_64_start_reservations+0x2a/0x2c
      [18942.841733]   x86_64_start_kernel+0x173/0x186
      [18942.846234]   verify_cpu+0x0/0xfc
      [18942.849604] irq event stamp: 30568
      [18942.853140] hardirqs last  enabled at (30567): [<ffffffff8110b81f>] ktime_get+0xef/0x120
      [18942.861468] hardirqs last disabled at (30568): [<ffffffff81876377>] _raw_spin_lock_irqsave+0x17/0
      x60
      [18942.870812] softirqs last  enabled at (30462): [<ffffffff81085cd9>] __do_softirq+0x1d9/0x4c0
      [18942.879443] softirqs last disabled at (30439): [<ffffffff81086139>] irq_exit+0xa9/0xc0
      [18942.887616]
      [18942.887616] other info that might help us debug this:
      [18942.894279]  Possible unsafe locking scenario:
      [18942.894279]
      [18942.900336]        CPU0
      [18942.902851]        ----
      [18942.905362]   lock(&(&fence->lock)->rlock);
      [18942.909647]   <Interrupt>
      [18942.912330]     lock(&(&fence->lock)->rlock);
      [18942.916821]
      [18942.916821]  *** DEADLOCK ***
      [18942.916821]
      [18942.922862] 1 lock held by gem_eio/1275:
      [18942.926859]  #0:  (&(&fence->lock)->rlock){+.?...}, at: [<ffffffff815ec100>] dma_fence_signal+0x1
      00/0x230
      [18942.936651]
      [18942.936651] stack backtrace:
      [18942.941142] CPU: 3 PID: 1275 Comm: gem_eio Tainted: G     U  W       4.11.0-rc2-CI-CI_DRM_2368+ #
      1
      [18942.950367] Hardware name: Gigabyte Technology Co., Ltd. Z170X-UD5/Z170X-UD5-CF, BIOS F21 01/06/2
      017
      [18942.959756] Call Trace:
      [18942.962244]  dump_stack+0x67/0x92
      [18942.965626]  print_usage_bug.part.23+0x259/0x268
      [18942.970362]  mark_lock+0x12c/0x6f0
      [18942.973851]  ? check_usage_forwards+0x130/0x130
      [18942.978487]  mark_held_locks+0x6f/0xa0
      [18942.982329]  ? _raw_spin_unlock_irq+0x27/0x50
      [18942.986797]  trace_hardirqs_on_caller+0x150/0x200
      [18942.991599]  trace_hardirqs_on+0xd/0x10
      [18942.995515]  _raw_spin_unlock_irq+0x27/0x50
      [18942.999796]  intel_engine_wakeup+0x26/0x30 [i915]
      [18943.004670]  intel_engine_init_global_seqno+0x131/0x1a0 [i915]
      [18943.010745]  nop_submit_request+0x2e/0x40 [i915]
      [18943.015476]  submit_notify+0x3f/0x5c [i915]
      [18943.019763]  __i915_sw_fence_complete+0x176/0x220 [i915]
      [18943.025234]  ? try_to_del_timer_sync+0x4d/0x60
      [18943.029825]  i915_sw_fence_complete+0x25/0x40 [i915]
      [18943.034887]  dma_i915_sw_fence_wake+0x26/0x60 [i915]
      [18943.039959]  dma_fence_signal+0x146/0x230
      [18943.044109]  vgem_fence_signal_ioctl+0x6c/0xc0 [vgem]
      [18943.049275]  drm_ioctl+0x200/0x450
      [18943.052758]  ? vgem_fence_attach_ioctl+0x270/0x270 [vgem]
      [18943.058334]  do_vfs_ioctl+0x90/0x6e0
      [18943.061991]  ? entry_SYSCALL_64_fastpath+0x5/0xb1
      [18943.066843]  ? __this_cpu_preempt_check+0x13/0x20
      [18943.071643]  ? trace_hardirqs_on_caller+0xe7/0x200
      [18943.076532]  SyS_ioctl+0x3c/0x70
      [18943.079842]  entry_SYSCALL_64_fastpath+0x1c/0xb1
      [18943.084558] RIP: 0033:0x7f0dfcc14357
      [18943.088240] RSP: 002b:00007ffeb4628da8 EFLAGS: 00000246 ORIG_RAX: 0000000000000010
      [18943.095996] RAX: ffffffffffffffda RBX: ffffffff8147eb93 RCX: 00007f0dfcc14357
      [18943.103311] RDX: 00007ffeb4628de0 RSI: 0000000040086442 RDI: 0000000000000005
      [18943.110574] RBP: ffffc9000176ff88 R08: 0000000000000004 R09: 0000000000000000
      [18943.117845] R10: 0000000000000029 R11: 0000000000000246 R12: 0000000000000001
      [18943.125168] R13: 0000000000000005 R14: 0000000040086442 R15: 0000000000000000
      [18943.132520]  ? __this_cpu_preempt_check+0x13/0x20
      
      Fixes: cdc3a453 ("drm/i915: No need to save/restore irq status in intel_engine_wakeup")
      Signed-off-by: default avatarChris Wilson <chris@chris-wilson.co.uk>
      Cc: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
      Cc: Mika Kuoppala <mika.kuoppala@intel.com>
      Link: http://patchwork.freedesktop.org/patch/msgid/20170320143133.1507-1-chris@chris-wilson.co.ukReviewed-by: default avatarTvrtko Ursulin <tvrtko.ursulin@intel.com>
      467221bc
    • Tvrtko Ursulin's avatar
      drm/i915/guc: Correct the request_in tracepoint position · 66e303e9
      Tvrtko Ursulin authored
      It has to be called after the global seqno has been assigned.
      Signed-off-by: default avatarTvrtko Ursulin <tvrtko.ursulin@intel.com>
      Fixes: 31de7350 ("drm/i915/scheduler: emulate a scheduler for guc")
      Cc: Chris Wilson <chris@chris-wilson.co.uk>
      Cc: Tvrtko Ursulin <tvrtko.ursulin@linux.intel.com>
      Cc: Joonas Lahtinen <joonas.lahtinen@linux.intel.com>
      Cc: Michał Winiarski <michal.winiarski@intel.com>
      Cc: Daniel Vetter <daniel.vetter@intel.com>
      Cc: Jani Nikula <jani.nikula@linux.intel.com>
      Cc: intel-gfx@lists.freedesktop.org
      Reviewed-by: default avatarChris Wilson <chris@chris-wilson.co.uk>
      Link: http://patchwork.freedesktop.org/patch/msgid/20170320132556.29286-1-tvrtko.ursulin@linux.intel.com
      66e303e9
    • Shashank Sharma's avatar
      drm/edid: detect SCDC support in HF-VSDB · 62c58af3
      Shashank Sharma authored
      This patch does following:
      - Adds a new structure (drm_hdmi_info) in drm_display_info.
        This structure will be used to save and indicate if sink
        supports advanced HDMI 2.0 features
      - Adds another structure drm_scdc within drm_hdmi_info, to
        reflect scdc support and capabilities in connected HDMI 2.0 sink.
      - Checks the HF-VSDB block for presence of SCDC, and marks it
        in scdc structure
      - If SCDC is present, checks if sink is capable of generating
        SCDC read request, and marks it in scdc structure.
      
      V2: Addressed review comments
        Thierry:
        - Fix typos in commit message and make abbreviation consistent
          across the commit message.
        - Change structure object name from hdmi_info -> hdmi
        - Fix typos and abbreviations in description of structure drm_hdmi_info
          end the description with a full stop.
        - Create a structure drm_scdc, and keep all information related to SCDC
          register set (supported, read request supported) etc in it.
      
        Ville:
        - Change rr -> read_request
        - Call drm_detect_scrambling function drm_parse_hf_vsdb so that all
          of HF-VSDB parsing can be kept in same function, in incremental
          patches.
      
      V3: Rebase.
      V4: Rebase.
      V5: Rebase.
      V6: Addressed review comments from Ville
        - Add clock rate calculations for 1/10 and 1/40 ratios
        - Remove leftovers from old patchset
      V7: Added R-B from Jose.
      V8: Rebase.
      V9: Rebase.
      V10: Rebase.
      Signed-off-by: default avatarShashank Sharma <shashank.sharma@intel.com>
      Reviewed-by: default avatarThierry Reding <treding@nvidia.com>
      Reviewed-by: default avatarJose Abreu <joabreu@synopsys.com>
      Signed-off-by: default avatarJani Nikula <jani.nikula@intel.com>
      Link: http://patchwork.freedesktop.org/patch/msgid/1489404244-16608-5-git-send-email-shashank.sharma@intel.com
      62c58af3