Add initial support for the display found on the Samsung Galaxy 5 (klte)
phone. This is based on work from Jonathan Marek & Brian Masney.
Signed-off-by: Samuel Pascua <pascua.samuel.14@gmail.com>
[iskren.chernev@gmail.com: add reset gpio, regulators]
Signed-off-by: Iskren Chernev <iskren.chernev@gmail.com>
Link: https://lore.kernel.org/r/20210201105657.1642825-3-iskren.chernev@gmail.comSigned-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>

Enable adreno dt node.
Signed-off-by: Samuel Pascua <pascua.samuel.14@gmail.com>
[iskren.chernev@gmail.com: changes after v1]
Signed-off-by: Iskren Chernev <iskren.chernev@gmail.com>
Link: https://lore.kernel.org/r/20210201105657.1642825-2-iskren.chernev@gmail.comSigned-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>

Add support for the a3xx GPU. opp_table is chosen to include lower
frequencies common to all different msm8974 variants.
Signed-off-by: Brian Masney <masneyb@onstation.org>
[iskren.chernev@gmail.com: change after v1]
Signed-off-by: Iskren Chernev <iskren.chernev@gmail.com>
Link: https://lore.kernel.org/r/20210201105657.1642825-1-iskren.chernev@gmail.comSigned-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>

Since we now have driver for the SDHCI VQMMC LDO needed
for I/0 voltage levels lets introduce the necessary node for it.
Signed-off-by: Robert Marko <robert.marko@sartura.hr>
Cc: Luka Perkov <luka.perkov@sartura.hr>
Link: https://lore.kernel.org/r/20200907101937.10155-1-robert.marko@sartura.hrSigned-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>

While the DT parser recognizes "ok" as a valid value for the
"status" property, it is actually mentioned nowhere. Use the
proper value "okay" instead, as done in the majority of files
already.
Signed-off-by: Adrian Schmutzler <freifunk@adrianschmutzler.de>
Link: https://lore.kernel.org/r/20200830191643.20717-1-freifunk@adrianschmutzler.de
[bjorn: Rebased and included fixup of sdx55-mtp]
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>

This adds some additional DT labels which are handy when referring
to the nodes in derived DTS(I) files. It will also make the
definitions more consistent, e.g. by adding gsbi2_serial and
gsbi5_serial where we previously "only" had gsbi4_serial defined.

While at it, add missing spaces after some DT labels and remove one
useless empty line.
Signed-off-by: Adrian Schmutzler <freifunk@adrianschmutzler.de>
Link: https://lore.kernel.org/r/20200902165159.7733-1-freifunk@adrianschmutzler.deSigned-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>

This property appears to be commented out, so we can remove it
as well.
Signed-off-by: Adrian Schmutzler <freifunk@adrianschmutzler.de>
Link: https://lore.kernel.org/r/20200902165159.7733-2-freifunk@adrianschmutzler.deSigned-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>

ALFA Network AP120C-AC is a dual-band ceiling AP, based on Qualcomm
IPQ4018 + QCA8075 platform.

Specification:

- Qualcomm IPQ4018 (717 MHz)
- 256 MB of RAM (DDR3)
- 16 MB (SPI NOR) + 128 or 512 MB (SPI NAND) of flash
- 2x Gbps Ethernet, with 802.3af PoE support in one port
- 2T2R 2.4/5 GHz (IPQ4018), with ext. FEMs (QFE1952, QFE1922)
- 3x U.FL connectors
- 1x 1.8 dBi (Bluetooth) and 2x 3/5 dBi dual-band (Wi-Fi) antennas
- Atmel/Microchip AT97SC3205T TPM module (I2C bus)
- TI CC2540 Bluetooth LE module (USB 2.0 bus)
- 1x button (reset)
- 1x USB 2.0
- DC jack for main power input (12 V)
- UART header available on PCB (2.0 mm pitch)

This adds DTS for both the generic and custom Bit edition for Sartura.
Signed-off-by: Robert Marko <robert.marko@sartura.hr>
Cc: Luka Perkov <luka.perkov@sartura.hr>
Link: https://lore.kernel.org/r/20200909195640.3127341-4-robert.marko@sartura.hrSigned-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>

8devices Jalapeno is a dual-band SoM, based on Qualcomm
IPQ4018 + QCA8072 platform.

Specification:
QCA IPQ4018, Quad core ARM v7 Cortex A7 717MHz
256 MB of DDR3 RAM
8 MB of SPI NOR flash
128 MB of Winbond SPI NAND flash
WLAN1: Qualcomm Atheros QCA4018 2.4GHz 802.11bgn 2:2x2
WLAN2: Qualcomm Atheros QCA4018 5GHz 802.11a/n/ac 2:2x2
ETH: Qualcomm Atheros QCA8072 Gigabit Switch (1 x LAN, 1 x WAN)
Signed-off-by: Robert Marko <robert.marko@sartura.hr>
Cc: Luka Perkov <luka.perkov@sartura.hr>
Link: https://lore.kernel.org/r/20200909195640.3127341-3-robert.marko@sartura.hrSigned-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>

Lets add labels to more commonly used nodes for easier modification in board DTS files.
Signed-off-by: Robert Marko <robert.marko@sartura.hr>
Cc: Luka Perkov <luka.perkov@sartura.hr>
Link: https://lore.kernel.org/r/20200909195640.3127341-2-robert.marko@sartura.hrSigned-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>

Since we now have driver for the USB PHY, and USB controller is already supported by the DWC3 driver lets add the necessary nodes to DTSI.
Signed-off-by: John Crispin <john@phrozen.org>
Signed-off-by: Robert Marko <robert.marko@sartura.hr>
Cc: Luka Perkov <luka.perkov@sartura.hr>
Reviewed-by: Vinod Koul <vkoul@kernel.org>
Link: https://lore.kernel.org/r/20200909163831.1894142-1-robert.marko@sartura.hrSigned-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>

Add missing prng definition for ipq806x SoC
Signed-off-by: Jonathan McDowell <noodles@earth.li>
Link: https://lore.kernel.org/r/20200705142544.GA3389@earth.liSigned-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>

Add support for pshold block to drive pshold towards the PMIC, which is
used to trigger a configurable event such as reboot or poweroff of the
SDX55 platform.
Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
Link: https://lore.kernel.org/r/20210118051005.55958-7-manivannan.sadhasivam@linaro.orgSigned-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>

Enable Watchdog support for Application Processor Subsystem (APSS) block
on SDX55 platform.
Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
Link: https://lore.kernel.org/r/20210118051005.55958-6-manivannan.sadhasivam@linaro.orgSigned-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>

Add devicetree binding for watchdog present in Qcom SDX55 platform.

Cc: Wim Van Sebroeck <wim@linux-watchdog.org>
Cc: Guenter Roeck <linux@roeck-us.net>
Cc: Rob Herring <robh+dt@kernel.org>
Cc: linux-watchdog@vger.kernel.org
Cc: devicetree@vger.kernel.org
Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
Link: https://lore.kernel.org/r/20210118051005.55958-5-manivannan.sadhasivam@linaro.orgSigned-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>

Enable the support for USB3 controller, QMP PHY and HS PHY on SDX55 MTP.
Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
Link: https://lore.kernel.org/r/20210118051005.55958-4-manivannan.sadhasivam@linaro.orgSigned-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>

Add devicetree nodes for enabling USB3 controller, Qcom QMP PHY and
SNPS HS PHY on SDX55.
Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
Link: https://lore.kernel.org/r/20210118051005.55958-3-manivannan.sadhasivam@linaro.org
[bjorn: Added missing #power-domain-cells to &gcc]
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>

Add devicetree binding for SDX55 USB controller based on Qcom designware
IP.
Acked-by: Felipe Balbi <balbi@kernel.org>
Cc: Rob Herring <robh+dt@kernel.org>
Cc: devicetree@vger.kernel.org
Cc: linux-usb@vger.kernel.org
Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
Link: https://lore.kernel.org/r/20210118051005.55958-2-manivannan.sadhasivam@linaro.orgSigned-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>

Since commit fa2d0aa9 ("mmc: core: Allow setting slot index
via device tree alias") proper aliases should be named "mmcN".
Signed-off-by: Alexey Minnekhanov <alexeymin@postmarketos.org>
Link: https://lore.kernel.org/r/20210110185835.133059-1-alexeymin@postmarketos.orgSigned-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>

This adds the regulators found on SDX55 MTP.
Signed-off-by: Vinod Koul <vkoul@kernel.org>
Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
Link: https://lore.kernel.org/r/20210106125322.61840-19-manivannan.sadhasivam@linaro.orgSigned-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>

SDX55-mtp features PMX55 pmic, so include the dts as well
Signed-off-by: Vinod Koul <vkoul@kernel.org>
Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
Link: https://lore.kernel.org/r/20210106125322.61840-16-manivannan.sadhasivam@linaro.orgSigned-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>

This adds DTS for PMIC PMX55 found in Qualcomm platforms.
Signed-off-by: Vinod Koul <vkoul@kernel.org>
Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
Link: https://lore.kernel.org/r/20210106125322.61840-18-manivannan.sadhasivam@linaro.orgSigned-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>

This adds rpmpd node and opps for this node to the SDX55 dts.
Signed-off-by: Vinod Koul <vkoul@kernel.org>
Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
Link: https://lore.kernel.org/r/20210106125322.61840-17-manivannan.sadhasivam@linaro.orgSigned-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>

SDX55-mtp features PM8150B pmic, so include the dts as well
Signed-off-by: Vinod Koul <vkoul@kernel.org>
Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
Link: https://lore.kernel.org/r/20210106125322.61840-15-manivannan.sadhasivam@linaro.orgSigned-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>

This adds SPMI node to SDX55 dts.
Signed-off-by: Vinod Koul <vkoul@kernel.org>
Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
Link: https://lore.kernel.org/r/20210106125322.61840-14-manivannan.sadhasivam@linaro.orgSigned-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>

Enable QPIC NAND on SDX55-MTP board.
Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
Reviewed-by: Vinod Koul <vkoul@kernel.org>
Link: https://lore.kernel.org/r/20210106125322.61840-13-manivannan.sadhasivam@linaro.orgSigned-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>

Enable BAM DMA on SDX55-MTP board.
Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
Reviewed-by: Vinod Koul <vkoul@kernel.org>
Link: https://lore.kernel.org/r/20210106125322.61840-12-manivannan.sadhasivam@linaro.orgSigned-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>

Add qpic_nand node to support QPIC NAND controller on SDX55 platform.
Since there is no "aon" clock in SDX55, a dummy clock is provided.
Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
Link: https://lore.kernel.org/r/20210106125322.61840-11-manivannan.sadhasivam@linaro.orgSigned-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>

Add qpic_bam node to support QPIC BAM DMA controller on SDX55 platform.
Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
Reviewed-by: Vinod Koul <vkoul@kernel.org>
Link: https://lore.kernel.org/r/20210106125322.61840-10-manivannan.sadhasivam@linaro.orgSigned-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>

Add smem node to support shared memory manager on SDX55 platform.
Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
Reviewed-by: Vinod Koul <vkoul@kernel.org>
Link: https://lore.kernel.org/r/20210106125322.61840-9-manivannan.sadhasivam@linaro.org
[bjorn: Moved smem node out from /soc]
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>

Add TCSR Mutex node to support Qualcomm Hardware Mutex block on SDX55
platform.
Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
Link: https://lore.kernel.org/r/20210106125322.61840-8-manivannan.sadhasivam@linaro.orgSigned-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>

Add a node for the ARM SMMU found in the SDX55.
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
Link: https://lore.kernel.org/r/20210106125322.61840-7-manivannan.sadhasivam@linaro.orgSigned-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>

Add devicetree support for SDHCI controller found in Qualcomm SDX55
platform. The SDHCI controller is based on the MSM SDHCI v5 IP.
Hence, the support is added by reusing the existing sdhci driver with
"qcom,sdhci-msm-v5" as the fallback.
Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
Link: https://lore.kernel.org/r/20210106125322.61840-5-manivannan.sadhasivam@linaro.org
[bjorn: added include of qcom,gcc-sdx55.h]
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>

This adds reserved memory nodes to the SDX55 dtsi as defined by v6 of
the memory map
Signed-off-by: Vinod Koul <vkoul@kernel.org>
[mani: moved modem regions to board dts]
Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
Link: https://lore.kernel.org/r/20210106125322.61840-3-manivannan.sadhasivam@linaro.orgSigned-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>

This adds pincontrol node to SDX55 dts.
Signed-off-by: Vinod Koul <vkoul@kernel.org>
Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
Link: https://lore.kernel.org/r/20210106125322.61840-2-manivannan.sadhasivam@linaro.orgSigned-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>

Add basic devicetree support for SDX55 platform and MTP board from
Qualcomm. The SDX55 platform features an ARM Cortex A7 CPU which forms
the Application Processor Sub System (APSS) along with standard Qualcomm
peripherals like GCC, TLMM, BLSP, QPIC, and BAM etc... Also, there
exists the networking parts such as IPA, MHI, PCIE-EP, EMAC, and Modem
etc..

Currently, this basic devicetree support includes GCC, RPMh clock, INTC
and Debug UART.
Co-developed-by: Vinod Koul <vkoul@kernel.org>
Signed-off-by: Vinod Koul <vkoul@kernel.org>
Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
Link: https://lore.kernel.org/r/20201126083138.47047-3-manivannan.sadhasivam@linaro.orgSigned-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>

Document the SDX55 platform binding and also the boards using it.
Reviewed-by: Rob Herring <robh@kernel.org>
Signed-off-by: Vinod Koul <vkoul@kernel.org>
Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
Link: https://lore.kernel.org/r/20201126083138.47047-2-manivannan.sadhasivam@linaro.orgSigned-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>

Since commit 36e2c742 ("fs: don't allow splice read/write without
explicit ops") we've required that file operation structures explicitly
enable splice support, rather than falling back to the default handlers.

Most /proc files use the indirect 'struct proc_ops' to describe their
file operations, and were fixed up to support splice earlier in commits
40be821d..b24c30c6, but the mountinfo files interact with the
VFS directly using their own 'struct file_operations' and got missed as
a result.

This adds the necessary support for splice to work for /proc/*/mountinfo
and friends.
Reported-by: Joan Bruguera Micó <joanbrugueram@gmail.com>
Reported-by: Jussi Kivilinna <jussi.kivilinna@iki.fi>
Link: https://bugzilla.kernel.org/show_bug.cgi?id=209971
Cc: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Cc: Christoph Hellwig <hch@lst.de>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>

Pull NTB fixes from Jon Mason:
 "Bug fix for IDT NTB and Intel NTB LTR management support"

* tag 'ntb-5.11' of git://github.com/jonmason/ntb:
  ntb: intel: add Intel NTB LTR vendor support for gen4 NTB
  ntb: idt: fix error check in ntb_hw_idt.c