- 20 Oct, 2023 1 commit
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git://anongit.freedesktop.org/drm/drm-intelDave Airlie authored
- Add new DG2 PCI IDs (Shekhar) - Remove watchdog timers for PSR on Lunar Lake (Mika Kahola) - DSB changes for proper handling of LUT programming (Ville) - Store DSC DPCD capabilities in the connector (Imre) - Clean up zero initializers (Ville) - Remove Meteor Lake force_probe protection (RK) Signed-off-by:
Dave Airlie <airlied@redhat.com> From: Rodrigo Vivi <rodrigo.vivi@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/ZTFW4g6duLtp+Wy0@intel.com
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- 18 Oct, 2023 2 commits
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https://gitlab.freedesktop.org/agd5f/linuxDave Airlie authored
amd-drm-next-6.7-2023-10-13: amdgpu: - DC replay fixes - Misc code cleanups and spelling fixes - Documentation updates - RAS EEPROM Updates - FRU EEPROM Updates - IP discovery updates - SR-IOV fixes - RAS updates - DC PQ fixes - SMU 13.0.6 updates - GC 11.5 Support - NBIO 7.11 Support - GMC 11 Updates - Reset fixes - SMU 11.5 Updates - SMU 13.0 OD support - Use flexible arrays for bo list handling - W=1 Fixes - SubVP fixes - DPIA fixes - DCN 3.5 Support - Devcoredump fixes - VPE 6.1 support - VCN 4.0 Updates - S/G display fixes - DML fixes - DML2 Support - MST fixes - VRR fixes - Enable seamless boot in more cases - Enable content type property for HDMI - OLED fixes - Rework and clean up GPUVM TLB flushing - DC ODM fixes - DP 2.x fixes - AGP aperture fixes - SDMA firmware loading cleanups - Cyan Skillfish GPU clock counter fix - GC 11 GART fix - Cache GPU fault info for userspace queries - DC cursor check fixes - eDP fixes - DC FP handling fixes - Variable sized array fixes - SMU 13.0.x fixes - IB start and size alignment fixes for VCN - SMU 14 Support - Suspend and resume sequence rework - vkms fix amdkfd: - GC 11 fixes - GC 10 fixes - Doorbell fixes - CWSR fixes - SVM fixes - Clean up GC info enumeration - Rework memory limit handling - Coherent memory handling fixes - Use partial migrations in GPU faults - TLB flush fixes - DMA unmap fixes - GC 9.4.3 fixes - SQ interrupt fix - GTT mapping fix - GC 11.5 Support radeon: - Misc code cleanups - W=1 Fixes - Fix possible buffer overflow - Fix possible NULL pointer dereference UAPI: - Add EXT_COHERENT memory allocation flags. These allow for system scope atomics. Proposed userspace: https://github.com/RadeonOpenCompute/ROCT-Thunk-Interface/pull/88 - Add support for new VPE engine. This is a memory to memory copy engine with advanced scaling, CSC, and color management features Proposed mesa MR: https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25713 - Add INFO IOCTL interface to query GPU faults Proposed Mesa MR: https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23238 Proposed libdrm MR: https://gitlab.freedesktop.org/mesa/drm/-/merge_requests/298Signed-off-by:
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Radhakrishna Sripada authored
Meteor Lake has demonstrated consistent stability for some time. All user-space API modifications tide to its core platform functions are operational. The necessary firmware components are set up and comprehensive testing has been condused over a period. Given the recent faborable CI results, as well, we believe it's time to eliminate the 'force_probe' prerequisite and activate the platform by default. Signed-off-by:
Aditya Chauhan <aditya.chauhan@intel.com> Signed-off-by:
Andrzej Hajda <andrzej.hajda@intel.com> Signed-off-by:
Chris Wilson <chris.p.wilson@linux.intel.com> Signed-off-by:
Janusz Krzysztofik <janusz.krzysztofik@linux.intel.com> Signed-off-by:
Jonathan Cavitt <jonathan.cavitt@intel.com> Signed-off-by:
Nirmoy Das <nirmoy.das@intel.com> Signed-off-by:
Radhakrishna Sripada <radhakrishna.sripada@intel.com> Signed-off-by:
Andi Shyti <andi.shyti@linux.intel.com> Cc: Jani Nikula <jani.nikula@linux.intel.com> Cc: Joonas Lahtinen <joonas.lahtinen@linux.intel.com> Cc: Rodrigo Vivi <rodrigo.vivi@intel.com> Cc: Tvrtko Ursulin <tvrtko.ursulin@intel.com> Acked-by:
Lee Shawn C <shawn.c.lee@intel.com> Tested-by:
Karthik B S <karthik.b.s@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20231008164824.919262-1-andi.shyti@linux.intel.com
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- 17 Oct, 2023 2 commits
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Dave Airlie authored
Merge tag 'drm-habanalabs-next-2023-10-10' of https://git.kernel.org/pub/scm/linux/kernel/git/ogabbay/linux into drm-next This tag contains habanalabs driver changes for v6.7. The notable changes are: - uAPI changes: - Expose tsc clock sampling to better sync clock information in profiler. - Enhance engine error reporting in the info ioctl. - Block access to the eventfd operations through the control device. - Disable the option of the user to register multiple times with the same offset for timestamp dump by the driver. If a user wants to use the same offset in the timestamp buffer for different interrupt, it needs to first de-register the offset. - When exporting dma-buf (for p2p), force the user to specify size/offset in multiples of PAGE_SIZE. This is instead of the driver doing the rounding to PAGE_SIZE, which has caused the driver to map more memory than was intended by the user. - New features and improvements: - Complete the move of the driver to the accel subsystem by removing the custom habanalabs class and major and registering to accel subsystem. - Move the firmware interface files to include/linux/habanalabs. This is a pre-requisite for upstreaming the NIC drivers of Gaudi (as they need to include those files). - Perform device hard-reset upon PCIe AXI drain event to prevent the failure from cascading to different IP blocks in the SoC. In secured environments, this is done automatically by the firmware. - Print device name when it is removed for better debuggability. - Add support for trace of dma map sgtable operations. - Optimize handling of user interrupts by splitting the interrupts to two lists. One list for fast handling and second list for handling with timestamp recording, which is slower. - Prevent double device hard-reset due to 2 adjacent H/W events. - Set device status 'malfunction' while in rmmod. - Firmware related fixes: - Extend preboot timeout because preboot loading might take longer than expected in certain cases. - Add a protection mechanism for the Event Queue. In case it is full, the firmware will be able to notify about it through a dedicated interrupt. - Perform device hard-reset in case scrubbing of memory has failed. - Bug fixes and code cleanups: - Small fixes of dma-buf handling in Gaudi2, such as handling an offset != 0, using the correct exported size, creation of sg table. - Fix spmu mask creation. - Fix bug in wait for cs completion for decoder workloads. - Cleanup Greco name from documentation. - Fix bug in recording timestamp during cs completion interrupt handling. - Fix CoreSight ETF configuration and flush logic. - Fix small bug in hpriv_list handling (the list that contains the private data per process that opens our device). Signed-off-by:
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Dave Airlie authored
Merge tag 'drm-intel-gt-next-2023-10-12' of git://anongit.freedesktop.org/drm/drm-intel into drm-next Driver Changes: Fixes/improvements/new stuff: - Register engines early to avoid type confusion (Mathias Krause) - Suppress 'ignoring reset notification' message [guc] (John Harrison) - Update 'recommended' version to 70.12.1 for DG2/ADL-S/ADL-P/MTL [guc] (John Harrison) - Enable WA 14018913170 [guc, dg2] (Daniele Ceraolo Spurio) Future platform enablement: - Clean steer semaphore on resume (Nirmoy Das) - Skip MCR ops for ring fault register [mtl] (Nirmoy Das) - Make i915_gem_shrinker multi-gt aware [gem] (Jonathan Cavitt) - Enable GGTT updates with binder in MTL (Nirmoy Das, Chris Wilson) - Invalidate the TLBs on each GT (Chris Wilson) Miscellaneous: - Clarify type evolution of uabi_node/uabi_engines (Mathias Krause) - Annotate struct ct_incoming_msg with __counted_by [guc] (Kees Cook) - More use of GT specific print helpers [gt] (John Harrison) Signed-off-by:
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- 16 Oct, 2023 24 commits
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Ville Syrjälä authored
Just use a simple {} to zero initialize arrays/structs instead of the hodgepodge of stuff we are using currently. Signed-off-by:Ville Syrjälä <ville.syrjala@linux.intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20231012122442.15718-5-ville.syrjala@linux.intel.comReviewed-by:
Jani Nikula <jani.nikula@intel.com>
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Ville Syrjälä authored
Just use a simple {} to zero initialize arrays/structs instead of the hodgepodge of stuff we are using currently. Signed-off-by: -
Ville Syrjälä authored
Just use a simple {} to zero initialize arrays/structs instead of the hodgepodge of stuff we are using currently. Signed-off-by: -
Imre Deak authored
The previous patches converted all users of the DSC DPCD caps to look these up from the connector, so remove the version stored in intel_dp. A follow-up patchset will read out the MST connector specific capabilities in intel_dp_add_mst_connector() -> intel_dp_mst_read_decompression_port_dsc_caps(). v2: - Rebased on intel_edp_get_dsc_sink_cap() addition in the patchset. v3: - Rebased on read-out fix for eDP in the patchset. Reviewed-by: Stanislav Lisovskiy <stanislav.lisovskiy@intel.com> (v1) Reviewed-by:
Imre Deak <imre.deak@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20231011171606.2540078-3-imre.deak@intel.com
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Imre Deak authored
Use the connector's DSC DPCD capabilities in intel_dp_mst_mode_valid_ctx(). Reviewed-by:
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Imre Deak authored
Use the connector's DSC DPCD capabilities in intel_dp_dsc_compute_config(). Reviewed-by:
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Imre Deak authored
Use the connector's DSC DPCD capabilities in intel_dp_mode_valid(). Reviewed-by:
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Imre Deak authored
Use the connector's DSC DPCD capabilities in intel_dp_dsc_get_slice_count(). Reviewed-by:
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Imre Deak authored
Use the connector's DSC DPCD capabilities in intel_dp_dsc_supports_format(). Reviewed-by:
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Imre Deak authored
Use the connector's DSC DPCD capabilities in intel_dp_dsc_compute_params(). Reviewed-by:
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Imre Deak authored
intel_dp_sink_dsc_version_minor() only requires the DSC DPCD, so pass only this to the function. Reviewed-by:
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Imre Deak authored
intel_dp_source_dsc_version_minor() only requires the i915 pointer, so pass only this to the function. Reviewed-by:
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Imre Deak authored
Use the connector's DSC DPCD capabilities in drm_dp_dsc_sink_supported_input_bpcs(). Reviewed-by:
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Imre Deak authored
Use the connector's DSC DPCD capabilities in intel_dp_dsc_max_sink_compressed_bppx16(). Reviewed-by:
Stanislav Lisovskiy <stanislav.lisovskiy@intel.com> Reviewed-by:
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Imre Deak authored
Use the connector's DSC DPCD capabilities in intel_dp_supports_dsc(). Reviewed-by:
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Imre Deak authored
Use the connector's DSC DPCD capabilities in intel_dp_supports_fec(). Reviewed-by:
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Imre Deak authored
Use the connector's DSC DPCD capabilities in intel_dp_dsc_compute_max_bpp() instead of the version stored in the encoder. Reviewed-by:
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Imre Deak authored
Use the connector's DSC DPCD capabilities in i915_dsc_fec_support_show() instead of the version stored in the encoder. Atm the two are identical, but a follow-up patch will store the (MST) connector specific version in the connector. Reviewed-by:
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Imre Deak authored
Cache the i915 specific device and connector pointers in i915_dsc_fec_support_show(). v2: - s/Cahce/Cache typo in commit log. (Stan) Reviewed-by:
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Imre Deak authored
Similarly to eDP and SST-DP connectors read out the DSC capabilities for MST connectors as well. Atm these will match the root port's DSC caps and only used after a follow-up change enables the decompression for each stream separately (vs. the current way of enabling it only globally in the first branch device downstream of the root port). Reviewed-by:
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Imre Deak authored
In an MST topology the DSC capabilities are specific to each connector, retrieved either from the sink if it decompresses the stream, or from a branch device between the source and the sink in case this branch device does the decompression. Accordingly each connector needs to cache its own DSC DPCD and FEC capabilities, along with the AUX device through which the decompression can be enabled. This patch prepares for that by storing the capabilities and the DSC AUX device in the connector, for now these just matching the version stored in intel_dp. The follow-up patches will convert all users to look up these in the connector instead of intel_dp, after which the intel_dp copies are removed. v2: - Rebased on intel_edp_get_dsc_sink_cap() addition in previous patch. v3: - Rebased on read-out fix for eDP in previous patch. Reviewed-by: Stanislav Lisovskiy <stanislav.lisovskiy@intel.com> (v1) Reviewed-by:
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Imre Deak authored
Check only the eDP or the DP specific DPCD revision depending on the sink type. Pass the corresponding revision to the function, which allows getting the DSC caps of a branch device (in an MST topology, which has its own DPCD and so DPCD revision). While at it use DP_DPCD_REV_14 instead of open coding it and for clarity add a separate function to read out the DSC capability on eDP. v2: - Use DP_DPCD_REV_14 instead of open coding it. (Stan) - Check EDP_DCPD_REV/DPCD_REV in a clearer way. (Ville) v3: - Fix the read-out for eDP in intel_dp_detect(). Cc: Ville Syrjälä <ville.syrjala@linux.intel.com> Reviewed-by: Stanislav Lisovskiy <stanislav.lisovskiy@intel.com> (v1) Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com> (v2) Signed-off-by:
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git://anongit.freedesktop.org/drm/drm-intelDave Airlie authored
drm/i915 feature pull #2 for v6.7: Features and functionality: - Preparation for i915 display code reuse in upcoming Xe driver (Jani) - Drop the fastboot module parameter and use the platform defaults (Arun) - Enable new LNL FBC features (Vinod) - Add LNL display feature capability reads (Vinod) Refactoring and cleanups: - Locally enable W=1 warnings by default in i915 (Jani) - Move HDCP GSC message code to a separate file (Suraj) - GVT include cleanups (Jani) - Move more display init under display/ (Jani) - DPLL ID refactoring (Ville) - Better abstraction of GT0 (Jani) - Move VGA decode function to GMCH code (Uma) - Use local64_try_cmpxchg() to optimize PMU event read (Uros Bizjak) - Clean up FBC checks (Ville) - Constify and unify state checker calling conventions (Ville) - Add display step name helper (Chaitanya) Documentation: - Update CCS and GSC CS documentation (Rodrigo) - Fix a number of documentation typos (Randy Dunlap) Fixes: - VLV DSI fixes and quirks (Hans) - Fix crtc state memory leaks (Suraj) - Increase LSPCON mode settle timeout (Niko Tsirakis) - Stop clobbering old crtc state during state check (Ville) - Fix VLV color state readout (Ville) - Fix cx0 PHY pipe reset to allow S0iX (Khaled) - Ensure DP MST pbn_div is up-to-date after sink reconnect (Imre) - Drop an unnecessary NULL check to fix static analyzer warning (Suraj) - Use an explicit rather than implicit include for frontbuffer tracking (Jouni) Merges: - Backmerge drm-next to fix a conflict (Jani) Signed-off-by:
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git://anongit.freedesktop.org/drm/drm-miscDave Airlie authored
drm-misc-next for v6.7-rc1: Contains the previous pull request drm-misc-next-2023-10-06 + following: Cross-subsystem Changes: - Rename fb_pgprot to pgprot_framebuffer and remove file argument/ - Update iosys-map documentation typos. Core Changes: - Assorted fixes to drm/panel. - Add HPD state to drm_connector_oob_hotplug_event(), and implement oob hotplug events in bridge connector. - Replace drm_framebuffer_plane_width/height with calls to drm_format_info_plane_width/height. Driver Changes: - Clock and debug fixes for bridge/samsung-dsim. - More btree -> maple tree conversions. - Assorted bugfixes in rockchip, panel-tpo-tpg110, - Add LTK050H3148W-CTA6 panel support. - Assorted small fixes in host1x, tegra, simpledrm. - Suspend fixes for host1x. Signed-off-by:
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- 13 Oct, 2023 11 commits
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Ma Ke authored
In amdgpu_vkms_conn_get_modes(), the return value of drm_cvt_mode() is assigned to mode, which will lead to a NULL pointer dereference on failure of drm_cvt_mode(). Add a check to avoid null pointer dereference. Signed-off-by:
Ma Ke <make_ruc2021@163.com> Signed-off-by:
Alex Deucher <alexander.deucher@amd.com>
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Li Ma authored
Update driver if, pmfw and ppsmc header files. Add new gpu_metrics_v3_0 for metrics table updated in driver if and reserve legacy metrics table to maintain backward compatibility. --- v1: Update header files and add gpu_metrics_v3_0. v2: Update smu_types.h, smu headers and drop smu_cmn_get_smc_version in smu v14_0_0. Signed-off-by:
Li Ma <li.ma@amd.com> Reviewed-by:
Yifan Zhang <yifan1.zhang@amd.com> Reviewed-by:
Kenneth Feng <kenneth.feng@amd.com> Acked-by:
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Yang Wang authored
add RAS error info support for umc_v12_0. Signed-off-by:
Yang Wang <kevinyang.wang@amd.com> Reviewed-by:
Tao Zhou <tao.zhou1@amd.com> Reviewed-by:
Hawking Zhang <Hawking.Zhang@amd.com> Signed-off-by:
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Yang Wang authored
add RAS error info support for mmhub_v1_8. Signed-off-by:
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Yang Wang authored
add RAS error info support for gfx_v9_4_3. Signed-off-by:
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Yang Wang authored
add RAS error info support for sdma_v4_4_2. Signed-off-by:
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Yang Wang authored
introduced "ras_err_info" to better identify a RAS ERROR source. NOTE: For legacy chips, keep the original RAS error print format. v1: RAS errors may come from different dies during a RAS error query, therefore, need a new data structure to identify the source of RAS ERROR. v2: - use new data structure 'amdgpu_smuio_mcm_config_info' instead of ras_err_id (in v1 patch) - refine ras error dump function name - refine ras error dump log format Signed-off-by:
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Yifan Zhang authored
flush the correct vmid tlb for specific pasid on gmc 11. Fixes: 041a5743 ("drm/amdgpu: fix and cleanup gmc_v11_0_flush_gpu_tlb_pasid") Signed-off-by:
Christian König <christian.koenig@amd.com> Signed-off-by:
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Yang Wang authored
(No effect outside the ras_mgr data structure) Since a new member was added to the ras_err_data data structure, it becomes unreasonable for the ras_mgr instance to contain this data, because ras mgr only uses the 2 member information of ue_count/ce_count in err_data. This patch changes the code err_data into built-in structure members, making the code directly compatible. Signed-off-by:
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Jesse Zhang authored
Temporary workaround to fix issues observed in some compute applications when GFXOFF is enabled on GFX9. Signed-off-by:
Jesse Zhang <Jesse.Zhang@amd.com> Acked-by:
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Lang Yu authored
These are missed during rebase. Signed-off-by:
Lang Yu <Lang.Yu@amd.com> Reviewed-by:
Veerabadhran Gopalakrishnan <Veerabadhran.Gopalakrishnan@amd.com> Signed-off-by:
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