- 16 May, 2020 2 commits
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Geert Uytterhoeven authored
Currently the AMD pin controller driver supports ACPI platform only. Make the PINCTRL_AMD config symbol depend on ACPI, to avoid asking the user about it when configuring a kernel without ACPI support. Signed-off-by:
Geert Uytterhoeven <geert+renesas@glider.be> Link: https://lore.kernel.org/r/20200507113751.24213-1-geert+renesas@glider.beSigned-off-by:
Linus Walleij <linus.walleij@linaro.org>
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Geert Uytterhoeven authored
The Equilibrium pin controller is only present on Intel Lightning Mountain SoCs. Add an architecture dependency to the PINCTRL_EQUILIBRIUM config symbol, to avoid asking the user about it when configuring a kernel for a non-x86 architecture. Signed-off-by:
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- 15 May, 2020 1 commit
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Linus Walleij authored
Merge tag 'intel-pinctrl-v5.8-1' of git://git.kernel.org/pub/scm/linux/kernel/git/pinctrl/intel into devel intel-pinctrl for v5.8-1 * Introduce GPIO driver for Jasper Lake * Fix long standing bug in Sunrisepoint-H PAD locking code * Enable pin configuration setting for GPIO chip for Baytrail * Work around race condition in Cherriview hardware when handle IRQ * Clean up Cherryview code to be closer to other drivers The following is an automated git shortlog grouped by driver: baytrail: - Use platform_get_irq_optional() explicitly - Enable pin configuration setting for GPIO chip cannonlake: - Use generic flag for special GPIO base treatment cherryview: - Add missing spinlock usage in chv_gpio_irq_handler - Use GENMASK() consistently - Re-use data structures from pinctrl-intel.h (part 2) icelake: - Use generic flag for special GPIO base treatment intel: - Move npins closer to pin_base in struct intel_community - Update description in struct intel_community - Add Intel Jasper Lake pin controller support - Introduce new flag to force GPIO base to be 0 - Introduce common flags for GPIO mapping scheme lynxpoint: - Use platform_get_irq_optional() explicitly sunrisepoint: - Fix PAD lock register offset for SPT-H tigerlake: - Use generic flag for special GPIO base treatment
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- 12 May, 2020 5 commits
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Dafna Hirschfeld authored
In function rockchip_dt_node_to_map, a new_map variable is allocated by: new_map = devm_kcalloc(pctldev->dev, map_num, sizeof(*new_map), GFP_KERNEL); This uses devres and attaches new_map to the pinctrl driver. This cause a leak since new_map is not released when the probed driver is removed. Fix it by using kcalloc to allocate new_map and free it in `rockchip_dt_free_map` Signed-off-by:
Dafna Hirschfeld <dafna.hirschfeld@collabora.com> Reviewed-by:
Heiko Stuebner <heiko@sntech.de> Link: https://lore.kernel.org/r/20200506100903.15420-1-dafna.hirschfeld@collabora.comSigned-off-by:
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Dafna Hirschfeld authored
The function rockchip_pinctrl_parse_dt returns -EINVAL if allocation fails. Change the return error to -ENOMEM Signed-off-by:
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Arnd Bergmann authored
Kbuild warns when this file is built as a loadable module: WARNING: modpost: missing MODULE_LICENSE() in drivers/pinctrl/mediatek/pinctrl-mtk-common-v2.o see include/linux/module.h for more information Add the missing license/author/description tags. Fixes: 8174a851 ("pinctrl: mediatek: make MediaTek pinctrl v2 driver ready for buidling loadable module") Signed-off-by:
Arnd Bergmann <arnd@arndb.de> Link: https://lore.kernel.org/r/20200505140848.554957-1-arnd@arndb.deSigned-off-by:
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Paul Cercueil authored
These are called when a GPIO is to be used as IRQ. Without these custom callbacks, when an interrupt is requested directly and not through gpiod_to_irq(), the request fails because the GPIO is not necesarily in input mode. These callbacks simply enforce that the requested GPIO is in input mode. Signed-off-by:
Paul Cercueil <paul@crapouillou.net> Link: https://lore.kernel.org/r/20200503164549.163884-1-paul@crapouillou.netSigned-off-by:
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Rikard Falkeborn authored
Mark pin_cfg as const, allowing the compiler to put the struct in .rodata instead of .data. Signed-off-by:
Rikard Falkeborn <rikard.falkeborn@gmail.com> Link: https://lore.kernel.org/r/20200425203813.6442-1-rikard.falkeborn@gmail.comSigned-off-by:
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- 08 May, 2020 1 commit
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Linus Walleij authored
Merge tag 'sh-pfc-for-v5.8-tag1' of git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-drivers into devel pinctrl: sh-pfc: Updates for v5.8 - Fix SWIO pins on RZ/A1L, - Add missing bindings to MAINTAINERS.
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- 28 Apr, 2020 9 commits
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Linus Walleij authored
The Hulk robot reports these build warnings: drivers/pinctrl/nomadik/pinctrl-nomadik-db8500.c:899:20: warning: ‘sbag_groups’ defined but not used [-Wunused-const-variable=] DB8500_FUNC_GROUPS(sbag, "sbag_oc2_1", "sbag_oc4_1"); ^ drivers/pinctrl/nomadik/pinctrl-nomadik-db8500.c:570:23: warning: ‘ipgpio6_c_2_pins’ defined but not used [-Wunused-const-variable=] static const unsigned ipgpio6_c_2_pins[] = { DB8500_PIN_G3 }; ^~~~~~~~~~~~~~~~ drivers/pinctrl/nomadik/pinctrl-nomadik-db8500.c:472:23: warning: ‘mc1dir_a_1_pins’ defined but not used [-Wunused-const-variable=] static const unsigned mc1dir_a_1_pins[] = { DB8500_PIN_AH13, DB8500_PIN_AG12, ^~~~~~~~~~~~~~~ drivers/pinctrl/nomadik/pinctrl-nomadik-db8500.c:453:23: warning: ‘modem_a_1_pins’ defined but not used [-Wunused-const-variable=] static const unsigned modem_a_1_pins[] = { DB8500_PIN_D22, DB8500_PIN_C23, ^~~~~~~~~~~~~~ drivers/pinctrl/nomadik/pinctrl-nomadik-db8500.c:430:23: warning: ‘kpskaskb_a_1_pins’ defined but not used [-Wunused-const-variable=] static const unsigned kpskaskb_a_1_pins[] = { DB8500_PIN_D17, DB8500_PIN_D16 }; ^~~~~~~~~~~~~~~~~ They are just very old bugs in seldomly used pin groups. Fix the problem by using the pins and referencing the function. Reported-by:Hulk Robot <hulkci@huawei.com> Reported-by:
Jason Yan <yanaijie@huawei.com> Signed-off-by:
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Linus Walleij authored
The Hulk robot reports an usused varible: drivers/pinctrl/nomadik/pinctrl-ab8505.c:137:23: warning: ‘gpio50_a_1_pins’ defined but not used [-Wunused-const-variable=] static const unsigned gpio50_a_1_pins[] = { AB8505_PIN_L4 }; ^~~~~~~~~~~~~~~ This variable actually should be used. Probably an oversight by the driver author. Cc: Patrice Chotard <patrice.chotard@st.com> Reported-by: -
Jason Yan authored
The 'pwm37' is not added to bm1880_pctrl_groups, which triggers a gcc build warning: drivers/pinctrl/pinctrl-bm1880.c:263:27: warning: ‘pwm37_pins’ defined but not used [-Wunused-const-variable=] static const unsigned int pwm37_pins[] = { 110 }; Signed-off-by:Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> Link: https://lore.kernel.org/r/20200428115543.33379-1-yanaijie@huawei.comSigned-off-by:
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Amelie Delaunay authored
Pin direction is not used to set pin configuration. Fixes: a502b343 ("pinctrl: stmfx: update pinconf settings") Signed-off-by:
Amelie Delaunay <amelie.delaunay@st.com> Link: https://lore.kernel.org/r/20200422072513.8352-1-amelie.delaunay@st.comSigned-off-by:
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Dejin Zheng authored
use codespell to fix lots of typos over frontends. Signed-off-by:
Dejin Zheng <zhengdejin5@gmail.com> Reviewed-by:
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Martin Blumenstingl authored
Use gpiochip_generic_config for the gpio_chip's set_config callback so GPIO flags like GPIO_PULL_UP or GPIO_PULL_DOWN can be used in the board .dts descriptions. This is required for some Meson8m2 boards where GPIO_BSD_EN provides the "MUTE" signal and requires enabling the internal pull-up resistor. Signed-off-by:
Martin Blumenstingl <martin.blumenstingl@googlemail.com> Link: https://lore.kernel.org/r/20200417183349.1283092-3-martin.blumenstingl@googlemail.comSigned-off-by:
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Martin Blumenstingl authored
Implement the get_direction callback so we read the direction from the actual GPIO controller register. This is recommended by the gpio_chip kernel doc. Signed-off-by:
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Venkata Narendra Kumar Gutta authored
Add initial Qualcomm SM8250 pinctrl driver to support pin configuration with pinctrl framework for SM8250 SoC. Signed-off-by:
Rishabh Bhatnagar <rishabhb@codeaurora.org> Signed-off-by:
Venkata Narendra Kumar Gutta <vnkgutta@codeaurora.org> Link: https://lore.kernel.org/r/1586477057-7636-2-git-send-email-vnkgutta@codeaurora.org [bjorn: Regrouped functions, upstream tiles implementation, dropped downstream-only features] Signed-off-by:
Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/20200417061907.1226490-3-bjorn.andersson@linaro.orgSigned-off-by:
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Bjorn Andersson authored
Add device tree binding Documentation details for Qualcomm SM8250 pinctrl driver. Signed-off-by:
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- 22 Apr, 2020 2 commits
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Andy Shevchenko authored
It's common across the drivers to use the (pin_base, npins) pair to describe community characteristics. Thus, move them in the struct intel_community to be closer to each other. While at it, add a blank line to cut driver usable fields from what core reserves for itself. Signed-off-by:
Andy Shevchenko <andriy.shevchenko@linux.intel.com> Acked-by:
Mika Westerberg <mika.westerberg@linux.intel.com>
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Andy Shevchenko authored
It appears that most of the drivers, that are using struct intel_community, utilize gpps rather than gpp_size. Update comment accordingly. While here, correct the description of gpp_size, i.e. remove double space and drop redundant 'etc.' part. Signed-off-by:
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- 20 Apr, 2020 2 commits
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Geert Uytterhoeven authored
The "PIN CONTROLLER - RENESAS" section lacks the related DT bindings. Add them. Signed-off-by:
Niklas Söderlund <niklas.soderlund+renesas@ragnatech.se> Link: https://lore.kernel.org/r/20200417141003.22816-1-geert+renesas@glider.be
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Jason Yan authored
The rza1l_swio_entries referred to the wrong array rza1h_swio_pins, which was intended to be rza1l_swio_pins. So let's fix it. This is detected by the following gcc warning: drivers/pinctrl/pinctrl-rza1.c:401:35: warning: ‘rza1l_swio_pins’ defined but not used [-Wunused-const-variable=] static const struct rza1_swio_pin rza1l_swio_pins[] = { ^~~~~~~~~~~~~~~ Fixes: 039bc58e ("pinctrl: rza1: Add support for RZ/A1L") Reported-by:
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- 17 Apr, 2020 3 commits
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Grace Kao authored
According to Braswell NDA Specification Update (#557593), concurrent read accesses may result in returning 0xffffffff and write instructions may be dropped. We have an established format for the commit references, i.e. cdca06e4 ("pinctrl: baytrail: Add missing spinlock usage in byt_gpio_irq_handler") Fixes: 0bd50d71 ("pinctrl: cherryview: prevent concurrent access to GPIO controllers") Signed-off-by:
Grace Kao <grace.kao@intel.com> Reported-by:
Brian Norris <briannorris@chromium.org> Reviewed-by:
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Jason Yan authored
Fix the following build warning: WARNING: modpost: missing MODULE_LICENSE() in drivers/pinctrl/pinctrl-mcp23s08.o see include/linux/module.h for more information Signed-off-by:
Randy Dunlap <rdunlap@infradead.org> Reported-by:
Stephen Rothwell <sfr@canb.auug.org.au> Signed-off-by:
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YueHaibing authored
Remove duplicated include. Fixes: 13bec8d4 ("pinctrl: qcom: use scm_call to route GPIO irq to Apps") Signed-off-by:
YueHaibing <yuehaibing@huawei.com> Reviewed-by:
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- 16 Apr, 2020 15 commits
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Andy Shevchenko authored
There is no need to repeat functionality of platform_get_irq_optional() in the driver. Replace it with explicit call to the helper. Signed-off-by:
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Andy Shevchenko authored
Split the driver to three parts: core, I²C, SPI. No functional change intended. Signed-off-by:
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Andy Shevchenko authored
Here is a simplification of SPI code by using for_each_set_bit() and hweight_long() library functions. Signed-off-by:
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Andy Shevchenko authored
Device property API allows to gather device resources from different sources, such as ACPI. Convert the drivers to unleash the power of device property API. Signed-off-by:
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Andy Shevchenko authored
Return error code from device_property_read_u32() as is in mcp23s08_probe(). While here, drop status variable in mcp23s08_irq_set_type() which always 0. Signed-off-by:
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Andy Shevchenko authored
There is a lot of duplication for one small helper function. Refactor mcp23s08_spi_regmap_init() to prepare everything first and then register regmap at the end. Signed-off-by:
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Andy Shevchenko authored
The cs parameter in mcp23s08_probe_one() is never used. Drop it for good. Signed-off-by:
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Andy Shevchenko authored
There are three parts of each, SPI and I²C, driver spread over the code under ifdeffery. Consolidate them so it will be only one for SPI and one for I²C. The code has been cosmetically changed to avoid intrusive change. Clean up is considered in the nearest future. Signed-off-by:
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Andy Shevchenko authored
In both cases, SPI and I²C, IRQ chip is filled in the same way. Deduplicate this by moving common part to mcp23s08_probe_one(). Signed-off-by:
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Andy Shevchenko authored
Platform data is a legacy interface to supply device properties to the driver. In this case we even don't have in-kernel users for it. Just remove it for good. Signed-off-by:
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Anson Huang authored
i.MX8DXL contains a system controller that is responsible for controlling the pad setting of the IPs that are present. Communication between the host processor running an OS and the system controller happens through a SCU protocol, add support for the SCU based i.MX8DXL pinctrl driver. Signed-off-by:
Anson Huang <Anson.Huang@nxp.com> Link: https://lore.kernel.org/r/1585306559-13973-2-git-send-email-Anson.Huang@nxp.comSigned-off-by:
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Anson Huang authored
Update binding doc to support i.MX8DXL pinctrl. Signed-off-by:
Rob Herring <robh@kernel.org> Link: https://lore.kernel.org/r/1585306559-13973-1-git-send-email-Anson.Huang@nxp.comSigned-off-by:
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Corentin Labbe authored
When checking the logs on my sun8i-a33-olinuxino I saw: sun8i-a23-r-pinctrl 1f02c00.pinctrl: Reset controller missing but this driver was working after. This message is just here because the reset controller was still not probed. So don't say anything if the return code say to wait. Signed-off-by:
Corentin Labbe <clabbe@baylibre.com> Link: https://lore.kernel.org/r/1585818532-23051-1-git-send-email-clabbe@baylibre.comAcked-by:
Maxime Ripard <mripard@kernel.org> Signed-off-by:
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Light Hsieh authored
This patch make pinctrl-mt6765 ready for building as loadable module. Signed-off-by:
Sean Wang <sean.wang@mediatek.com> Signed-off-by:
Light Hsieh <light.hsieh@mediatek.com> Link: https://lore.kernel.org/r/42100afe6f97d28447c153bea6b54ea556cf95ca.1586289920.git.sean.wang@mediatek.comSigned-off-by:
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Light Hsieh authored
In the future we want to be able to build the MediaTek pinctrl driver, based on paris, as kernel module. This patch allows pinctrl-paris.c, the external interrupt controller mtk-eint.c, and pinctrl-mtk-common-v2.c to be loadable as module. Signed-off-by:
Matthias Brugger <matthias.bgg@gmail.com> Link: https://lore.kernel.org/r/9feeb04805e5a406fe22a92e3f280abda39ddda4.1586289920.git.sean.wang@mediatek.comSigned-off-by:
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